On 18 November 2015 at 15:54, Leif Lindholm wrote:
> On Wed, Nov 18, 2015 at 02:16:26PM +0100, Ard Biesheuvel wrote:
>> Yesterday's 3-piece series is now a 7-piece series, since I spotted some
>> other
>> issues when looking at this code.
>>
>> Patch #1 replaces the
On Wed, Nov 18, 2015 at 04:38:55PM +0100, Ard Biesheuvel wrote:
> The ARM_MEMORY_REGION_DESCRIPTOR array provided by the platform may
> contain entries that extend beyond the 4 GB boundary, above which
> we can't map anything on 32-bit ARM. If this is the case, map only
> the 1:1 addressable part.
The ARM_MEMORY_REGION_DESCRIPTOR array provided by the platform may
contain entries that extend beyond the 4 GB boundary, above which
we can't map anything on 32-bit ARM. If this is the case, map only
the 1:1 addressable part.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by:
Reviewed-by: Michael Kinney
Mike
-Original Message-
From: Fan, Jeff
Sent: Tuesday, November 17, 2015 10:45 PM
To: edk2-devel@lists.01.org
Cc: Kinney, Michael D ; Yao, Jiewen
Subject: [Patch 2/2]
Star,
There are a few comments included below for the SerialPortSetAttributes()
function header comment block.
With those comment block fixes:
Reviewed-by: Michael Kinney
Best regards,
Mike
> -Original Message-
> From: edk2-devel
Reviewed-by: Michael Kinney
Mike
-Original Message-
From: Fan, Jeff
Sent: Tuesday, November 17, 2015 10:45 PM
To: edk2-devel@lists.01.org
Cc: Kinney, Michael D ; Yao, Jiewen
Subject: [Patch 1/2] UefiCpuPkg:
Star,
There are a few comments included below for the SerialPortSetAttributes()
function header comment block.
With those comment block fixes:
Reviewed-by: Michael Kinney
Best regards,
Mike
> -Original Message-
> From: edk2-devel
Star,
I think I am seeing some files with incorrect line endings in this patch series.
Please make sure you use the BaseTools\Scripts\PatchCheck.py script.
Thanks,
Mike
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Star
> Zeng
> Sent:
Star,
There are a few comments included below for the SerialPortSetAttributes()
function header comment block.
With those comment block fixes:
Reviewed-by: Michael Kinney
Best regards,
Mike
> -Original Message-
> From: edk2-devel
Star,
It looks like the function header comment block for SerialPortSetAttributes()
has the same issues in all patches in this series.
Please make sure to apply my feedback to patch 1/12 to all patches in the
series.
Thanks,
Mike
> -Original Message-
> From: Kinney, Michael D
>
Implement an accessor function for the ID_MMFR0 system register, which
contains information about the VMSA implementation. We will need this
to access the number of shareability levels and the nature of their
implementations.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by:
The definition of TTBR_NON_INNER_CACHEABLE should be bit 0 cleared, not
bit 0 set. Furthermore, the name is inconsistent with the other definitions
so rename it to TTBR_INNER_NON_CACHEABLE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
Yesterday's 3-piece series is now a 7-piece series, since I spotted some other
issues when looking at this code.
Patch #1 replaces the bogus TTBR_WRITE_THROUGH_NO_ALLOC with something that is
more aligned with what TTBRx actually allows.
Patch #2 adds an accessor to the ID_MMFR0 system id
To align with the way normal cacheable memory is mapped, set the
shareable bit for cached accesses performed by the page table walker.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
ArmPkg/Include/Chipset/ArmV7Mmu.h | 6
Even though mapping normal memory (inner) shareable is usually the
correct choice on coherent systems, it may be desirable in some cases
to use non-shareable mappings for normal memory, e.g., when hardware
managed coherency is not required and the memory system is not fully
configured yet. So
The definition TTBR_WRITE_THROUGH_NO_ALLOC makes little sense, since
a) its meaning is unclear in the context of TTBRx, since write through
always implies Read-Allocate and no Write-Allocate
b) its definition equals the definition of TTBR_WRITE_BACK_ALLOC
So instead, rename it to
On 16 November 2015 at 16:03, Michael Zimmermann
wrote:
> Unfortunately I can't tell you much about how the L2 works or if it's
> configurable because it's a proprietary hw(I'm a opensource dev working with
> Qualcomm Android devices).
>
> Also, I'm using ARM PrePi so
On Wed, Nov 18, 2015 at 09:25:55AM +0100, Ard Biesheuvel wrote:
> This series fixes some issues that exist in the code with regard to how device
> mappings are created. According to the architecture, read-sensitive devices
> should be mapped with the non-execute bits (XN/PXN/UXN) to prevent
On 18 November 2015 at 12:47, Leif Lindholm wrote:
> On Wed, Nov 18, 2015 at 11:29:15AM +, Leif Lindholm wrote:
>> On Wed, Nov 18, 2015 at 09:25:55AM +0100, Ard Biesheuvel wrote:
>> > This series fixes some issues that exist in the code with regard to how
>> >
On Wed, Nov 18, 2015 at 11:29:15AM +, Leif Lindholm wrote:
> On Wed, Nov 18, 2015 at 09:25:55AM +0100, Ard Biesheuvel wrote:
> > This series fixes some issues that exist in the code with regard to how
> > device
> > mappings are created. According to the architecture, read-sensitive devices
>
Bits 0 and 6 of the TTBRx system registers have different meanings
depending on whether a system implements the Multiprocessing
Extensions. So use separate memory attribute definitions for MP and
non-MP.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
Some MMU manipulation is dependent on the presence of the multiprocessing
extensions. So add a function that returns this information.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
Reviewed-by: Liming Gao
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Star Zeng
Sent: Tuesday, November 17, 2015 7:07 PM
To: edk2-devel@lists.01.org
Cc: Kinney, Michael D; Ni, Ruiyu; Gao, Liming
Subject: [edk2] [PATCH V2
On 12 November 2015 at 23:52, Daryl McDaniel wrote:
> AppPkg/Python-2.7.10: Present patch in three reviewable chunks.
>
> Due to the large number of changes, the previous submission of this patch
> was not reviewable. This patch set presents the changes as three
Dandan:
I have some comments.
1) gEfiSetupEnterGuid is not required. Library constructor() can directly do
the initialization.
2) gEfiIfrFrontPageGuid can be defined in Package.dec file, and can be referred
in C and VFR file.
3) The separate library is NULL class Library instance. They need
CatSPrint allocates return buffer for the caller. The caller doesn't have to
allocate one, and has to free the used buffers.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Cecil Sheng
---
.../UefiHandleParsingLib/UefiHandleParsingLib.c| 232
To prevent speculative intruction fetches from MMIO ranges that may
have side effects on reads, the architecture requires device mappings
to be created with the XN or UXN/PXN bits set (for the ARM/EL2 and
EL1&0 translation regimes, respectively.)
Note that, in the ARM case, this involves moving
Some users of this library (i.e., FVP-AArch64 and RTSM-A15_MPCore)
may be built to execute straight from NOR flash. Since device mappings
should have the XN attribute set (according to the architecture), mapping
the NOR flash as a device may prevent it from being executable.
Since the NOR flash
The ARM architecture version 7 and later mandates that device mappings
have the XN (non-executable) bit set, to prevent speculative instruction
fetches from read-sensitive regions. This implies that we should not map
regions as device if we want to execute from them, so the NOR region that
The function GcdAttributeToArmAttribute() is not used anywhere in the
code base, and is only defined for AARCH64 and not for ARM. It also
fails to set the bits for shareability and non-executability that we
require for correct operation. So remove it.
Contributed-under: TianoCore Contribution
This series fixes some issues that exist in the code with regard to how device
mappings are created. According to the architecture, read-sensitive devices
should be mapped with the non-execute bits (XN/PXN/UXN) to prevent speculative
instruction fetches from accessing those regions.
Changes since
On 11/18/15 09:25, Ard Biesheuvel wrote:
> The ARM architecture version 7 and later mandates that device mappings
> have the XN (non-executable) bit set, to prevent speculative instruction
> fetches from read-sensitive regions. This implies that we should not map
> regions as device if we want to
Reviewed-by: Liming Gao
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Star Zeng
Sent: Tuesday, November 17, 2015 7:07 PM
To: edk2-devel@lists.01.org
Cc: Kinney, Michael D; Gao, Liming
Subject: [edk2] [PATCH V2 01/12]
On 18 November 2015 at 10:02, Laszlo Ersek wrote:
> On 11/18/15 09:25, Ard Biesheuvel wrote:
>> The ARM architecture version 7 and later mandates that device mappings
>> have the XN (non-executable) bit set, to prevent speculative instruction
>> fetches from read-sensitive
Reviewed by: jiewen@intel.com
-Original Message-
From: Fan, Jeff
Sent: Wednesday, November 18, 2015 2:45 PM
To: edk2-devel@lists.01.org
Cc: Kinney, Michael D; Yao, Jiewen
Subject: [Patch 2/2] UefiCpuPkg/SmmFeatureLib: Check SmmFeatureControl by
Code_Access_Chk
Bit
On Wed, Nov 18, 2015 at 02:16:26PM +0100, Ard Biesheuvel wrote:
> Yesterday's 3-piece series is now a 7-piece series, since I spotted some other
> issues when looking at this code.
>
> Patch #1 replaces the bogus TTBR_WRITE_THROUGH_NO_ALLOC with something that is
> more aligned with what TTBRx
The "read" word in SerialPortWrite() header comment block should be
"write".
Cc: Michael D Kinney
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng
---
Star Zeng (3):
MdePkg SerialPortLib: Fix typo in SerialPortWrite()
PcAtChipsetPkg SerialIoLib: Fix typo in SerialPortWrite()
MdeModulePkg BaseSerialPortLib16550: Fix typo in SerialPortWrite()
MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c | 2 +-
The "read" word in SerialPortWrite() header comment block should be
"write".
Cc: Michael D Kinney
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng
---
The "read" word in SerialPortWrite() header comment block should be
"write".
Cc: Michael D Kinney
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng
---
On 2015/11/19 3:16, Kinney, Michael D wrote:
Star,
I think I am seeing some files with incorrect line endings in this patch series.
Please make sure you use the BaseTools\Scripts\PatchCheck.py script.
Sure about this, thanks for the reminder.
Star
Thanks,
Mike
-Original
Wrongly generate the patch with V2, sorry for the confusion, but it
should not impact the review to the patch.
Thanks,
Star
On 2015/11/19 8:58, Star Zeng wrote:
Cc: Michael D Kinney
Cc: Liming Gao
Contributed-under: TianoCore Contribution
On 2015/11/19 3:29, Kinney, Michael D wrote:
Star,
It looks like the function header comment block for SerialPortSetAttributes()
has the same issues in all patches in this series.
Please make sure to apply my feedback to patch 1/12 to all patches in the
series.
Agree the suggestion to
Cc: Michael D Kinney
Cc: Liming Gao
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng
---
MdePkg/Include/Protocol/SerialIo.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni
Cc: Feng Tian
---
MdeModulePkg/Library/BootLogoLib/BootLogoLib.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MdeModulePkg/Library/BootLogoLib/BootLogoLib.c
On 2015/11/19 3:09, Kinney, Michael D wrote:
Star,
There is a typo in SerialSetAttributes() function header comment block.
There are also a couple changes I recommend be done to SerialDxeInitialize()
and moving a couple global variable to top of file.
Agree the suggestion and will cover
Star,
Reviewed-by: Michael D Kinney
Thanks,
Mike
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Star
> Zeng
> Sent: Wednesday, November 18, 2015 4:58 PM
> To: edk2-devel@lists.01.org
> Cc: Kinney, Michael D
On 11/18/2015 04:25 PM, Ard Biesheuvel wrote:
The ARM architecture version 7 and later mandates that device mappings
have the XN (non-executable) bit set, to prevent speculative instruction
fetches from read-sensitive regions. This implies that we should not map
regions as device if we want to
On 19 November 2015 at 00:55, Heyi Guo wrote:
>
>
> On 11/18/2015 04:25 PM, Ard Biesheuvel wrote:
>>
>> The ARM architecture version 7 and later mandates that device mappings
>> have the XN (non-executable) bit set, to prevent speculative instruction
>> fetches from
Star,
The changes in this series look good to me.
Reviewed-by: Michael D Kinney
Mike
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Star
> Zeng
> Sent: Wednesday, November 18, 2015 5:24 PM
> To:
On 19 November 2015 at 05:48, Vladimir Olovyannikov
wrote:
>
>
>> -Original Message-
>> From: Ard Biesheuvel [mailto:ard.biesheu...@linaro.org]
>> Sent: Tuesday, November 17, 2015 11:03 PM
>> To: Mark Rutland
>> Cc: Vladimir Olovyannikov; edk2-devel@lists.01.org
>>
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