Current IsInSmm() method makes use of gEfiSmmBase2ProtocolGuid.InSmm() to
check if current processor is in SMM mode or not. But this is not correct
because gEfiSmmBase2ProtocolGuid.InSmm() can only detect if the caller is
running in SMRAM or from SMM driver. It cannot guarantee if the caller is
Hi Nate,
Thanks for the info. I will try this.
My Rangley platform has no onboard or offboard vga support. Com Port /
Serial console is used for display and communication.
I am booting the platform by coreboot with UEFI payload. I am trying to
install Ubuntu server OS.
When I boot into Shell, I
Add platform driver to produce gEdkiiPlatformVTdPolicyProtocolGuid for VT-d DXE
driver to consume.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: David Wei
CC: Mang Guo
---
.../PlatformVTdDxe/PlatformVTdDxe.c| 410 +
This platform VT-d Information PEIM produces gEdkiiVTdInfoPpiGuid to expose
DMAR (DMA Remapping Table).
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: David Wei
CC: Mang Guo
---
.../PlatformVTdInfoPei/PlatformVTdInfoPei.c| 334 +
This platform VT-d Information PEIM produces gEdkiiVTdInfoPpiGuid to expose
DMAR (DMA Remapping Table).
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: David Wei
CC: Mang Guo
---
.../PlatformVTdInfoPei/PlatformVTdInfoPei.c| 334 +
Reviewed-by: Liming Gao
>-Original Message-
>From: Bi, Dandan
>Sent: Thursday, July 12, 2018 10:08 PM
>To: edk2-devel@lists.01.org
>Cc: Gao, Liming ; Zeng, Star
>Subject: [patch] MdeModulePkg/PerformanceMeasurement.h: Correct the
>license
>
>Corrected to use the BSD license.
>
>Cc:
Fixes: https://bugzilla.tianocore.org/show_bug.cgi?id=994
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Yonghong Zhu
---
BaseTools/Source/C/GenFw/Elf32Convert.c | 2 +-
BaseTools/Source/C/GenFw/Elf64Convert.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff
Hi Dhanasekar,
There is nothing pre-built and off-the-shelf ready today. But we do have a
generalized infrastructure for open source Intel UEFI platforms called
MinPlatformPkg. Please see the following:
https://github.com/tianocore/edk2-platforms/tree/devel-MinPlatform/Platform/Intel
Notice
Hi Laszlo,
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Laszlo Ersek
> Sent: Friday, July 13, 2018 6:14 AM
> To: Dong, Eric ; edk2-devel@lists.01.org
> Cc: Ni, Ruiyu
> Subject: Re: [edk2] [Patch v2 1/3] UefiCpuPkg/MpInitLib: Relocate
Add the IPv6 stack to ArmVirtQemu with a cumulative port of the following
OvmfPkg commits:
* 36c6413f76e5 "OvmfPkg: enable the IPv6 support", 2014-12-19
* 96302b80d90e "OvmfPkg: Enable Network2 Shell Commands for IPv6",
2016-03-08
* 6d0f8941bdc2 "OvmfPkg: always resolve
We already resolve a number of networking-related library classes in
ArmVirt.dsc.inc; follow suit with HttpLib.
Cc: Ard Biesheuvel
Cc: Julien Grall
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1007
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek
---
Repo: https://github.com/lersek/edk2.git
Branch: armvirt_ipv6_bz1007
Tested the "-D NETWORK_IP6_ENABLE" ArmVirtQemu build with PXEv4, PXEv6,
HTTPv4, HTTPv6 netboot.
Build-tested the ArmVirtQemuKernel build (32- and 64-bit), and the
ArmVirtXen build (64-bit).
Ard, if the series is OK, can you
Good day developers,
While checking out which edk2 modules request being shadowed, I came across
DxeIplPeim being one of them, however I am not sure why it was designed this
way.
If the Boot Mode is != S3, the module will register for shadowing and
immediately return during the pre-memory
On 07/12/18 23:59, Laszlo Ersek wrote:
> On 07/12/18 12:49, Eric Dong wrote:
>> Read uCode from memory has better performance than from flash.
>> But it needs extra effort to let BSP copy uCode from flash to
>> memory. Also BSP already enable cache in SEC phase, so it use
>> less time to relocate
On 07/12/18 12:49, Eric Dong wrote:
> The SDM requires only one thread per core to load the
> microcode.
>
> This change enables this solution.
>
> Cc: Laszlo Ersek
> Cc: Ruiyu Ni
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Eric Dong
> ---
>
On 07/12/18 12:49, Eric Dong wrote:
> Search uCode costs much time, if AP has same processor type
> with BSP, AP can use BSP saved uCode info to get better performance.
>
> This change enables this solution.
>
> Cc: Laszlo Ersek
> Cc: Ruiyu Ni
> Contributed-under: TianoCore Contribution
On 07/12/18 12:49, Eric Dong wrote:
> Read uCode from memory has better performance than from flash.
> But it needs extra effort to let BSP copy uCode from flash to
> memory. Also BSP already enable cache in SEC phase, so it use
> less time to relocate uCode from flash to memory. After
>
On 07/12/18 14:07, Yao, Jiewen wrote:
> thanks laszlo
> I like your idea to eliminate the code duplication and fix all the problem by
> adding a new api in uefi lib.
>
> If there is urgency to fix this specific issue, I have no problem on the
> enhancement.
>
> Reviewed by :
Reviewed-by: Jaben Carsey
> -Original Message-
> From: Fu, Siyuan
> Sent: Wednesday, July 11, 2018 5:46 PM
> To: Wu, Jiaxin ; edk2-devel@lists.01.org
> Cc: Ye, Ting ; Carsey, Jaben
> Subject: RE: [Patch] ShellPkg/TftpDynamicCommand: Fix the potential
> assertion and memory leak issue.
>
On 12 July 2018 at 09:39, Marcin Wojtas wrote:
> For upcoming patches there is a need to get the CP110 base address,
> introduce according getter function for it.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas
> ---
>
On 12 July 2018 at 09:39, Marcin Wojtas wrote:
> ICU (Interrupt Consolidation Unit) is a mechanism,
> that allows to send a message-based interrupts from the
> CP110 unit (South Bridge) to the Application Processor
> hardware block. After dispatching the interrupts in the
> GIC are generated.
>
>
On 12 July 2018 at 16:08, Dandan Bi wrote:
> Corrected to use the BSD license.
>
> Cc: Liming Gao
> Cc: Star Zeng
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Dandan Bi
This needs a Reviewed-by from someone at Microsoft.
> ---
>
Corrected to use the BSD license.
Cc: Liming Gao
Cc: Star Zeng
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Dandan Bi
---
MdeModulePkg/Include/Guid/PerformanceMeasurement.h | 31 +++---
1 file changed, 9 insertions(+), 22 deletions(-)
diff --git
thanks laszlo
I like your idea to eliminate the code duplication and fix all the problem by
adding a new api in uefi lib.
If there is urgency to fix this specific issue, I have no problem on the
enhancement.
Reviewed by : jiewen@intel.com
thank you!
Yao, Jiewen
> 在
On Thu, Jul 12, 2018 at 12:59:16PM +0200, Marcin Wojtas wrote:
> Hi Leif,
>
>
>
> 2018-07-12 12:35 GMT+02:00 Leif Lindholm :
> > On Thu, Jul 12, 2018 at 09:40:00AM +0200, Marcin Wojtas wrote:
> >> ICU (Interrupt Consolidation Unit) is a mechanism,
> >> that allows to send-message based
Hi Leif,
2018-07-12 12:35 GMT+02:00 Leif Lindholm :
> On Thu, Jul 12, 2018 at 09:40:00AM +0200, Marcin Wojtas wrote:
>> ICU (Interrupt Consolidation Unit) is a mechanism,
>> that allows to send-message based interrupts from the
>> CP110 unit (South Bridge) to the Application Processor
>>
Hi Laszlo,
> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Thursday, July 12, 2018 5:58 PM
> To: Dong, Eric ; edk2-devel@lists.01.org
> Subject: Re: [edk2] [Patch 0/3] Optimize load uCode performance
>
> On 07/11/18 13:07, Eric Dong wrote:
> > Use below three
Hi Laszlo,
> -Original Message-
> From: Laszlo Ersek [mailto:ler...@redhat.com]
> Sent: Thursday, July 12, 2018 5:26 PM
> To: Dong, Eric ; edk2-devel@lists.01.org
> Cc: Ni, Ruiyu
> Subject: Re: [edk2] [Patch 1/3] UefiCpuPkg/MpInitLib: Relocate uCode to
> memory to save time.
>
> Hi
Use below three rules to optimize load uCode performance:
1. Let BSP relocate uCode from flash to memory for better performance.
2. BSP caches the CPU ID and address of uCode so AP doesnt need to look
for the uCode again if the CPU ID is same as BSPs.
3. Only apply uCode in one thread of a
Search uCode costs much time, if AP has same processor type
with BSP, AP can use BSP saved uCode info to get better performance.
This change enables this solution.
Cc: Laszlo Ersek
Cc: Ruiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong
---
The SDM requires only one thread per core to load the
microcode.
This change enables this solution.
Cc: Laszlo Ersek
Cc: Ruiyu Ni
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong
---
UefiCpuPkg/Library/MpInitLib/Microcode.c | 9 +
1 file changed, 9
Read uCode from memory has better performance than from flash.
But it needs extra effort to let BSP copy uCode from flash to
memory. Also BSP already enable cache in SEC phase, so it use
less time to relocate uCode from flash to memory. After
verification, if system has more than one processor, it
On Thu, Jul 12, 2018 at 09:40:00AM +0200, Marcin Wojtas wrote:
> ICU (Interrupt Consolidation Unit) is a mechanism,
> that allows to send-message based interrupts from the
> CP110 unit (South Bridge) to the Application Processor
> hardware block. After dispatching the interrupts in the
> GIC are
Hi Laszlo,
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of
> Laszlo Ersek
> Sent: Thursday, July 12, 2018 5:42 PM
> To: Dong, Eric ; edk2-devel@lists.01.org
> Cc: Ni, Ruiyu
> Subject: Re: [edk2] [Patch 2/3] UefiCpuPkg/MpInitLib: Use BSP uCode
On 07/11/18 13:07, Eric Dong wrote:
> Use below three rules to optimize load uCode performance:
> 1. Let BSP relocate uCode from flash to memory for better performance.
> 2. BSP caches the CPU ID and address of uCode so AP doesn’t need to look
>for the uCode again if the CPU ID is same as
I've got two comments:
On 07/11/18 13:07, Eric Dong wrote:
> SDM requires one core only needs to load uCode once.
(1) This is a very confusing typo ("one core only").
I totally missed the point until I re-read the cover letter of the
patch. In the cover letter, you say:
> 3. Only apply uCode
On 07/11/18 13:07, Eric Dong wrote:
> Search uCode costs much time, if AP has same processor type
> with BSP, AP can use BSP saved uCode info to get better performance.
>
> This change enables this solution.
>
> Cc: Laszlo Ersek
> Cc: Ruiyu Ni
> Contributed-under: TianoCore Contribution
Hi Eric,
On 07/11/18 13:07, Eric Dong wrote:
> Read uCode from memory has better performance than from flash.
> But it needs extra effort to let BSP copy uCode from flash to
> memory. Also BSP already enable cache in SEC phase, so it use
> less time to relocate uCode from flash to memory. After
>
在 11/07/2018 22:19, Ard Biesheuvel 写道:
> On 4 July 2018 at 09:51, Ming Huang wrote:
>> The edk2 commit bacfd6e let CpuDxe running latter.
>> CpuDxe is needed by gDS->SetMemorySpaceAttributes, and
>> gDS->SetMemorySpaceAttributes is invoked by some drivers.
>>
>> This issue can solve by adding
Hi Ard,
2018-07-12 9:57 GMT+02:00 Ard Biesheuvel :
>
> On 12 July 2018 at 09:40, Marcin Wojtas wrote:
> > ICU (Interrupt Consolidation Unit) is a mechanism,
> > that allows to send-message based interrupts from the
> > CP110 unit (South Bridge) to the Application Processor
> > hardware block.
On 12 July 2018 at 09:39, Marcin Wojtas wrote:
> As a preparation for adding the ICU (Interrupt Consolidation
> Unit) library implementation a correct CP110 count is required.
> Do it for Armada70x0Db and fix depending XHCI/AHCI PCD's accordingly.
>
> Contributed-under: TianoCore Contribution
On 12 July 2018 at 09:40, Marcin Wojtas wrote:
> ICU (Interrupt Consolidation Unit) is a mechanism,
> that allows to send-message based interrupts from the
> CP110 unit (South Bridge) to the Application Processor
> hardware block. After dispatching the interrupts in the
> GIC are generated.
>
>
ICU (Interrupt Consolidation Unit) is a mechanism,
that allows to send-message based interrupts from the
CP110 unit (South Bridge) to the Application Processor
hardware block. After dispatching the interrupts in the
GIC are generated.
This patch adds a basic version of the library, that
allows to
ICU (Interrupt Consolidation Unit) is a mechanism,
that allows to send a message-based interrupts from the
CP110 unit (South Bridge) to the Application Processor
hardware block. After dispatching the interrupts in the
GIC are generated.
This patch adds a basic version of the library, that
allows
This patch introduces new library callback (ArmadaSoCDescIcuGet ()),
which dynamically allocates and fills MV_SOC_ICU_DESC structure with
the SoC description of ICU (Interrupt Consolidation Unit).
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
This patch enables the ICU (Interrupt Consolidation Unit)
configuration in the common platform initialization driver.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 1 +
For upcoming patches there is a need to get the CP110 base address,
introduce according getter function for it.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Silicon/Marvell/Include/Library/ArmadaSoCDescLib.h
| 6 ++
Hi,
This patchset introduces support for ICU (Interrupt Consolidation
Unit) of Armada7k8k SoC family. This unit allows to send a
message-based interrupts from the CP110 unit (South Bridge)
to the Application Processor hardware block. After dispatching
the interrupts in the GIC are generated.
A
As a preparation for adding the ICU (Interrupt Consolidation
Unit) library implementation a correct CP110 count is required.
Do it for Armada70x0Db and fix depending XHCI/AHCI PCD's accordingly.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas
---
Reviewed-by: jiewen@intel.com
> -Original Message-
> From: Gao, Liming
> Sent: Tuesday, July 10, 2018 9:29 PM
> To: edk2-devel@lists.01.org
> Cc: Yao, Jiewen
> Subject: [Patch edk2-platforms\devel-MinPlatform] PurleyOpenBoardPkg:
> Update batch file not to check the return value of
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