cient information, please let me know.
Thanks,
Naga Sureshkumar Relli
is
contiguous or not?
Based on that I can switch my driver to work in dma or non-dma mode for ubifs
use.
Thanks,
Naga Sureshkumar Relli
-Original Message-
From: Christoph Hellwig [mailto:h...@infradead.org]
Sent: Friday, October 21, 2016 6:45 PM
To: Richard Weinberger <rich...@nod.at>
Cc: Chr
with dma but not with 4.6?
Now a days, most of QSPI controllers have internal dmas.
Could you please provide some info regrading this dma issue?
We can change our controller driver to operate in IO mode (doesn't use dma) but
performance wise it's not a preferred one.
Thanks,
Naga Sureshkumar
- Increasing page_size, sector_size, erase_size and toatal flash
size as and when required.
- Dividing address by 2
- Updating spi->master->flags for qspi driver to change CS
Signed-off-by: Naga Sureshkumar Relli <nagas...@xilinx.com>
---
Changes for v4:
- rename isparallel to stripe
Ch
please suggest me to do any further debugging?
Thanks,
Naga Sureshkumar Relli
This email and any attachments are intended for the sole use of the named
recipient(s) and contain(s) confidential information that may be proprietary,
privileged or copyrighted under applicable law. If you are not
Hi Richard,
-Original Message-
From: Richard Weinberger [mailto:rich...@nod.at]
Sent: Wednesday, October 26, 2016 2:44 AM
To: Naga Sureshkumar Relli <nagas...@xilinx.com>; Christoph Hellwig
<h...@infradead.org>
Cc: dw...@infradead.org; computersforpe...@gmail.com; dedeki.
this on top of latest git-hub master.
kindly suggest us the way, so that we can proceed further to add this support.
Naga Sureshkumar Relli (4):
spi: adding support for data stripe feature in core
mtd: add spi_device instance to spi_nor struct
mtd: spi-nor: add stripe support
spi: zynqmp: gqspi: add
This patch adds struct spi_device instacne to the spi_nor structure.
Signed-off-by: Naga Sureshkumar Relli <nagas...@xilinx.com>
---
Changes for v4:
- No change
Changes for v3:
- No change
Changes for v2:
- This is new patch, basically splitted on request of Mark Brown
---
drivers/mtd/d
This patch adds support of dual parallel mode configuration
for Zynq Ultrascale+ MPSoC GQSPI controller driver.
Signed-off-by: Naga Sureshkumar Relli <nagas...@xilinx.com>
---
Changes for v4:
- No changes
Changes for v3:
- No change
Changes for v2:
- No change
---
drivers/spi/spi-
bytes i.e. 1, 3, 5,.. are transmitted on upper data bus.
To support data stripe; need to assert both chip selects once.
This is achieved through API SPI_MASTER_BOTH_CS.
Signed-off-by: Naga Sureshkumar Relli <nagas...@xilinx.com>
---
Changes for v4:
- No changes, sending the previous one as is
Hi Mark and Cyrille,
> -Original Message-
> From: Cyrille Pitchen [mailto:cyrille.pitc...@atmel.com]
> Sent: Tuesday, December 06, 2016 4:30 PM
> To: Naga Sureshkumar Relli <nagas...@xilinx.com>; broo...@kernel.org;
> michal.si...@xilinx.com; Soren Brinkmann <so
Hi Cyrille,
> I have not finished to review the whole series yet but here some first
> comments:
Thanks for reviewing these patch series.
>
> Le 27/11/2016 à 09:33, Naga Sureshkumar Relli a écrit :
> > This patch adds stripe support and it is needed for GQSPI parallel
>
Hi Cyrille,
> -Original Message-
> From: Cyrille Pitchen [mailto:cyrille.pitc...@atmel.com]
> Sent: Monday, December 05, 2016 6:34 PM
> To: Naga Sureshkumar Relli <nagas...@xilinx.com>; broo...@kernel.org;
> michal.si...@xilinx.com; Soren Brinkmann <sor...@xilin
Hi Cyrille,
> > Hi Cyrille,
> >
> >> I have not finished to review the whole series yet but here some
> >> first
> >> comments:
> >
> > Thanks for reviewing these patch series.
> >
> >>
> >> Le 27/11/2016 à 0
This patch series adds the basic driver support for Arasan NAND Flash
controller.
We are reinitiating the patch series by fixing the comments given by
Boris and Rob.
Previous Patch reference:
https://lkml.org/lkml/2017/1/8/245
Naga Sureshkumar Relli (2):
mtd: arasan: Add device tree binding
Added the basic driver for Arasan NAND Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw ECC and upto 24bit
correction.
Signed-off-by: Naga Sureshkumar Relli <nagas...@xilinx.com>
Signed-off-by: Punnaiah Choudary Kalluri <punn...@xilinx.com>
---
Changes in v9:
- Ad
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Naga Sureshkumar Relli <nagas...@xilinx.com>
Signed-off-by: Punnaiah Choudary Kalluri <punn...@xilinx.com>
---
Changes in v9:
- None
Changes in v8:
- Updated compatible and clock-names as per Bo
Added the basic driver for Arasan NAND Flash Controller used in
Zynq UltraScale+ MPSoC. It supports only Hw ECC and upto 24bit
correction.
Signed-off-by: Naga Sureshkumar Relli <nagas...@xilinx.com>
Signed-off-by: Punnaiah Choudary Kalluri <punn...@xilinx.com>
---
Changes in v8:
-
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Naga Sureshkumar Relli <nagas...@xilinx.com>
Signed-off-by: Punnaiah Choudary Kalluri <punn...@xilinx.com>
---
Changes in v8:
- Updated compatible and clock-names as per Boris comments
C
This patch series adds the basic driver support for Arasan NAND Flash
controller.
We are reinitiating the patch series by fixing the comments given by
Boris and Rob.
Previous Patch reference:
https://lkml.org/lkml/2017/1/8/245
Naga Sureshkumar Relli (2):
mtd: arasan: Add device tree binding
Hi Philippe,
Thanks for the review.
I will update it in next version.
Thanks,
Naga Sureshkumar Relli.
> -Original Message-
> From: Philippe Ombredanne [mailto:pombreda...@nexb.com]
> Sent: Thursday, December 14, 2017 2:42 PM
> To: Naga Sureshkumar Relli <nagas...@x
ail.com
> Cc: boris.brezil...@bootlin.com; rog...@ti.com; lee.jo...@linaro.org;
> alexandre.belloni@free-
> electrons.com; nicolas.fe...@microchip.com; la...@linux-mips.org;
> a...@thorsis.com; linux-
> ker...@vger.kernel.org; Naga Sureshkumar Relli <nagas...@xilinx.com>
&
> -Original Message-
> From: Julia Cartwright [mailto:ju...@ni.com]
> Sent: Monday, May 7, 2018 10:23 PM
> To: Naga Sureshkumar Relli <nagas...@xilinx.com>
> Cc: nagasureshkumarre...@gmail.com; boris.brezil...@bootlin.com;
> rog...@ti.com;
> lee.jo...@linaro.
Hi Boris,
Thanks for letting us know the similar stuff.
I will look into it and if any update is required, I will update as per that.
Thanks,
Naga Sureshkumar Relli
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Friday, June 8, 2018
Hi Miquel,
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Friday, June 8, 2018 1:30 AM
> To: Naga Sureshkumar Relli
> Cc: boris.brezil...@bootlin.com; rich...@nod.at; w...@infradead.org;
> computersforpe...@gmail.com; marek.va...@
Hi Miquel,
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Friday, June 8, 2018 6:06 PM
> To: Naga Sureshkumar Relli
> Cc: boris.brezil...@bootlin.com; rich...@nod.at; w...@infradead.org;
> computersforpe...@gmail.com; marek.va...@
Hi Miquel,
Thanks for the review.
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Thursday, June 7, 2018 9:12 PM
> To: Naga Sureshkumar Relli
> Cc: boris.brezil...@bootlin.com; rich...@nod.at; w...@infradead.org;
> computers
.
This latest series make use of ->exec_op() . Referenced the marvel driver
as pointed by Miquel.
Naga Sureshkumar Relli (4):
Devicetree: Add pl353 smc controller devicetree binding information
memory: pl353: Add driver for arm pl353 static memory controller
Documentation: nand: pl353: Add documentat
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v9:
- Addressed commens given by Randy Dunlap and Miquel Raynal
Changes in v8:
- None
Changes in v7:
- Corrected clocks description
- prefixed '#' for address and size cells
Add driver for arm pl353 static memory controller. This controller is
used in xilinx zynq soc for interfacing the nand and nor/sram memory
devices.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v9:
- Addressed the comments given by Julia Cartwright to the v8 series.
Changes in v8:
- None
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in xilinx zynq soc for interfacing
the nand flash memory.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v9:
- Addressed the below comments given by Miquel
- instead of using
Added notes about the controller and driver
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v9:
- Addressed the comments given by Miquel and Randy
Changes in v8
- None
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- Fixed the review comments
Changes in v4:
- None
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, June 25, 2018 2:24 AM
> To: Naga Sureshkumar Relli
> Cc: rich...@nod.at; dw...@infradead.org; computersforpe...@gmail.com;
> marek.va...@gmail.com; f.faine
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, June 25, 2018 2:10 AM
> To: Naga Sureshkumar Relli
> Cc: rich...@nod.at; dw...@infradead.org; computersforpe...@gmail.com;
> marek.va...@gmail.com; f.faine
Hi Boris,
> -Original Message-
> From: Naga Sureshkumar Relli [mailto:nagas...@xilinx.com]
> Sent: Monday, June 25, 2018 2:30 PM
> To: Boris Brezillon
> Cc: rich...@nod.at; dw...@infradead.org; computersforpe...@gmail.com;
> marek.va...@gmail.com; f.faine
Hi Linus,
> -Original Message-
> From: Linus Walleij [mailto:linus.wall...@linaro.org]
> Sent: Monday, July 2, 2018 7:18 PM
> To: Naga Sureshkumar Relli
> Cc: Boris Brezillon ; Richard Weinberger
> ;
> David Woodhouse ; Brian Norris
> ; Mark Vasut ; Florian
>
Hi Miquel,
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Thursday, June 28, 2018 12:45 PM
> To: Naga Sureshkumar Relli
> Cc: boris.brezil...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; mar
Hi Miquel,
Thanks for reviewing this patch series.
> -Original Message-
> From: Miquel RAYNAL [mailto:miquel.ray...@free-electrons.com]
> Sent: Friday, December 29, 2017 2:25 AM
> To: Naga Sureshkumar Relli <nagas...@xilinx.com>
> Cc: boris.brezil...@free-electron
-...@lists.infradead.org;
> linux-kernel@vger.kernel.org;
> nagasureshkumarre...@gmail.com
> Subject: Re: [LINUX PATCH v9 2/4] memory: pl353: Add driver for arm pl353
> static
> memory controller
>
> Hi Naga,
>
> On Wed, 6 Jun 2018 13:19:40 +0530, Naga Sureshkumar Rel
Hi Miquel,
Thanks for the review.
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Monday, July 30, 2018 12:46 AM
> To: Naga Sureshkumar Relli
> Cc: boris.brezil...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computers
Add driver for arm pl353 static memory controller nand interface with
HW ECC support. This controller is used in Xilinx Zynq SoC for
interfacing the NAND flash memory.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v12:
- Rebased the driver on top of v4.19 nand tree
- Removed
Add the basic driver for Arasan NAND Flash Controller used in
Zynq UltraScale+ MPSoC. It supports HW ECC and upto 24bit
correction.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v10:
- Implemented ->exec_op() interface.
- Converted the driver to nand_scan().
Changes in v9:
- Ad
This patch series adds the basic driver support for Arasan NAND Flash
controller.
We are reinitiating the patch series by fixing the comments given by
Miquel and Boris.
Major changes are exec_op() implementation related.
Rebased to 4.19 nand tree.
Tested MT29F32G08ABCDBJ4.
Naga Sureshkumar Relli
This patch adds the dts binding document for arasan nand flash
controller.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v10:
- None
Changes in v9:
- None
Changes in v8:
- Updated compatible and clock-names as per Boris comments
Changes in v7:
- Corrected the acronyms those should
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, August 21, 2018 11:30 AM
> To: Naga Sureshkumar Relli
> Cc: miquel.ray...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; mar
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, August 20, 2018 6:03 PM
> To: Naga Sureshkumar Relli
> Cc: miquel.ray...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; mar
Hi Boris,
Thanks for the review.
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, August 20, 2018 10:10 PM
> To: Naga Sureshkumar Relli
> Cc: miquel.ray...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computers
Hi Miquel,
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Tuesday, August 21, 2018 3:23 PM
> To: Naga Sureshkumar Relli
> Cc: Boris Brezillon ; rich...@nod.at;
> dw...@infradead.org;
> computersforpe...@gmail.com; marek.va...@
Hi Miquel,
Thanks for the review.
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Friday, August 17, 2018 8:08 PM
> To: Naga Sureshkumar Relli
> Cc: boris.brezil...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computers
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, August 20, 2018 2:24 PM
> To: Naga Sureshkumar Relli
> Cc: rich...@nod.at; abs...@codeaurora.org; linux-kernel@vger.kernel.org;
> marek.va...@gmail.com; kyungmi
Hi Boris,
Thanks for the review.
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Friday, August 17, 2018 11:29 PM
> To: Naga Sureshkumar Relli
> Cc: miquel.ray...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computers
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, August 20, 2018 5:40 PM
> To: Naga Sureshkumar Relli
> Cc: rich...@nod.at; abs...@codeaurora.org; linux-kernel@vger.kernel.org;
> marek.va...@gmail.com; kyungmi
Hi Miquel,
Could you please provide your review comments?
I will address if any.
Thanks,
Naga Sureshkumar Relli.
> -Original Message-
> From: Naga Sureshkumar Relli [mailto:naga.sureshkumar.re...@xilinx.com]
> Sent: Wednesday, July 11, 2018 1:07 PM
> To: boris.brezil...
Hi Miquel,
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Monday, July 23, 2018 1:01 PM
> To: Naga Sureshkumar Relli
> Cc: boris.brezil...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; mar
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, August 20, 2018 10:10 PM
> To: Naga Sureshkumar Relli
> Cc: miquel.ray...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; mar
Relli.
> -Original Message-
> From: Linus Walleij [mailto:linus.wall...@linaro.org]
> Sent: Friday, July 13, 2018 1:07 PM
> To: Naga Sureshkumar Relli
> Cc: Boris Brezillon ; Richard Weinberger
> ;
> David Woodhouse ; Brian Norris
> ; Mark Vasut ; Florian
>
Add driver for arm pl353 static memory controller. This controller is used in
Xilinx Zynq SoC for interfacing the NAND and NOR/SRAM memory devices.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v11:
- Added amba device registration and removed platform device, since it
is an ARM
Add driver for arm pl353 static memory controller nand interface with HW ECC
support. This controller is used in Xilinx Zynq SoC for interfacing the NAND
flash memory.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v11:
- Removed Documentation patch and added the required info in driver
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v11:
- Changed the subject to dt-bindings
- Restuctured dt binings to represent peripherals based on ranges property
as suggested by Boris.
Now the new bindings uses cs
series make use of ->exec_op().
Naga Sureshkumar Relli (3):
dt-bindings: memory: Add pl353 smc controller devicetree binding
information
memory: pl353: Add driver for arm pl353 static memory controller
mtd: rawnand: pl353: Add basic driver for arm pl353 smc nand interface
.../bindi
Hi Miquel,
Thanks for clarifying the queries.
I will send next version by addressing all the comments given.
Thanks,
Naga Sureshkumar Relli.
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Tuesday, March 27, 2018 3:24 AM
> To: Naga Sures
This patch adds runtime pm functions.
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.da...@xilinx.com>
Signed-off-by: Naga Sureshkumar Relli <nagas...@xilinx.com>
---
drivers/spi/spi-zynqmp-gqspi.c | 86 ++
1 file changed, 70 insertions(+),
Hi Randy,
Thanks for reviewing the patch.
I will address below mentioned comments in next version of patch.
Thanks,
Naga Sureshkumar Relli.
> -Original Message-
> From: Randy Dunlap [mailto:rdun...@infradead.org]
> Sent: Thursday, March 15, 2018 5:27 AM
> To: nagas
h...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; marek.va...@gmail.com;
> cyrille.pitc...@wedev4u.fr; linux-...@lists.infradead.org; linux-
> ker...@vger.kernel.org; Michal Simek <mich...@xilinx.com>; Punnaiah
> Choudary Kalluri <punn...@xilinx.com>; Naga S
h...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; marek.va...@gmail.com;
> cyrille.pitc...@wedev4u.fr; linux-...@lists.infradead.org; linux-
> ker...@vger.kernel.org; Michal Simek <mich...@xilinx.com>; Punnaiah
> Choudary Kalluri <punn...@xilinx.com>; Naga S
Hi Linus,
> -Original Message-
> From: Linus Walleij [mailto:linus.wall...@linaro.org]
> Sent: Thursday, June 28, 2018 11:44 PM
> To: Naga Sureshkumar Relli
> Cc: Boris Brezillon ; Richard Weinberger
> ;
> David Woodhouse ; Brian Norris
> ; Mark Vasut ; Floria
Add pl353 static memory controller devicetree binding information.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v10:
- Corrected the typos like "should be" to "Must be" and nand to NAND etc..
- Removed padding to describe size-cells and address-cells
- Removed ti
Added notes about the controller and driver.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v10:
- None
Changes in v9:
- Addressed the comments given by Miquel and Randy
Changes in v8
- None
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- Fixed the review comments
Changes
Add driver for arm pl353 static memory controller nand interface with HW ECC
support. This controller is used in Xilinx Zynq SoC for interfacing the NAND
flash memory.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in 10:
- Typos correction like nand to NAND and soc to SOC etc..
- Defined
Add driver for arm pl353 static memory controller. This controller is used in
Xilinx Zynq SoC for interfacing the NAND and NOR/SRAM memory devices.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v10:
- Corrected typos in commit message like xilinx to Xilinx
- Added SoC specific
series make use of ->exec_op().
Referenced the marvel driver as pointed by Miquel.
Naga Sureshkumar Relli (4):
Devicetree: Add pl353 smc controller devicetree binding information
memory: pl353: Add driver for arm pl353 static memory controller
Documentation: nand: pl353: Add documentat
Hi Linus,
Thanks for the review.
> -Original Message-
> From: Linus Walleij [mailto:linus.wall...@linaro.org]
> Sent: Thursday, June 28, 2018 12:24 PM
> To: Naga Sureshkumar Relli
> Cc: Boris Brezillon ; Richard Weinberger
> ;
> David Woodhouse ; Brian Norris
>
Hi Linux,
Thanks for the review.
> -Original Message-
> From: Linus Walleij [mailto:linus.wall...@linaro.org]
> Sent: Thursday, June 28, 2018 12:19 PM
> To: Naga Sureshkumar Relli
> Cc: Boris Brezillon ; Richard Weinberger
> ;
> David Woodhouse ; Brian Norris
>
Hi Miquel,
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Thursday, June 28, 2018 12:45 PM
> To: Naga Sureshkumar Relli
> Cc: boris.brezil...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; mar
Sorry for the wrong name.
> -Original Message-
> From: Naga Sureshkumar Relli [mailto:nagas...@xilinx.com]
> Sent: Thursday, June 28, 2018 5:41 PM
> To: Linus Walleij
> Cc: Boris Brezillon ; Richard Weinberger
> ;
> David Woodhouse ; Brian Norris
> ; Mark Vas
Hi Linus,
> -Original Message-
> From: Linus Walleij [mailto:linus.wall...@linaro.org]
> Sent: Thursday, June 28, 2018 1:14 PM
> To: Naga Sureshkumar Relli
> Cc: Boris Brezillon ; Richard Weinberger
> ;
> David Woodhouse ; Brian Norris
> ; Mark Vasut ; Floria
Hi Miquel,
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Wednesday, June 27, 2018 8:53 PM
> To: Naga Sureshkumar Relli
> Cc: boris.brezil...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; mar
Hi Miquel,
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Monday, October 29, 2018 3:21 PM
> To: Naga Sureshkumar Relli
> Cc: boris.brezil...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; mar
Hi Boris,
Sorry for the late reply.
I am busy with some other work.
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Thursday, October 4, 2018 1:09 AM
> To: Naga Sureshkumar Relli
> Cc: miquel.ray...@bootlin.com; ric
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Thursday, October 4, 2018 1:17 AM
> To: Naga Sureshkumar Relli
> Cc: miquel.ray...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; mar
Add the basic driver for Arasan NAND Flash Controller used in
Zynq UltraScale+ MPSoC. It supports HW ECC and upto 24bit correction
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v12:
- Rebased on top of 4.20
- As suggested by Boris, instead of checking the command using nfc_op.cmds
This patch adds the dts binding document for arasan nand flash controller
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v12:
- Removed interrupt-parent description as it is implied as suggested by
Rob Herring
- Added missing ';' as required
Changes in v11:
- Updated compatible
, it also adds a new varaible called mode in struct
nand_sdr_timings,
which will give directly the sdr operating mode. and it is useful for some
controllers,
where we can set direclty the operating mode instead of timings.
Naga Sureshkumar Relli (3):
dt-bindings: mtd: arasan: Add device tree
Some NAND controllers need SDR timing mode value, instead of timings.
i.e the NAND controller will change its operating mode by
just configuring the sdr timing mode number. So add a mode field to
struct nand_sdr_timings
Signed-off-by: Naga Sureshkumar Relli
Reviewed-by: Boris Brezillon
Hi Boris & Martin,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Monday, November 12, 2018 4:28 PM
> To: Martin Lund
> Cc: Naga Sureshkumar Relli ; miquel.ray...@bootlin.com;
> rich...@nod.at; dw...@infradead.org; compu
Hi,
> -Original Message-
> From: Michal Simek [mailto:michal.si...@xilinx.com]
> Sent: Friday, November 16, 2018 6:04 PM
> To: Martin Lund ; Naga Sureshkumar Relli
>
> Cc: boris.brezil...@bootlin.com; miquel.ray...@bootlin.com; rich...@nod.at;
> David
>
mtd->ecc_stats.corrected += stat;
> + max_bitflips = max_t(unsigned int, max_bitflips,
> + stat);
> + }
> + }
> + }
> +
> + return max_bitflips;
> +}
> +
> +
Thanks,
Naga Sureshkumar Relli.
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Friday, November 9, 2018 1:38 PM
> To: Naga Sureshkumar Relli
> Cc: miquel.ray...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; mar
Hi Miquel,
> -Original Message-
> From: Miquel Raynal [mailto:miquel.ray...@bootlin.com]
> Sent: Friday, November 9, 2018 6:24 PM
> To: Naga Sureshkumar Relli
> Cc: Boris Brezillon ; rich...@nod.at;
> dw...@infradead.org;
> computersforpe...@gmail.com; marek.va
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Friday, November 9, 2018 11:59 AM
> To: Naga Sureshkumar Relli
> Cc: miquel.ray...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; mar
Hi Boris & Miquel,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Saturday, September 22, 2018 1:43 PM
> To: Miquel Raynal
> Cc: Naga Sureshkumar Relli ; rich...@nod.at;
> dw...@infradead.org;
> computersfor
Add the basic driver for Arasan NAND Flash Controller used in
Zynq UltraScale+ MPSoC. It supports HW ECC and upto 24bit correction
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v11:
Fixed the below commits given by Boris
- implemented separate hooks for each pattern
- Changed
Some NAND controllers needs sdr timing mode value, instead of
timings parameters. i.e the NAND controller will change its operating
mode by just configuring the sdr timing mode number. so add mode parameter
in struct nand_sdr_timings.
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v11
This patch adds the dts binding document for arasan nand flash controller
Signed-off-by: Naga Sureshkumar Relli
---
Changes in v11:
- Updated compatible description as suggested by Boris
- Removed arasan-has-dma property
Changes in v10:
- None
Changes in v9:
- None
Changes in v8:
- Updated
, it also adds a new varaible called mode in
struct nand_sdr_timings, which will give directly the sdr operating
mode. and it is useful for some controllers, where we can configure
direclty the operating mode instead of timings.
Naga Sureshkumar Relli (3):
dt-bindings: mtd: arasan: Add device
Hi Rob,
Thanks for the review.
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Wednesday, September 26, 2018 6:48 PM
> To: Naga Sureshkumar Relli
> Cc: boris.brezil...@bootlin.com; miquel.ray...@bootlin.com; rich...@nod.at;
> dw...@infradead.o
Hi Boris,
> -Original Message-
> From: Boris Brezillon [mailto:boris.brezil...@bootlin.com]
> Sent: Tuesday, November 20, 2018 9:55 PM
> To: Naga Sureshkumar Relli
> Cc: miquel.ray...@bootlin.com; rich...@nod.at; dw...@infradead.org;
> computersforpe...@gmail.com; mar
Hi Michal,
> -Original Message-
> From: Michal Simek [mailto:michal.si...@xilinx.com]
> Sent: Wednesday, December 5, 2018 8:13 PM
> To: Naga Sureshkumar Relli ; mma...@broadcom.com;
> f.faine...@gmail.com; la...@linux-mips.org; tred...@nvidia.com;
> dig...@gmail.com; d
Hi Michal,
Ok, will update and will send new patch.
Thanks,
Naga Sureshkumar Relli
> -Original Message-
> From: Michal Simek [mailto:michal.si...@xilinx.com]
> Sent: Wednesday, December 5, 2018 8:17 PM
> To: Naga Sureshkumar Relli ; mma...@broadcom.com;
> f.faine..
series make use of ->exec_op().
Naga Sureshkumar Relli (2):
dt-bindings: memory: Add pl353 smc controller devicetree binding
information
memory: pl353: Add driver for arm pl353 static memory controller
.../bindings/memory-controllers/pl353-smc.txt | 47 +++
drivers/memory/Kcon
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