> On Jan. 23, 2012, 10:21 a.m., Geoffrey Blake wrote: > > src/cpu/o3/O3CPU.py, line 45 > > <http://reviews.gem5.org/r/910/diff/5/?file=21389#file21389line45> > > > > I have a question for Nate or someone familiar with the guts of the > > python setup code for a simulation. I had to put this array de-reference to > > get the python to work properly. Without it, the python code complains > > about an unknown type, even if the workload array is 1 element, as python > > will try to pass this: [[workload1]]. An array of arrays to the C++ code. > > How should I fix this?
Good question... this may be a bug in the internal param code. When you assign a scalar value to a VectorParam like "workload" it will automatically convert the scalar value to a one-element array. It almost looks like this is happening twice instead of once. You could possibly be the first person to ever use the Parent. proxy mechanism with a VectorParam. You can try putting some print statements in VectorParamDesc.convert() in puthon/m5/params.py to see if you can track down what's going on... unfortunately I don't have time to look at it myself. Let me know what you see and I can try and help figure it out. - Steve ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/910/#review1983 ----------------------------------------------------------- On Jan. 23, 2012, 10:14 a.m., Geoffrey Blake wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/910/ > ----------------------------------------------------------- > > (Updated Jan. 23, 2012, 10:14 a.m.) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and > Nathan Binkert. > > > Description > ------- > > CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5 > > Brings the CheckerCPU back to a functioning state allowing FS and SE mode > checking of the O3CPU. These changes have only been tested with the > ARM ISA. Other ISAs will potentially require modification. > > > Diffs > ----- > > src/cpu/SConscript a1d5a0e2e970 > src/cpu/base.cc a1d5a0e2e970 > src/cpu/CheckerCPU.py a1d5a0e2e970 > src/cpu/DummyChecker.py PRE-CREATION > src/cpu/BaseCPU.py a1d5a0e2e970 > src/arch/arm/utility.cc a1d5a0e2e970 > src/arch/arm/tlb.hh a1d5a0e2e970 > src/arch/arm/tlb.cc a1d5a0e2e970 > src/arch/arm/isa/insts/misc.isa a1d5a0e2e970 > src/arch/arm/table_walker.hh a1d5a0e2e970 > src/arch/arm/table_walker.cc a1d5a0e2e970 > src/arch/arm/isa/insts/m5ops.isa a1d5a0e2e970 > src/arch/arm/isa.cc a1d5a0e2e970 > src/cpu/base_dyn_inst.hh a1d5a0e2e970 > src/cpu/base_dyn_inst_impl.hh a1d5a0e2e970 > src/cpu/checker/cpu.hh a1d5a0e2e970 > src/cpu/checker/cpu.cc a1d5a0e2e970 > src/cpu/checker/cpu_impl.hh a1d5a0e2e970 > src/cpu/checker/thread_context.hh a1d5a0e2e970 > src/cpu/dummy_checker_builder.cc PRE-CREATION > src/cpu/o3/O3CPU.py a1d5a0e2e970 > src/cpu/o3/O3Checker.py a1d5a0e2e970 > src/cpu/o3/checker_builder.cc a1d5a0e2e970 > src/cpu/o3/commit_impl.hh a1d5a0e2e970 > src/cpu/o3/cpu.hh a1d5a0e2e970 > src/cpu/o3/cpu.cc a1d5a0e2e970 > src/cpu/o3/dyn_inst_impl.hh a1d5a0e2e970 > src/cpu/o3/fetch_impl.hh a1d5a0e2e970 > src/cpu/o3/iew_impl.hh a1d5a0e2e970 > src/cpu/o3/lsq_unit_impl.hh a1d5a0e2e970 > src/cpu/o3/thread_context.hh a1d5a0e2e970 > src/cpu/o3/thread_context_impl.hh a1d5a0e2e970 > src/cpu/simple/BaseSimpleCPU.py a1d5a0e2e970 > src/cpu/simple/base.hh a1d5a0e2e970 > src/cpu/simple/base.cc a1d5a0e2e970 > src/cpu/simple_thread.hh a1d5a0e2e970 > src/cpu/thread_context.hh a1d5a0e2e970 > src/mem/bus.cc a1d5a0e2e970 > src/mem/cache/cache_impl.hh a1d5a0e2e970 > src/mem/packet.hh a1d5a0e2e970 > > Diff: http://reviews.gem5.org/r/910/diff/diff > > > Testing > ------- > > Successfully runs gzip in SE mode. Successfully boots linux kernel in FS > mode. Works with checkpoints and fast-forwarding. Testing with buggy O3CPUs > to test checker's capabilities. > > > Thanks, > > Geoffrey Blake > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
