> On April 3, 2012, 9:40 p.m., Gabe Black wrote: > > src/cpu/inorder/resources/cache_unit.cc, line 397 > > <http://reviews.gem5.org/r/1089/diff/5/?file=25222#file25222line397> > > > > I'm pretty sure it's not. > > Erik Tomusk wrote: > ALPHA currently does not. Don't know about the others.
src/arch/arm/tlb.hh:208 seems to suggest that the ARM translateTiming function returns a fault.. From a grep: "src/arch/arm/tlb.hh:208: Fault translateTiming(RequestPtr req, ThreadContext *tc," > On April 3, 2012, 9:40 p.m., Gabe Black wrote: > > src/cpu/inorder/resources/cache_unit.cc, line 394 > > <http://reviews.gem5.org/r/1089/diff/5/?file=25222#file25222line394> > > > > There probably should be, but Korey is the expert and would know for > > sure. I've been trying to find out why that is a "DataTranslation" as opposed to just a "Translation" and I dont see anything that would prevent Fetch from using this particular class. O3 defines it's own cpu-specific FetchTranslation class but I dont think that is necessary for the InOrder model. The next change will reflect my thoughts on that and hopefully dont shake the "programmer's nest" up too much... > On April 3, 2012, 9:40 p.m., Gabe Black wrote: > > src/cpu/inorder/resources/cache_unit.cc, line 375 > > <http://reviews.gem5.org/r/1089/diff/5/?file=25222#file25222line375> > > > > Don't add a bunch of commented out code. > > Erik Tomusk wrote: > This code doesn't quite compile yet, but outlines what needs to happen > here. It's commented to see if the rest of the patch compiles. Code should be in compilable form now... - Korey ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1089/#review2419 ----------------------------------------------------------- On April 1, 2012, 5:55 p.m., Korey Sewell wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1089/ > ----------------------------------------------------------- > > (Updated April 1, 2012, 5:55 p.m.) > > > Review request for Default. > > > Description > ------- > > inorder: add timing translation > This is Erik Tomusk's patch to add timing translation to InOrder. It's the > next step > in getting InOrder to work for ARM. > > > Diffs > ----- > > src/cpu/inorder/resources/graduation_unit.cc 6df06e5975c6 > src/cpu/inorder/resources/inorder_translation.hh PRE-CREATION > src/cpu/translation.hh 6df06e5975c6 > src/cpu/inorder/cpu.hh 6df06e5975c6 > src/cpu/inorder/cpu.cc 6df06e5975c6 > src/cpu/inorder/inorder_dyn_inst.hh 6df06e5975c6 > src/cpu/inorder/resources/cache_unit.hh 6df06e5975c6 > src/cpu/inorder/resources/cache_unit.cc 6df06e5975c6 > > Diff: http://reviews.gem5.org/r/1089/diff/ > > > Testing > ------- > > This is not fully tested yet but a work in progress. > > > Thanks, > > Korey Sewell > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
