> On April 3, 2012, 9:40 p.m., Gabe Black wrote: > > src/cpu/inorder/resources/cache_unit.cc, line 401 > > <http://reviews.gem5.org/r/1089/diff/5/?file=25222#file25222line401> > > > > Which hack is that?
This speaks to the comment explained on line 362 of this file... The DTB's translation is dependent on the current PC but the PC that the ThreadContext gives back is the last committed PC, so access permissions and faults depending on PC do not seem to be correct. - Korey ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1089/#review2419 ----------------------------------------------------------- On April 1, 2012, 5:55 p.m., Korey Sewell wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1089/ > ----------------------------------------------------------- > > (Updated April 1, 2012, 5:55 p.m.) > > > Review request for Default. > > > Description > ------- > > inorder: add timing translation > This is Erik Tomusk's patch to add timing translation to InOrder. It's the > next step > in getting InOrder to work for ARM. > > > Diffs > ----- > > src/cpu/inorder/resources/graduation_unit.cc 6df06e5975c6 > src/cpu/inorder/resources/inorder_translation.hh PRE-CREATION > src/cpu/translation.hh 6df06e5975c6 > src/cpu/inorder/cpu.hh 6df06e5975c6 > src/cpu/inorder/cpu.cc 6df06e5975c6 > src/cpu/inorder/inorder_dyn_inst.hh 6df06e5975c6 > src/cpu/inorder/resources/cache_unit.hh 6df06e5975c6 > src/cpu/inorder/resources/cache_unit.cc 6df06e5975c6 > > Diff: http://reviews.gem5.org/r/1089/diff/ > > > Testing > ------- > > This is not fully tested yet but a work in progress. > > > Thanks, > > Korey Sewell > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
