At 07:33 20.02.01 +0100, you wrote:
>Hi to all,
>
>This question is more a general one,
>
>I have to do a redesign of a 6 layer board. The layers sequence from top to
>bottom is,
>Top routing, second routing, GND, VCC, third routing, fourth routing.
>Top layer has all IC's. The bottom layer has the resistors, cap aso.
>
>If I change the GND and VCC to the top and bottom layer, there is more space
>for routing.
>Even more space I could get with the use of blind vias.
>
>What does you mean is the better solution: six layer standard or 4 layer
>with planes at top
>and bottom and perhaps blind vias.
Better for what?
If your board is a high speed board (fast switching), then I suggest to
arrange the power plans as near as possible together. This way you build a
very low impedance capacitor. I'm not a highspeed guru, but layer staking
can be very tricky.
If space is the concerne, you may coose an other stackup. But I doubt you
will have more space if you have the power planes on the outer layers,
because ypu need for all smd-pads also a via (exept the power pins). This
will eat up a lot of your space.
By the way, it's not a good practise to make the outer plane to a power
plane (by swapping the gerbers). I know, you haven't said this, but just in
case. Instead use polygon fills. You will have much better control over the
copper(Vias, clearances, placing strings, ...).
Edi
>Georg Beckmann
>[EMAIL PROTECTED]
>
>
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