Hi Georg

A layer stack I used on a dual DSP board running 100MHz clock (with ~5ns
rise time??) that seemed to work ok was from top to bottom:
1. SMD placement, low speed signal.
2. GND plane
3. Signal with PWR polygon pour.
4. Signal with GND polygon pour.
5. PWR plane.
6. low speed signal.

The board was, I guess, 98% SMD.  I had plenty of vias to stitch the PWR/GND
polygons and planes.  All vias were through hole.

Good luck.
Brendon.

----- Original Message -----
From: "Georg Beckmann" <[EMAIL PROTECTED]>
To: "Multiple recipients of list proteledausers"
<[EMAIL PROTECTED]>
Sent: Tuesday, February 20, 2001 7:33 PM
Subject: [PROTEL EDA USERS]: Best layer arrangement


> Hi to all,
>
> This question is more a general one,
>
> I have to do a redesign of a 6 layer board. The layers sequence from top
to
> bottom is,
> Top routing, second routing, GND, VCC, third routing, fourth routing.
> Top layer has all IC's. The bottom layer has the resistors, cap aso.
>
> If I change the GND and VCC to the top and bottom layer, there is more
space
> for routing.
> Even more space I could get with the use of blind vias.
>
> What does you mean is the better solution: six layer standard or 4 layer
> with planes at top
> and bottom and perhaps blind vias.
>
> Georg Beckmann
> [EMAIL PROTECTED]
>
>
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