I'd be _very_ careful about this one!

While moving GND planes to the outside of the board
can provide a better EMC solution (since buried stripline
won't radiate like microstrip will), the separation of
VCC and GND will reduce (and probably effectively
eliminate) the interlayer capacitance which is the highest
performance bypass capacitor that you'll have on the board.

If your board is a low frequency design (clocks <10MHz) then
you probably won't hit any problems with the proposed stackup.

There is the other issue, of course, of the cost of a 4 layer
blind-via board versus a standard 6 layer stackup!

Cheers,

John Haddy

> -----Original Message-----
> From: TSListServer [mailto:[EMAIL PROTECTED]]On
> Behalf Of Georg Beckmann
> Sent: Tuesday, 20 February 2001 5:34 PM
> To: Multiple recipients of list proteledausers
> Subject: [PROTEL EDA USERS]: Best layer arrangement
> 
> 
> Hi to all,
> 
> This question is more a general one,
> 
> I have to do a redesign of a 6 layer board. The layers sequence 
> from top to
> bottom is,
> Top routing, second routing, GND, VCC, third routing, fourth routing.
> Top layer has all IC's. The bottom layer has the resistors, cap aso.
> 
> If I change the GND and VCC to the top and bottom layer, there is 
> more space
> for routing.
> Even more space I could get with the use of blind vias.
> 
> What does you mean is the better solution: six layer standard or 4 layer
> with planes at top
> and bottom and perhaps blind vias.
> 
> Georg Beckmann
> [EMAIL PROTECTED]
> 
> 
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> 
> 
> 
> 
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