Hi Georg,
Here is my successful 6 layer 200Mhz design with high speed digital on top &
bottom, and analog on top. 1.5 ns typical rise & fall times, >75db
isolation from digital to analog section.
Top -> High speed digital & Analog
MidLayer1 -> Mid speed digital
MidLayer2 -> Split VCCINT 1.8v & AGND
MidLayer3 -> DGND
MidLayer4 -> VCCIO 3.3v
Bottom -> High speed digital
_____________
Brian Guralnick
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