Leaving CMOS logic inputs floating is bad design practice . The inputs are
high impedance and wideband and pick up noise that translates in outputs
toggling state randomly at high speed . This has nothing to do with pcb
layout and is an electrical design issue. You shouldn't have to deal with
this type of problem unless you're also the person who _designed_ the
schematic and are not just doing the capture and layout. Protel schematic is
not intended as a digital design tool .

Best Regards,
Matt Tudor , MSEE
Elmar Technologies
http://personal.lig.bellsouth.net/~mariusrf          consulting
http://www.rfdatacorp.com           spread spectrum radio telemetry

-----Original Message-----
From: Nicholas Cobb <[EMAIL PROTECTED]>
To: [EMAIL PROTECTED] <[EMAIL PROTECTED]>
Date: Wednesday, March 28, 2001 9:21 AM
Subject: [PEDA] Reference


>In a post about a month ago Mr. Lomax mentioned that leaving a CMOS input
>open could cause problems on a board.  Are there any references that will
>help me learn the details that might cause problems like this in commercial
>devices?  Up to this point I have been making circuit boards that will be
>used only by me.  I am just starting to work on some that will be mass
>produced.  Any sort of help would be appreciated.
>Thank you,
>Nick Cobb
>

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