Re: [PEDA] ~OT: Long URLs

[Robert Mitchell]

It seems that the list server has no effect on long URLs.
Some clients wrap the URL on transmission. Some wrap it on reception.
Some do neither.
Eudora apparently recognizes a split URL as such and retains the
click-through functionality. Not only that, but, when it retransmits it
quoted, it reassembles the URL into one line - clever Eudora.
I received the URL on one line from Leo (using Evolution/Linux) and it
still appears intact as quoted below.

On Wed, 2003-02-26 at 00:31, Leo Potjewijd wrote:
> I have to correct myself
> 
> At 25/02/2003 14:25, I wrote:
> >At 25/02/2003 02:48, Mark Harrison wrote:
> >>It will be interesting to see if the example link below survives the trip
> >>through the Protel EDA forum...
> >>e/3bmod_ol.html>
> >
> >Strange. in my Eudora the above link appears split on two lines, but 
> >is completely functional..
> 
> But only the first time around!
> 
> cheers,
> Leo Potjewijd
> 
> 
> 
-- 
Bob Mitchell
PO Box 68   Phone   (+61 2) 9449 4736
(21 Hudson Close)   Fax (+61 2) 9449 1976
Turramurra, 2074Mobile  0411554117
NSW, Australia  Email   [EMAIL PROTECTED]





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Re: [PEDA] Mixed PCB (imperial & metric)

[Ian Wilson]

On 12:45 AM 26/02/2003, RAD said:
Hi all,

I'm newbie in Protel, and i need to make a new PCB with mixed components 
(SMD and convetional)  with imperial & metric units.
Can anyone help me?? What is the best way to draw this?

Thanks in advance!!
I routinely design boards with random combinations of footprints design in 
metric and older imperial dimensions.  When I design the footprint I design 
the part in the appropriate grid.  the Q key switches between metric and 
imperial.

P99SE has problems with rounding errors that can be irritating but very 
rarely would they be more that that.  They are not likely to cause a board 
manufacturing fault.  We are talking about a few thousandths of a mm.  It 
is very irritating though to see a pad that was at an offset of 1 mm 
suddenly change to 0.8 mm or whatever, when you toggle the grid units 
about.

P99SE (and DXP :-) ) have an imperial fundamental unit, metric support is 
by simple conversion.  It seems that the conversion in P99SE is not a 
rounding conversion but a truncating conversion.  DXP has attempted to 
address this issue, but not in the manner in which many of us would have 
preferred.

So if you are worried about truncation errors simply design your 
metric-based footprints in imperial - do the conversion yourself and just 
preserve enough decimal places so you feel comfortable about the pad 
locations - 0.01 mil is ample precision for all current technology and 0.1 
mil is probably heaps.

The reference point for surface mount components is traditionally the 
centroid rather than pin 1, so this can also cause pads to be off grid once 
placed.  This is not a big worry.  It does cause some problems for the 
autorouter (even though it is supposed to be gridless), but for manual 
routing there is no issue if you use the electrical snap grid feature.

With the electrical snap on (Tools-Preferences I think, Shift-E toggles it 
on and off anyway), when you are placing a track the system will jump to 
any nearby pad or track end.  Then, assuming you have either 90 or 45 
degree placement mode active, the first track from the pad will stay off 
grid and so keep it all looking neat and tidy.

The track placement modes can be cycled through with the SPACE and 
Shift-SPACE keys while placing a track.

Mixed metric/imperial is very common these days, I have done many boards 
like this and not had any issues from the truncation error in P99SE, though 
maybe I am no longer aware of the workarounds if any.  One issue that 
arises is that boards that passed a DRC can suddenly begin to fail a DRC 
due to minute movements of entities due to truncation.  These errors are of 
the order of a poofteenth but enough to confound the rules system is a pair 
of entities were spaced exactly at the design rule limit in mm.

If you set your design rules in mils and design the board in mils (not 
necessarily the components) then you should not have too many issues.  Many 
people are successfully designing boards without even these constraints but 
if you want to avoid such issues until you are more experienced taking a 
conservative path makes sense.

Bye for now,
Ian Wilson


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Re: [PEDA] Cut and Paste bug from schematics to MS Word

[Suzy . Jackson]

One extra point with cutting and pasting schematics.  I occasionally cut and
paste portions of schematics for documentation, by unticking the "export
sheet" box.  I found that it often cut off test from around the edges.  My
solution was to put white lines around the area you're exporting, so it uses
them as the boundaries.

A sure fire way to embed pretty much anything in a document (I often use
LaTex) is to buy acrobat and print what you want to the acrobat printer,
then export as postscript from acrobat and embed the postscript file.  That
way you get exactly what would be printed.

Regards,

Suzy

Suzy Jackson - Engineer - CSIRO Australia Telescope
Email:  [EMAIL PROTECTED] Web:  http://www.atnf.csiro.au/
Phone:  +61 2 93724359 (bh) Fax:  +61 2 93724349
Mail:  PO Box 76, Epping NSW 1710 Australia



-Original Message-
From: Brad Velander [mailto:[EMAIL PROTECTED]
Sent: Wednesday, February 26, 2003 4:16 AM
To: Protel EDA Forum
Subject: Re: [PEDA] Cut and Paste bug from schematics to MS Word


Mark,
Good on yah fella. Seems that you have gotten to the bottom of a bug
that has irritated us all for a good many years. I know that I will surely
test your premise next time I am doing the old cut, paste & pray routine.
Have you taken the time to report this to Protel yet? Have you tried DXP to
see if it is similarly effected? Possibly they could fix it in DXP at least
for our future peace of mind.
FYI, have you tested your premise on DXF exports as well? I had
tried to export in DXF to see if it got around the problems but had no luck.
With all of the various export/import combinations it is surely a Protel
problem since it asks similarly in so many apps/formats.

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com


> -Original Message-
> From: Mark HARRISON [mailto:[EMAIL PROTECTED]
> Sent: Monday, February 24, 2003 5:50 PM
> To: '[EMAIL PROTECTED]'
> Subject: [PEDA] Cut and Paste bug from schematics to MS Word
> 
> 
> For years I've experienced problems copying schematics into 
> MS Word and
> other Windows applications.
> The short story is:
>  Watch out when using WMF graphics (such as company logos) in 
> your schematic
> templates!  They can corrupt the cut/paste process.
> 
> The long story:
> Specifically, I had trouble cutting and pasting most 
> schematics from Protel
> 99SE (every version) to virtually any Windows based application (under
> Windows 95 and 2000).
> 
> Typical symptoms were:
>  changing fonts and rotation of text.
>  misaligned overscores on pin names.
>  arcs and lines changing into circles.
>  schematics that preview OK in MS Word but print outside the 
> page margins.
> 
> Copying to intermediate applications such as other MS Office 
> applications,
> Corel Draw, etc didn't help (they just produce different errors).
> 
> In the end I gave up and stapled the circuits printed 
> directly from Protel
> into the back of the MS WORD manual (sacrificing the ability 
> to produce a
> single document with proper page numbers, index and table 
> entries, and the
> ability to produce a nice PDF document containing everything).
> 
> After a lot of experimentation and loss of hair I've finally 
> twigged that
> the schematics would cut and paste OK provided the company 
> logo was missing
> (usually because the logo file was not in the same folder as 
> a new project).
> The logo was a WMF (Windows Meta File) embedded in the 
> schematic template
> that I use for all schematics.  All the troubles went away 
> when I either
> deleted the WMF logo file or converted it to a BMP bitmap 
> format (and then
> saved and updated all the schematics in the project with the 
> new template). 
> 
> Although Protel 99SE could display and print the logo itself, it was
> corrupting the Windows Meta File that was placed on the 
> Windows clipboard
> during cut&paste.
> 
> I'd be interested to hear if anyone knows of a Windows tool 
> that can analyse
> or list the contents of WMF files, as I'm curious to see what 
> was wrong with
> the logo file or Protel's interpretation of it.
> 
> Cheers,
> Mark Harrison,
> The Bionic Ear Institute
> Melbourne, Australia



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Re: [PEDA] Mixed PCB (imperial & metric)

[Bagotronix Tech Support]

> > > I'm newbie in Protel, and i need to make a new PCB with mixed
components
> > > (SMD and convetional)  with imperial & metric units.
> > > Can anyone help me?? What is the best way to draw this?
> >
> >I hope you are not designing Mars planetary exploration equipment ;-)
>
>  Why not?? :-)
>
> Thanks a lot Ivan

In case someone is not aware of what I referred to, here is a link to a news
story about the Mars Climate Orbiter that was lost due to metric/english
mishaps.

http://www.cnn.com/TECH/space/9909/30/mars.metric/

Best regards,
Ivan Baggett
Bagotronix Inc.
website:  www.bagotronix.com



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Re: [PEDA] Mixed PCB (imperial & metric)

[Peter Bennett]

RAD wrote:
My problem is as follow:

All components in my design are in imperial unit, of course i define my 
grid in "mils". But i have a little problem when place the only one 
component in "metric" unit, the component is a CS8900Q and i can't put 
this component in grid :(
The problem start when i try to place a track, the anchor point in the 
metric component pad has ok but when i draw the track outside the pad or 
over the pad the track goes to grid. Can you understand my problem? Have 
you a solution???

Thanks very much!!!

Bob


When connecting to fine-pitch surface mount parts (or other pins not on a 
"nice" grid), I will switch the routing grid to 5 mil or 1 mil while close to 
the offending pin, then switch to a larger grid when I get away from the part.

You can quickly switch grids using Ctrl-G (or maybe Alt-G) (Don't have Protel 
open at present...)

--
Peter Bennett
TRIUMF
4004 Wesbrook Mall, Vancouver, BC, Canada
GPS and NMEA info and programs:
http://vancouver-webpages.com/peter/index.html




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Re: [PEDA] Mixed PCB (imperial & metric)

[ajenkins]

> From: RAD [mailto:[EMAIL PROTECTED]
> 
> My problem is as follow:
> 
> ...i have a little problem when place the only one 
> component in "metric" unit, the component is a CS8900Q and i 
> can't put this component in (imperial) grid :(

Sure you can. Pre-wire the TQFP-100 into an imperial grid of your liking,
using a sub-mil grid to attach its pads into the larger grid. Then route the
board connections at the larger grid size into the pre-wired "cell"...

Point is, just because you're in imperial "mode",  you're really not
constrained to working in a 25mil grid at _all_ times. If you require an
alteration to your working grid, then change it to whatever is necessary to
accomplish the job (within reason that is). If 99% of the circuit can be
routed using a 25mil grid, great. If the last tidbit requires a shift to a
finely spaced grid, then change the grid size to suit your need.

Just don't under any circumstances changes the mode while "in-filght". Too
much of a possiblity of Protel-introduced error. There are posts in the
archive that outline the problem in some detail, but basically it is a
mathematical oversight on the part of Protel's management, as follows:

Let $=profit
let t=truth

$>t

r,

aj


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Re: [PEDA] Mixed PCB (imperial & metric)

[Rene Tschaggelar]

You have to enable electrical snap anyway.
That makes the track attach to the center of the pad.
It happens rather often that not everything is on the 
preset snap. Eg when the pad distance is not dividable 
by the snap distance.
Usually pin_1 of the footprint aligns with 
the snap grid and the others are where they are.

Rene



RAD wrote:
> 
> My problem is as follow:
> 
> All components in my design are in imperial unit, of course i define my
> grid in "mils". But i have a little problem when place the only one
> component in "metric" unit, the component is a CS8900Q and i can't put this
> component in grid :(
> The problem start when i try to place a track, the anchor point in the
> metric component pad has ok but when i draw the track outside the pad or
> over the pad the track goes to grid. Can you understand my problem? Have
> you a solution???
>


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Re: [PEDA] Mixed PCB (imperial & metric)

[RAD]

At 12:51 p.m. 25/02/03, you wrote:
> I'm newbie in Protel, and i need to make a new PCB with mixed components
> (SMD and convetional)  with imperial & metric units.
> Can anyone help me?? What is the best way to draw this?
I hope you are not designing Mars planetary exploration equipment ;-)
Why not?? :-)

Thanks a lot Ivan


Better pick one or the other and stick with it throughout the design.

Best regards,
Ivan Baggett
Bagotronix Inc.
website:  www.bagotronix.com
- Original Message -
From: "RAD" <[EMAIL PROTECTED]>
To: <[EMAIL PROTECTED]>
Sent: Tuesday, February 25, 2003 8:45 AM
Subject: [PEDA] Mixed PCB (imperial & metric)



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Re: [PEDA] Mixed PCB (imperial & metric)

[rlamoreaux]

> The problem start when i try to place a track, the anchor point in the 
> metric component pad has ok but when i draw the track outside the pad or 

> over the pad the track goes to grid. Can you understand my problem? Have 

> you a solution???

I just route it with a grid of something like 5mil. When I come off the 
pad I go straight until I am far enough away from the pad that a diagonal 
won't interfere with other traces from nearby pads, then I put a 45 degree 
track and from there I am on grid. If you are on the 45 degree when you 
click the mouse the first time the track will be straight and aligned with 
the pad. I have a borad right here that has TSSOP memory with 0.5mm pitch 
and I routed it with a 0.005 inch grid.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-



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Re: [PEDA] Hole Size Constraint

[rlamoreaux]

Well I sit corrected. Sorry. I never even noticed Query Manager in the 
menus. I guess you learn something new every day.

Robert D. LaMoreaux
MTS Systems Corp. 
Powertrain Technology Division
4622 Runway Blvd.
Ann Arbor, MI 48108
734-822-9696
Fax 734-973-1103
Main Desk 734-973-




"Wojciech Oborski" <[EMAIL PROTECTED]>
02/25/2003 03:28 AM
Please respond to "Protel EDA Forum"

 
To: "Protel EDA Forum" <[EMAIL PROTECTED]>
cc: 
Subject:Re: [PEDA] Hole Size Constraint


[EMAIL PROTECTED] wrote:

> That would help him if he were using DXP, but since he is using P99SE 
his 
> only choice is to use the hole size editor and manually check that the 
> holes are in his list.
> 


Robert,

I'm not talking about DXP - I'm using Protel99SE!
The post was about using Query Manager (the tool which IS in P99SE)
to SELECT objects not meeting desired rule instead of running
DRC (while you cannot specify "proper" rule in P99SE).

I tested the method quickly (in P99SE) before sending the post
- I got selected those pads and vias that had there hole sizes
out of the desired set.

Producing drill file is good - it shows quickly that you have
some pads/vias offending your rule, but with the described
method you get them selected, which may help with further
processing.

Sincerely,
Wojciech Oborski







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Re: [PEDA] Cut and Paste bug from schematics to MS Word

[Brad Velander]

Mark,
Good on yah fella. Seems that you have gotten to the bottom of a bug that has 
irritated us all for a good many years. I know that I will surely test your premise 
next time I am doing the old cut, paste & pray routine. Have you taken the time to 
report this to Protel yet? Have you tried DXP to see if it is similarly effected? 
Possibly they could fix it in DXP at least for our future peace of mind.
FYI, have you tested your premise on DXF exports as well? I had tried to 
export in DXF to see if it got around the problems but had no luck. With all of the 
various export/import combinations it is surely a Protel problem since it asks 
similarly in so many apps/formats.

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com


> -Original Message-
> From: Mark HARRISON [mailto:[EMAIL PROTECTED]
> Sent: Monday, February 24, 2003 5:50 PM
> To: '[EMAIL PROTECTED]'
> Subject: [PEDA] Cut and Paste bug from schematics to MS Word
> 
> 
> For years I've experienced problems copying schematics into 
> MS Word and
> other Windows applications.
> The short story is:
>  Watch out when using WMF graphics (such as company logos) in 
> your schematic
> templates!  They can corrupt the cut/paste process.
> 
> The long story:
> Specifically, I had trouble cutting and pasting most 
> schematics from Protel
> 99SE (every version) to virtually any Windows based application (under
> Windows 95 and 2000).
> 
> Typical symptoms were:
>  changing fonts and rotation of text.
>  misaligned overscores on pin names.
>  arcs and lines changing into circles.
>  schematics that preview OK in MS Word but print outside the 
> page margins.
> 
> Copying to intermediate applications such as other MS Office 
> applications,
> Corel Draw, etc didn't help (they just produce different errors).
> 
> In the end I gave up and stapled the circuits printed 
> directly from Protel
> into the back of the MS WORD manual (sacrificing the ability 
> to produce a
> single document with proper page numbers, index and table 
> entries, and the
> ability to produce a nice PDF document containing everything).
> 
> After a lot of experimentation and loss of hair I've finally 
> twigged that
> the schematics would cut and paste OK provided the company 
> logo was missing
> (usually because the logo file was not in the same folder as 
> a new project).
> The logo was a WMF (Windows Meta File) embedded in the 
> schematic template
> that I use for all schematics.  All the troubles went away 
> when I either
> deleted the WMF logo file or converted it to a BMP bitmap 
> format (and then
> saved and updated all the schematics in the project with the 
> new template). 
> 
> Although Protel 99SE could display and print the logo itself, it was
> corrupting the Windows Meta File that was placed on the 
> Windows clipboard
> during cut&paste.
> 
> I'd be interested to hear if anyone knows of a Windows tool 
> that can analyse
> or list the contents of WMF files, as I'm curious to see what 
> was wrong with
> the logo file or Protel's interpretation of it.
> 
> Cheers,
> Mark Harrison,
> The Bionic Ear Institute
> Melbourne, Australia


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Re: [PEDA] Mixed PCB (imperial & metric)

[Bagotronix Tech Support]

> I'm newbie in Protel, and i need to make a new PCB with mixed components 
> (SMD and convetional)  with imperial & metric units.
> Can anyone help me?? What is the best way to draw this?

I hope you are not designing Mars planetary exploration equipment ;-)

Better pick one or the other and stick with it throughout the design.

Best regards,
Ivan Baggett
Bagotronix Inc.
website:  www.bagotronix.com


- Original Message - 
From: "RAD" <[EMAIL PROTECTED]>
To: <[EMAIL PROTECTED]>
Sent: Tuesday, February 25, 2003 8:45 AM
Subject: [PEDA] Mixed PCB (imperial & metric)



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Re: [PEDA] Mixed PCB (imperial & metric)

[RAD]

My problem is as follow:

All components in my design are in imperial unit, of course i define my 
grid in "mils". But i have a little problem when place the only one 
component in "metric" unit, the component is a CS8900Q and i can't put this 
component in grid :(
The problem start when i try to place a track, the anchor point in the 
metric component pad has ok but when i draw the track outside the pad or 
over the pad the track goes to grid. Can you understand my problem? Have 
you a solution???

Thanks very much!!!

Bob

At 11:13 a.m. 25/02/03, you wrote:
> From: RAD [mailto:[EMAIL PROTECTED]
...
> I'm newbie in Protel, and i need to make
> a new PCB with mixed components
> (SMD and conventional), with imperial &
> metric units. Can anyone help me??
> What is the best way to draw this?
What's your tolerance? And why simultaneous
mixed-mode (mil/mm)? Seeing your title makes
me wonder if this query is more academic than
real-world...
The best way, IMO, is either in imperial
OR metric, not both. Protel has certain
peculiarities which impinge negatively
upon dimensional accuracy when switching
units from one standard to the other.
That is, you're asking for trouble on
the mixed-mode (mil/mm) question.
As for SMD/thru-hole, it's easy, design-wise,
but mfg is a little more complicated than
one or the other, and your options become
a bit more limited in terms of automated
fab.
aj



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Re: [PEDA] Mixed PCB (imperial & metric)

[ajenkins]

> From: RAD [mailto:[EMAIL PROTECTED]
...
> I'm newbie in Protel, and i need to make 
> a new PCB with mixed components 
> (SMD and conventional), with imperial & 
> metric units. Can anyone help me?? 
> What is the best way to draw this?
What's your tolerance? And why simultaneous 
mixed-mode (mil/mm)? Seeing your title makes
me wonder if this query is more academic than 
real-world...

The best way, IMO, is either in imperial 
OR metric, not both. Protel has certain 
peculiarities which impinge negatively
upon dimensional accuracy when switching
units from one standard to the other.

That is, you're asking for trouble on 
the mixed-mode (mil/mm) question.

As for SMD/thru-hole, it's easy, design-wise,
but mfg is a little more complicated than
one or the other, and your options become
a bit more limited in terms of automated
fab.

aj


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[PEDA] Mixed PCB (imperial & metric)

[RAD]

Hi all,

I'm newbie in Protel, and i need to make a new PCB with mixed components 
(SMD and convetional)  with imperial & metric units.
Can anyone help me?? What is the best way to draw this?

Thanks in advance!!

Bob Dhios
Software Engineer
[EMAIL PROTECTED]
tel: +54 (11) 4361-3466
Embedded Solutions
Internet Appliances


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Re: [PEDA] ~OT: 3B, 5B, 7B footprint

[Leo Potjewijd]

I have to correct myself

At 25/02/2003 14:25, I wrote:
At 25/02/2003 02:48, Mark Harrison wrote:
It will be interesting to see if the example link below survives the trip
through the Protel EDA forum...
e/3bmod_ol.html>
Strange. in my Eudora the above link appears split on two lines, but 
is completely functional..
But only the first time around!

cheers,
Leo Potjewijd


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Re: [PEDA] ~OT: 3B, 5B, 7B footprint

[Leo Potjewijd]

At 25/02/2003 02:48, Mark Harrison wrote:
Sometimes email clients are smart enough not to break up long URLs if you
enclose the web link name with < and > characters.
Unfortunately this is not true for all email clients or newsgroup
redirectors, but it is nice when it works!
It will be interesting to see if the example link below survives the trip
through the Protel EDA forum...



Strange. in my Eudora the above link appears split on two lines, but is 
completely functional..

cheers,
Leo Potjewijd


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Re: [PEDA] ~OT: 3B, 5B, 7B footprint

[ajenkins]

Nope. 76 char line limit reached. After all, along with no color, no fonts,
etc., isn't the line length also a constituent element?

Let's not forget that there's a price to be paid for adherence to old
"postal" standards.

aj

> From: Mark HARRISON [mailto:[EMAIL PROTECTED]
 
> It will be interesting to see if the example link below 
> survives the trip
> through the Protel EDA forum...
>  catalog/outlin
> e/3bmod_ol.html>
 


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Re: [PEDA] Hole Size Constraint

[Wojciech Oborski]

[EMAIL PROTECTED] wrote:

That would help him if he were using DXP, but since he is using P99SE his 
only choice is to use the hole size editor and manually check that the 
holes are in his list.



Robert,

I'm not talking about DXP - I'm using Protel99SE!
The post was about using Query Manager (the tool which IS in P99SE)
to SELECT objects not meeting desired rule instead of running
DRC (while you cannot specify "proper" rule in P99SE).
I tested the method quickly (in P99SE) before sending the post
- I got selected those pads and vias that had there hole sizes
out of the desired set.
Producing drill file is good - it shows quickly that you have
some pads/vias offending your rule, but with the described
method you get them selected, which may help with further
processing.
Sincerely,
Wojciech Oborski


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