Re: superior IBM supplied "register equate" macro?

First, it shouldn't take more time to write the macro you want than it did the email :-) Second, I'm not sure there's any benefit in differentiating 32 vs. 64 bit regs. There *are* the same, of course. Also, I believe HLASM flags some instructions incorrectly (iirc, it requires GR32 for LLILL,

Re: Save areas (not XPLINK).

I do love that 36D format, but we ought to be sure 8-byte pointers are always fully supported. Plausible deniability is a thing, and it's a good thing. sas On Mon, Jun 12, 2017 at 9:14 PM, Paul Gilmartin < 0014e0e4a59b-dmarc-requ...@listserv.uga.edu> wrote: > On 2017-06-10, at 17:59,

Re: Save areas (not XPLINK).

Regardless of the meaning of "standard", IBM does provide the IHASAVER macro to assist with those choices. I routinely make save areas 18D (or update from 18F) these days. sas On Sun, Jun 11, 2017 at 1:05 PM, Peter Relson wrote: > >And unfortunately there are now six or so

Re: Save areas (not XPLINK).

First answer: The high-halves portion of the save areas is used by the caller, not the callee. I suppose for the case when calling a program that doesn't save all 64 bits, yet uses some of them. The Assembler Services guide goes into great detail on linkage conventions and save area formats, but

Re: Structured programminng macros

Pieter, I maintain our in-house logical construct macros, and ours does have ITERATEIF (AND LEAVEIF). However, using the "combo" operations (e.g. CLIJE) is problematical. The macros do not presently care what instructions generate the condition code, nor do they allow for specifying the

Re: HLASM "Anomaly"

Well, good news! That was a nasty little issue. On Sat, Mar 25, 2017 at 5:48 AM, Jonathan Scott wrote: > Ref: Your note of Fri, 24 Mar 2017 23:34:21 + > > This was fixed over a year ago. Since APAR PI34981 in early > 2016, a relative immediate operand which

Re: ASSEMBLER-LIST Digest - 18 Mar 2017 to 19 Mar 2017 (#2017-31)

On Mon, Mar 20, 2017 at 9:14 PM, Steve Thompson <ste...@copper.net> wrote: > On 03/20/2017 07:45 PM, Steve Smith wrote: > >> Two's-complement is an amazingly great way for binary computers to store >> negative numbers. It is not so great for humans to read or write. >

Re: HLASM "Anomaly"

On 3/20/2017 20:58, Paul Gilmartin wrote: Please don't reply with "Subject:...Digest..." Sorry... I wish I remembered to do that, but I usually don't. On 2017-03-20, at 17:45, Steve Smith wrote: Two's-complement is an amazingly great way for binary computers to store negati

Re: ASSEMBLER-LIST Digest - 18 Mar 2017 to 19 Mar 2017 (#2017-31)

Two's-complement is an amazingly great way for binary computers to store negative numbers. It is not so great for humans to read or write. First of all, you have to know where the sign bit is, and X expressions are ambiguous. If you watch carefully, you'll see that HLASM (almost) always

Re: HLASM "Anomaly"

be allowed to replace the latter by the former. > > > DC 2*X'FF' is invalid because the operand is not a duplication factor > > 2*X'FF' is invalid here because it does not give any indication of the > length of the data to be generated. > > Steve Smith <sasd...@gmai

Re: worthy of an RFE?

Your *+4 would be incorrect in more than 1 way. Here's another case where more liberal immediate operands (LLILF Rx,Q(CEEx)) would come in handy. sas On 3/8/2017 10:23, Gary Weinhold wrote: I think it is worth RFEing. Reentrant baseless code is a desirable standard and IBM's own code

Re: HLASM anomaly

rame Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU > ] > On Behalf Of Paul Gilmartin > Sent: Wednesday, March 1, 2017 1:59 PM > To: ASSEMBLER-LIST@LISTSERV.UGA.EDU > Subject: Re: HLASM anomaly > > On 2017-03-01, at 13:24, Steve Smith wrote: > > > ASMA320W is i

Re: HLASM anomaly

ASMA320W is imho, a total wimp-out on IBM's behalf. There'd be less confusion if this was flagged as an *error*, which it is. It may sometimes generate what the user wants, but the user didn't specify it correctly. And the case where the assembler issues this for BR instructions is egregiously

Re: HLASM anomaly

eful. > > Kludge for this is: > > IIHF R00,12345*65536 > > which is ugly, while: > > IIHL R00, 809041920 > > is even uglier! > > Robert Ngan > > -Original Message- > From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] >

Re: HLASM anomaly

Have you not seen the many prior discussions of this excruciating topic? HLASM's hex notation is a PIA! 2s-complement is great for computers, not much so for humans. HLASM treats all hex constants as a 32-bit number, so if you need to specify a negative number in hex, you have to spell out all

Re: HLASM anomaly

That's just the way it is... i.e. there is no reason. DC supports a whole bunch of stuff that immediate operands do not. Sometimes, you just have to ORG *-2 (or 4), and DC it. Be careful with f-word-aligned data! e.g.: CNOP 2,4 LLILF R15,* ORG *-4 DC V(EXTRTN1) BASSM R14,R15 AFAIK, you

Re: Did IBM replace all format RXE with RXY ?

How bizarre. I assumed that the RXE->RXY transition was fundamental, and RXE-format was completely superseded. The -10 version of PoOp still shows RXE format for BFP instructions. There are a couple of odd DFP instructions that are documented as RXE, but DFP is mostly register-only. HFP of

Re: Load/Insert Instructions (was:curious: MVHI vs XC to "zero" a halfword.)

Indeed... one of the few omissions of the z/Architecture instruction set is the lack of LLI* instructions that operate only on the traditional 32-bit registers. Seems to me they probably should have been named LLGI* to be consistent. sas On Fri, Jan 13, 2017 at 1:40 AM, John Dravnieks

Re: curious: MVHI vs XC to "zero" a halfword.

BIG DATA > > -Original Message- > From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] > On Behalf Of Steve Smith > Sent: Thursday, January 12, 2017 3:36 PM > To: MVS List Server 2 <ASSEMBLER-LIST@LISTSERV.UGA.EDU> > Subject: Re: curious: MVH

Re: curious: MVHI vs XC to "zero" a halfword.

Just to be clear, MVHI expands a source half-word to set a full-word. MVHHI is for half-word targets, and what MVGHI does is left as an exercise for the student. Regardless, sure seems like MVFHI would have made more sense as the first's name. Aside: if you don't already know, guess what the MY

Re: Bogus ASMA307E?

Well, I found a work-around: *USING DLTABD,DLTABLE This fails w/ASMA307E USING DLTABD-4000,DLTABLE-4000 Trick to fool HLASM My brain exploded trying to figure out the workarounds in the old postings. On Tue, Dec 20, 2016 at 12:55 PM, Steve Smith <sasd...@gmail.

Re: Bogus ASMA307E?

Googleable. Is there an outstanding SHARE req. for this? sas On Tue, Dec 20, 2016 at 11:33 AM, Paul Gilmartin < 0014e0e4a59b-dmarc-requ...@listserv.uga.edu> wrote: > On 2016-12-20, at 09:13, Steve Smith wrote: > > > I'm getting an error on a dependent USING apparently just because

Bogus ASMA307E?

I'm getting an error on a dependent USING apparently just because it's out of the normal 12-bit offset range... 04D0 E310 DCE0 0171 1CE0 1760 LAY R1,DLTABLE 1761 USING DLTABD,DLTABLE ** ASMA307E No active USING for

Re: Addr2 field in listing for EQU statement?

It would be sensible for EQUed symbols to assume all the attributes of the "target" unless overridden. But that's not what our forefathers did, and it's not likely to change. I suppose you could write a macro... MACRO $EQU EQU ,L',T' MEND On Wed, Nov 16, 2016 at 11:45 AM, Tony Harminc

Re: converting character to packed

Possibly good points, but no one was hired to code a complete solution, and no one has published specifications. He wanted some ideas on how to approach his problem. Chris Webster's technique is nice, as it shows what can be done in these modern times if you've cracked open the PoOp since 1979.

Re: IEV90

IEV90 is hardly "alive", unless you captured it at some point before it was discontinued. Maybe you could find some incompatibility with HLASM, but I doubt it. In any case, the notice is only about how to create an alias for IEV90. If I were IBM, I think I'd withdraw the usermod, and tell

Re: Callable Cell Pool Service

Thanks! I was using (and should have mentioned) the 2.1 version. Not that I see any change bars, but that version has "0-1 Used as work registers by the system". On Mon, Jul 11, 2016 at 3:40 PM, Binyamin Dissen <bdis...@dissensoftware.com > wrote: > On Mon, 11 Jul 2016 1

Callable Cell Pool Service

Can anyone tell me how CSRC4RGT/CSRC4RG1 works? I've read and re-read, but as best as I can tell, there's no information on how the caller actually obtains the cell address. If not, I'll have to start experimenting. -- sas

Re: LLILF/LGFI and ad-cons

ce (haven't tried). > > However, if your question came from z/OS, the jas[l] will work with a > program object and that is the way to do it. > > > On 06/20/2016 04:56 PM, Steve Smith wrote: > >> Why shouldn't this be allowed: >> >> 0182

LLILF/LGFI and ad-cons

Why shouldn't this be allowed: 0182 294 LLILF R15,V(BPX4GUI) GET THE EPA ASMA044E Undefined symbol - V ASMA173S Delimiter error, expected blank - (BPX4GUI) -- sas

Re: Microprocessor Optimization Primer

eard SLR was seriously discouraged. because it stalls the pipeline where the others don't. On 04/02/2016 06:43 PM, Steve Smith wrote: All the same (and they're all optimized),

Re: Microprocessor Optimization Primer

Very much interesting! Thank-you! Maybe this will settle the question of whether XR, SR, SLR, LHI, or LA is the fastest way to clear a register. Spoiler alert: All the same (and they're all optimized), except the latter two don't set the CC, and there's a subtle hint that might be a

Re: Csect - Dsect Question

NILH, not NIHL! Sheesh, assembler is hard :-) Too bad it's been obviated at this point, I was going to suggest NILF R0,x'7ffe'. sas On 4/2/2016 12:05, Ed Jaffe wrote: On 4/2/2016 6:51 AM, Peter Relson wrote: And of course none of the IBM-Main readers would ever rely on an empirical

Re: Generating warning for AL2 expression truncation?

STSERV.UGA.EDU] On Behalf Of Robert Netzlof >> Sent: Saturday, March 26, 2016 11:59 >> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU >> Subject: Re: Generating warning for AL2 expression truncation? >> >> On 3/26/16, Steve Smith <sasd...@gmail.com> wrote: >> >>&g

Re: Generating warning for AL2 expression truncation?

Well, it seems to me that the lack of any message on the AL2 is a bug. Correct me if I'm wrong, but I think Y-cons are signed, so it will warn for anything over 32k-1. AL2 is unsigned, but I don't think it's defined as a modulo function. sas On 3/25/2016 18:43, John P. Hartmann wrote: Use

Re: Using macro to set assembler option

I did not mean to imply I thought there was any hardship, it's just a curiosity. Virtually everything I write is non-modifying reentrant (and therefore refreshable). But the system does load APF-authorized modules marked RENT into key zero storage, making them at least more difficult to

Re: Using macro to set assembler option

I have the same understanding. I've sometimes wondered why there was never an explicit non-modifiable attribute. Especially since the system tries in more than one way to take RENT or REFR to mean that. RENT, REFR, and self-modification are completely independent attributes (although some

Re: review my program?

As LOAD provides the length (other than certain cases), I don't see how anything else is easier. sas On Wed, Dec 9, 2015 at 12:25 PM, Victor Gil wrote: > I guess you all missed the original Frank's email [probably on IBM-MAIN] > where he said this load module is just

Re: review my program?

Well, page-aligning and filling of PDSE modules is a new one on me. Regardless, OP didn't say what the length is used for, so whether this or that technique will suit is presently unknown. sas On Wed, Dec 9, 2015 at 1:22 PM, Victor Gil wrote: > Quoting from IBM-MAIN

Re: review my program?

The one main thing I see is that you should never have a code label on a DS 0C (or EQU*). DS 0H (or DC 0H) is the usual thing. Sooner or later, such a label will assemble to an odd address, and you'll have to fix it. Indexing through the ARG list doesn't make much sense here. Elaborate the

Re: Change in GETMAIN behavior

Walt, I think there was a change to GETMAIN behavior, but it's rather subtle (low-end vs. high-end page-filling), and this part was merely to reassure everyone that from a program's point-of-view, nothing was really any different. The key words are "remain unchanged". The behavior (which is the

Re: TOD conversion to display

I have a program that converts a STCK to a WTO. It is reentrant, but you will need writable storage for the displayable string. Samples: +TODCON2 TOD= DATE= 9/17/2042, TIME= 23:53:47.370495 +TODCON2 TOD=CFDCC9B74A2892CB DATE= 11/17/2015, TIME= 13:15:43.795849 sas On Tue,

Re: TOD conversion to display

equ...@listserv.uga.edu> wrote: > On 2015-11-17, at 06:16, Steve Smith wrote: > > > I have a program that converts a STCK to a WTO. It is reentrant, but you > > will need writable storage for the displayable string. Samples: > > > > +TODCON2 TOD=

Re: Subscripting a literal

Like HLASM, I'm not clear on what you want to do. But (8) means that you want the 8th element of a sublisted parameter named , which it ain't. If the (8) is supposed to be a length override, precede it with a dot. sas On Thu, Oct 29, 2015 at 4:07 PM, Paul Gilmartin <

Re: Moves and others

I sometimes use MVCK for variable-length moves (in the same key). Usually, a preceding IPK is needed, but EXed MVCs usually require a BCTR or something. It's very convenient (especially when I don't want to decrement the length register), but has the performance warning too. It baffles me that

Re: Branch Table: Item stepping considered useful; BXLE considered harmful

I use JXLE (or JXLEG) a lot, and don't find it at all difficult to use or understand (the only issue is remembering what goes in which register). It is fairly ideal for the current example, as it doesn't require a separate counting register along with the actual index. As Martin showed, the code

Not getting the concept

I looked at the TRKADDR macro and found that it does different expansions based on SYSSTATE AMODE64. The author evidently thought that using all 64 bits of registers was disallowed unless AMODE64 was set; and conversely, also seemed to think that it's required that *G instructions be used if on

Re: Not getting the concept

That's plausible. I don't know how old TRKADDR is, but the non-G expansions would work on ESA. On Wed, Sep 30, 2015 at 10:26 AM, Paul Gilmartin < 0014e0e4a59b-dmarc-requ...@listserv.uga.edu> wrote: > On 2015-09-30, at 08:10, Steve Smith wrote: > > > I looked at the TRKAD

Re: LOADING An AMODE64 Program

Well, this is the best and most accurate advice. However, the comments on the LLGTR are misleading. It is there to clear the high-order 33 bits, but only the high 32 are in question. LARL, like all LA* instructions clears bit 32 when in AMODE 31. If this code was running AMODE 64 (and it's

Re: Rounding to a 2G-byte boundary

Out of curiosity, what is this 2gb boundary needed for (at assembly time)? It would be a lot easier to calculate at run-time. sas

Re: Fw: Rounding to a 2G-byte boundary

Well, X_4G should be Xl8' '. That second constant should be labeled X_32G. sas On Sat, Jun 27, 2015 at 12:47 AM, Steve Smith sasd...@gmail.com wrote: OK. Your problem is with the the assembly-time arithmetic, which it seems is always 32-bit signed, even if you are dealing

ASMA320W considered harmful

I don't always check warnings from HLASM, but today it's a good thing I did: 2DBC A7E5 96EE 00015B98 5858+ JAS R14,FORMAT_OFFSET_FIELD ASMA320W Immediate field operand may have incorrect sign or magnitude The generic immediate field warning is not appropriate here.

Re: Debuggers

I've had the opportunity to work with Xpeditor, IBM Debug Tool, and XDC. They all do a good job. I use XDC now, almost daily, and it's what I'd recommend to assembler developers. I really liked Debug Tool a lot, but it's complicated to set up and difficult to learn (at least in my experience a

Re: LNKEDT 64-bit mode assembler in AMODE 31

The Bind attribute merely tells Program Management what mode you want to be called in, it has no lingering effect. What is slow? Compared to what? I converted a service routine to 64-bit, but it keeps the same interface to its 31-bit mode callers. When called, it cleans up the registers, then

Re: LNKEDT 64-bit mode assembler in AMODE 31

It's important to keep the concepts of 64-bit registers separate from 64-bit addressing. The former supports that latter, but there are many capabilities and benefits of 64-bit registers that have nothing to do with addressing. Most -G instructions work the same in any addressing mode. A few

Re: LNKEDT 64-bit mode assembler in AMODE 31

SYSSTATE sets a global variable that many IBM macros refer to so they can generate different code for AMODE 64. For example CALL expands parameter lists with 8-byte addresses when set. It has effect only at assembly time, and doesn't actually set the AMODE. It's analogous to USING on a register

Re: Option to Prevent Data Loss Due to Truncation of Nominal Value

No change to mvc is needed. The warning is for character constants with explicit length. On May 2, 2015 2:28 PM, Mike Shaw quick...@gmail.com wrote: A good idea, but the HLASM should not warn on zero lengths coded in MVCs that are EX targets: MOVIT MVC 0(0,R1),=CL16''

Re: Assembler Quiz

On 3/26/2015 18:07, John Ehrman wrote: Steve Smith asked for the answer to my quiz question of March 23: While we're having fun: under what circumstances is the character sequence (4)(3)(2)(1) legal as part of a machine instruction operand, not part of a quoted string, not part

Re: Assembler Quiz

Well, I give up. But I'd like to know the answer. Hopefully John's not planning to answer next Wednesday ;-) sas On 3/23/2015 15:32, John Ehrman wrote: While we're having fun: under what circumstances is the character sequence (4)(3)(2)(1) legal as part of a machine instruction

Re: SHARE Video

Nice cameos, Ed... they wouldn't give you a vocal part? :-) sas On 3/8/2015 13:10, Ed Jaffe wrote: If you weren't at SHARE in Seattle, you missed an incredible event. You also missed this... https://www.youtube.com/watch?v=vpNfinTuPz4

Re: 8 character mnemonics

For this case you can append -65536 (or x'1') to get the value without a warning. 0080 E544 D120 3039 0120 210 MVHHI FIELD1,12345 0086 E544 D120 9C40 0120 211 MVHHI FIELD1,4 ** ASMA320W Immediate field operand may have incorrect

Re: 8 character mnemonics

Services Group IBM Mainframe Assembler List ASSEMBLER-LIST@LISTSERV.UGA.EDU wrote on 2015/01/26 10:37:40: From: Steve Smith sasd...@gmail.com To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Date: 2015/01/26 10:44 Subject: Re: 8 character mnemonics Sent by: IBM Mainframe Assembler List ASSEMBLER-LIST

Re: LARL question - sets AR?

I recently ran into this problem... I updated a common service subroutine, and for no apparent reason, a CPOOL callable service started returning some junk in AR1. The service routine doesn't touch the ARs, and never switches ASC mode other than a safety SAC 0 at entry. However, because AR1

Re: 2GiB = address 4GiB

That is an excellent overview of z/OS virtual storage. Now that you've reminded me, I believe that's where I got a lot of my knowledge of 64-bit space. One more thing, is that I think that storage above the 512TB barrier* is currently unsupported, as I also think that the Region-1 table for

Re: 2GiB = address 4GiB

It's important to note that the reservation of x'8000' through x'' is merely to help avoid addressing issues, as well-explained previously. It's not a fundamental issue at all, and the architecture itself doesn't have any such restriction. Also, you CAN allocate memory in this area

Re: 2GiB = address 4GiB

I can't remember where this is fully documented, but 64-bit storage is currently divided into about five types: Restricted (2G-32G), LSA, Low (sic) User Region, Common, and Shared. On my test system, LSA starts at x'8_', User region at x'48_', Common at x'1EF_8000', and

Re: Macro to generate DS or DC

John Ehrman pointed this out a while back... I was surprised myself. If you list the RLD map, you can see that there are indeed entries generated for cross-section relative references. btw, HLASM does warn about them. I'm not sure why; maybe because the old linkage editor doesn't support them

Re: Macro to generate DS or DC

Your colleague may have been time-traveling... it's not an old assembler, it's the new one that allows addressing across CSECTs, with relative addressing. So, while LA R1,Field would generate the address in your dynamic copy, a LARL R1,Field would still address it the original CSECT. Seems

Re: ALET

An ALET is an address space identifier. Your question comes across something like I found this thing, I was told it's a spark plug. How do I use it? On Wed, Aug 27, 2014 at 10:42 AM, mar...@pi-sysprog.de wrote: Tony, SAC 0/512 is the same for the other op-sys as well (it is a hardware

Re: nuls vs. blank as padding characters

Or NILH Rx,X'00ff' Or NILF, Rx,X'00ff' For production code, I'm restricted to the opcode set required by the oldest supported release of z/OS, and [LL|I|O|N|X]I[H|L][H|L] instructions pass. NILF does not, but it isn't needed in this particular case. sas On 8/5/2014 9:43, John Gilmore

Re: ASMA034E

I've found that SYSSTATE ARCHLVL=2 takes care of most everything from IBM, with no need for IEABRC, or other OPSYNs. On Sun, Apr 20, 2014 at 3:02 AM, Martin Truebner mar...@pi-sysprog.dewrote: SYSSTATE has been mentioned IEABRC(X) has been mentioned moving it has been mentioned temp base

Re: ASSEMBLER-LIST Digest - 16 Mar 2014 to 18 Mar 2014 (#2014-49)

Very much so. The REXX Reference, starting with chapter 8 explains it all. On Wed, Mar 19, 2014 at 9:04 AM, John Walker jwalker...@yahoo.com wrote: Rexx execs are EASY. But, Rexx interface, is that something different? On Tue, 3/18/14, Automatic

Re: Parameter list changes between calling and called program

This just appeared in my inbox, a year day late. Obviously, you're the victim of some kind of warp in the space/time continuum. Good luck. sas On 3/15/2013 7:00, jan de decker wrote: Hi list, I am struggling with a curious phenomenom: Program YEMI0070 builds a parameter list for program

Re: CamelCase

English (and other Latin-alphabet languages) is mostly case-INsensitive. There's sometimes a difference between Bill and bill, but bILL, BILL, bIlL are just silly versions of the same word. There are some conventions in some c-based languages of using a symbol with a leading Capital letter, and

Re: DC CA'[]'

The main difference among the various flavors of EBCDIC is where the square brackets are. The rest is mostly accented letters. Who knows how that came about, but I'm sure it's not interesting. It seems that HLASM may have wandered into the code-page swamp without a complete plan. sas On Mon,

Re: SI units and such

There's this thing we call irony... check it out, you might like it. On 1/8/2014 22:37, Robert A. Rosenberg wrote: At 10:56 + on 01/08/2014, Mike Kerford-Byrnes wrote about SI units and such: A few years ago I attempted to purchase 225 yards of water pipe from a plumbing merchant, only

Re: Relative Branches / IBM macros

One could always overlay an address into place: 007C 0700130 CNOP 2,4 007E C0FF 131 LLILF RG15,0 00840084 0080132 ORG *-4 0080

Re: Relative Branches / IBM macros

External relative addressing does work, yet HLASM still warns about this, e.g. ASMA215W Relative Immediate external relocation in NOGOFF object text - ESTAE_RESUME Is there any cure for this? My production build process doesn't tolerate any return code that isn't a multiple of 0. I haven't

Avoiding storage reference for a constant

I have a macro that reports the statement number where something bad happened. Some programs that use this are large (although none have yet exceeded 1M lines). This is the logic in the macro that captures that number as efficiently as possible. Anyway, the technique may be useful in other

Re: Some Help with Conditional Assembly

You should consider how IBM macros such as STORAGE handle this situation. It requires an absolute value for LENGTH, and if you want to generate it dynamically, or get it from a memory location, then the user will just have to get the value into a register himself. The two options are an

Re: Why no AGH instruction?

On Mon, Jun 24, 2013 at 12:55 AM, Ed Jaffe edja...@phoenixsoftware.comwrote: The lack of AGH/SGH is a noticeable (and sometimes frustrating) gap in the architecture. Well, that's disappointing. I always thought the system architects were damn close to being infallible and omnipotent :-).

Re: Relative Branches / IBM macros

And only if the target is relatively addressable. I.e. In the same section or object. sas (phone) On Apr 5, 2013 7:21 PM, John Ehrman ehr...@us.ibm.com wrote: You can use LARL to replace LA only if the target is at an even address. John Ehrman

Re: Another you-see-what-you-want-to-see moment

Well, this was explained two weeks ago, but x'0011' is wrong, too. You want b'0011'. At least the assembler might complain about x'11', since it's too big for the 4-bit field. sas On 12/4/2012 15:31, Rich Mastrandrea wrote: Mark, What you need to see is what is immediately after HALFWORD,

Re: Printing a return code

Using TROT is a great idea, but why not code the table like so: HEX2CHAR DCC'000102030405060708090A0B0C0D0E0F' DCC'101112131415161718191A1B1C1D1E1F' DCC'202122232425262728292A2B2C2D2E2F' DCC'303132333435363738393A3B3C3D3E3F' DC

Re: Non-Flexible VSAM macros

I wonder why the macro doesn't just put the normal LA 15,LIT1 in the expansion instead of that goofy DC and S-con. On 3/7/2012 16:28, Ray Overby wrote: Try the following: MVC LIT1,0(R3)SET THE DDNAME TO USE MODCB .,DDNAME=(*,LIT1),. In your working storage

Re: MNEMONICS

Maybe John Gilmore will provide a witty retort, but you surely must know that the number of Russian-literate people here is probably pretty low. Babelfish did nothing but convert this text into HTML entities. On 2/13/2012 19:24, Valeriy Mironenko wrote: Bad Idea. Плохая идея-изменение мнемоники

Re: code comments

There seems to be a common misconception that MVC can't move 256 bytes. It certainly can. It cannot move zero bytes, but that's not much of a limitation. On 2/12/2012 17:45, Bernd Oppolzer wrote: There was a little misunderstanding on my part; I thought that robin suggested the decrement by

Re: VarIabLe DD names in VSAM

S0c3 is very nice for a deliberate abend, since it's extremely rare in its accidental form; so my replacement is EXRL 0,*. sas On 2/10/2012 8:10, McKown, John wrote: I used to do EX *,0 to get an S0C3. I now do j *+2 to get a S0C1. -- John McKown Systems Engineer IV IT Administrative

Re: ASM Program to copy a file

On 12/8/2011 12:57, Steve Comstock wrote: On 12/8/2011 7:14 AM, Lindy Mayfield wrote: There was a kinda-sorta challenge for me to write the most basic assembler program to copy a file. Since I am no assembler programmer by any means, it of course took me some time to get it done. Also I had

Re: How to code TAM instruction

On 6/6/2011 11:19, Mike Hartman wrote: Well, since reviewing TAM, does visual inspection of the following ring any alarm bells? XXX AMODE ANYCAN BE INVOKED BY 31 OR 24-BIT CALLER USING *,R15 BASE REGISTERS STR15,LOADADDR ADDRESS

Re: Instruction Set Architecture

On 9/8/2010 22:05, robin wrote: From: Tony Harminc t...@harminc.com Sent: Thursday, 9 September 2010 7:14 AM On 8 September 2010 15:09, Tom Marchant m42tom-ibmm...@yahoo.com wrote: On Wed, 8 Sep 2010 08:35:42 -0600, Paul Gilmartin wrote: On Sep 8, 2010, at 05:39, robin wrote: Classic

Re: LARL vs. Literal Alignment

John P. Baker wrote: Dale, This code sample misses the whole point. It uses a base register. Baseless code is intended to be exactly that. Baseless. The intent is to reserve registers for calculations and for base registers pointing to dynamic data. No base registers for code, and no base

Re: LARL vs. Literal Alignment

John P. Baker wrote: When using the LARL instruction to reference a literal (i.e., =X'..'), I receive an ASMA058E error message due to the literal not being property aligned (on a halfword boundary). It would seem to me that when a relative instruction references a literal, the assembler

Re: CDS and alignment question

It is the typical way to do it. However, long ago, someone pointed out that this sequence burns 4 bytes to add 1 byte of addressability. Which, to Mr Spock, makes no sense. Furthermore, it is incorrect to put a USING statement before it is valid (although it is fairly common). It should be

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