Try http://www.dunneroberts.co.uk/allsites/gallery/images/big-top.jpg
and http://www.dunneroberts.co.uk/allsites/gallery/images/big-bot.jpg
Tim Exley
-Original Message-
From: Ian Middleton [mailto:[EMAIL PROTECTED]]
Sent: Thursday, 26 September 2002 3:05 a.m.
To: Protel EDA Forum
Wow! I'm amazed that boards like that can be produced with any yield
greater than zero. And that's just for the PCB. How about the part
population process? There's gotta be at least one or two pin shorts or
opens coming off the assembly line on a board that complex!
With a board that
At 05:09 PM 9/24/2002 -0500, Jon Elson wrote:
I don't think there is any automated way to do this, but it should not be a
very difficult process, and should not take more than an hour even for a
fairly complex board.
That's pretty optimistic, I'd say wildly optimistic, having done quite a
few
At 06:10 PM 9/24/2002 -0700, Tony Karavidas wrote:
Dump primitives are just that: dumb. The tools have no idea they are
vias, pads, etc. (except for that thing I mentioned at the top) If
you're lucky, the vias and pads are different sizes, so you could search
for the size of the vias, and select
Hi Ian,
just discovered this minor P99SE Sp6 bug today. Exporting a database
to ACAD R13 DWG format (have no time to check other formats), if you have
tented vias the exported file ignores the tenting and outputs soldermask
voids for all vias.
Sincerely,
Brad Velander.
Lead PCB Designer
Tim Exley wrote:
Try http://www.dunneroberts.co.uk/allsites/gallery/images/big-top.jpg
and http://www.dunneroberts.co.uk/allsites/gallery/images/big-bot.jpg
WOW! I'm glad I didn't have to design (or pay for) that one! Vast numbers
of big quad flat packs on BOTH sides!
Jon
* * * * * * *
Bagotronix Tech Support wrote:
With a board that complex, your board vendor had better actually be doing
electrical test, instead of just charging for it and not doing it...
What? This is endemic in the industry? I've had to can several vendors
for pulling this stunt. But, when they get
Abd ul-Rahman Lomax wrote:
At 05:09 PM 9/24/2002 -0500, Jon Elson wrote:
I don't think there is any automated way to do this, but it should not be a
very difficult process, and should not take more than an hour even for a
fairly complex board.
That's pretty optimistic, I'd say wildly
it has happened to me twice
2 different shops
they charged for test setup, testing, but there were short all over some
of them and they were only double sided
Dennis Saputelli
Jon Elson wrote:
Bagotronix Tech Support wrote:
With a board that complex, your board vendor had better actually
so how does a 'flying probe' test really work?
i understand the general idea of a couple of probes walking around the
comparing connectivity to a 'netlist' made from the gerbers
but it seems to me and i think i read somewhere that this is better at
finding opens than shorts
whereas the good
funnily enough it never happened to me, I have never found a fault on my
boards, and hence don't concern myself too much with the tests on basic
double sided.
-Original Message-
From: Dennis Saputelli [mailto:[EMAIL PROTECTED]]
Sent: Thursday, 26 September 2002 9:54 AM
To: Protel EDA
-Original Message-
From: Abd ul-Rahman Lomax [mailto:[EMAIL PROTECTED]]
Sent: Wednesday, September 25, 2002 3:01 PM
To: Protel EDA Forum
Subject: Re: [PEDA] Collecting / reassigning primatives in
Gerbers etc.
At 06:10 PM 9/24/2002 -0700, Tony Karavidas wrote:
Dump
Thanks, Dennis. W/o naming names of the 'bad' guys, whose the good guy?
Sincerely,
Tim Hutcheson
There are 10 kinds of people in the world;
those that can read binary and those that can't.
-- Anonymous
-Original Message-
From: Dennis
I am trying to use the piece-wise linear controlled source from the
Simulation Function Block Sch.Lib to create a non-linear magnetic circuit
model.
As a start I hooked the PWLR to a previously verified circuit and got the
following error message;
U1 Error: PART TYPE attribute must be a value.
I'm pretty sure that the value that must be present in the part type field
is the actual value of the component. Ie for an inductor, its inductance
value etc. I might however be wrong on this (it wouldn't be a first).
- Original Message -
From: Thomas Josefsson [EMAIL PROTECTED]
To:
On Wed, 25 Sep 2002 16:58:42 -0700, Dennis Saputelli wrote:
so how does a 'flying probe' test really work?
i understand the general idea of a couple of probes walking around the
comparing connectivity to a 'netlist' made from the gerbers
but it seems to me and i think i read somewhere that
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