I've been able to explain well ...
One more concern :
I plan to have 16 such connector-cable pairs on my board ...
do you anticipate any problems with this arrangement ?
please do reply ,
thanks very much
best regards
Anand Kulkarni
--
On Thu, 19 Dec 2002 11:32:43
Bagotronix Tec
vertically
aligned holes. Again the holes have to be perfectly aligned.
Also , the pads have to be prefectly aligned.
Is this "alignment" something that I can expect the PCB manufacturer to easily achieve
?
Please do reply with your suggestions,
thanks very much,
reg
Hi,
I think this may appear silly to a lot of people but I don't know the
meaning of these abbreviations that I came across on a Plastic Leaded
Chip Carrier (PLCC) part description page on the XILINX website .
The package being PLCC-44.
1) PLCS
2) BSC
please do reply
thanks very much
regards
Hi everybody,
Is the "new component wizard " the only way to go about creating a new component
footprint in PROTEL or is there a way by which you can do it yourself (without using
the wizard)?
please do reply,
thanks and regards
Anan
und and power planes ?
I'd really appreciate any suggestions...
thanks and regards
Anand Kulkarni
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n one of the internal signal layers ((( and the terminating
resistor must be placed somewhere in between the FPGA I/O pin and
the connector pin ))) , where can I put the terminating resistor ?
What is generally done in such a situation ?
please do reply with your suggestions,
thanks very much
ne of the internal signal layers ((( and the terminating
resistor must be placed somewhere in between the FPGA I/O pin and
the connector pin ))) , where can I put the terminating resistor ?
What is generally done in such a situation ?
please do reply with your suggestions,
thanks very much
hen I proceed to AUTOROUTING I get a message that says :
"One or more connections cannot be routed due to design rule violations"
now what design rule violations are these ?
Even after I've turned off all rules ?
anybody with any suggestions ?
please reply
thanks very m
pplication.
Anybody have a clue about what might be causing this.
please do reply with you suggestions
thanks very much
Anand Kulkarni
Watch a championship game with Elway or McGwire.
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there a simpler way of doing what I am trying to do ?
I hope you are able to help me;
I'd appreciate any suggestions ,
thanks very much
Anand Kulkarni
--
On Wed, 9 Oct 2002 16:35:41
Tony Karavidas wrote:
>The xilinx FPGA has to be mounted to the outside of the board, ri
;d greatly appreciate any suggestions
thanks and regards
Anand Kulkarni
Watch a championship game with Elway or McGwire.
Enter Now at http://champions.lycos.com
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assign a net to it.
But then do I have to do this for each and every segment of that long track. I think
there is a better way of doing what I want to do.
I'd greatly appreciate any suggestions,
please do reply,
thanks and regards,
Anand Kul
r the second time.Perhaps some body has already faced this
problem or may be I am doing something wrong.
please do reply,
thanks very much ,
Anand Kulkarni
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something similar)
done before fabrication of the board ?
please do reply,
thanks and regards,
Anand Kulkarni
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Devices and
2) Protel DXP & Xilinx Interface
and the link is
http://www.protel.com/resources/tutorials/index.html
hope someone helps
Anand Kulkarni
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