)
- turning off clearance checking? (not preferred)
- turning off clearance checking for that one connector whilst in that
position (how?)?
( P2004 )
=
Dom Bragge CID
Snr PCB Designer
Sydney, Australia
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but there's always more to learn.
dom
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Dom Bragge CID
Snr PCB Designer
Sydney, Australia
( 99SE sp6 )
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, that'd be a bit silly wouldn't it.
=
Dom Bragge CID
Snr PCB Designer
Sydney, Australia
( 99SE sp6 )
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Can anyone give me a quick tip on how to go about this?
I have some decent inhouse 99SE libs but some staff (not all: inc me)
have n't yet converted to P2004. One of EE's needs our 99SE libs in
P2004 format.
=
Dom Bragge CID
Snr PCB Designer
Sydney, Australia
( 99SE sp6 )
Find local
in the staff that you have there
already. Think it through carefully.
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Dom Bragge CID
Snr PCB Designer
Sydney, Australia
( 99SE sp6 )
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but it will be manufactured
many times.
I used to design a lot for long runs. Now much of my work is short
order, as in I often only get only one panel's worth built. An
autorouter is still a great investment. Saving a day or more of my time
with an AR is worth it.
=
Dom Bragge CID
Snr PCB Designer
!
tnx
dB
=
Dom Bragge CID
Snr PCB Designer
Sydney, Australia
( 99SE sp6 )
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--- Dom Bragge [EMAIL PROTECTED] wrote:
I'm trying to organise to output a drawing showing the pin numbers on
the pads of a device that is placed on a board. I'd also like to show
the net names as well (you know, like when you zoom in enough on your
pcb you can see it).
Is there some way
to me that I might need to bluff protel with multiple co-sited
pads or something, so that I get the extra large pad without an SM
being generated for it then maybe a smaller pad (directly on top)
which will be used to define the SM opening.
??
=
--(99SEsp6)
Dom Bragge CID
Snr PCB
--- Abd ulRahman Lomax [EMAIL PROTECTED] wrote: At 02:02 AM
4/5/2004, Dom Bragge wrote:
I have an SMT connector with skinny pads.
I wish to change my footprint so that the pads are 3 times as long
BUT
the soldermask still defines the physical pad as in the original
i.e. only a third
previwer
with the same layers that I'm viewing in PCB then the text doesn't seem
to be sent through. Have I missed some magic?
=
Dom Bragge CID
Snr PCB Designer
Sydney, Australia
( 99SE sp6 )
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Circuit Board Designer's motto:
Measure with a micrometer
Mark with chalk
Cut with an axe!
=
--(99SEsp6)
Dom Bragge CID
Snr PCB Designer
Sydney, Australia
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=
--(99SEsp6)
Dom Bragge CID
Snr PCB Designer
Sydney, Australia
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to sound like a local... there again KIAKnot mightn't mean too much if
you're wearing boxer shorts! :-)
=
--(99SEsp6)
Dom Bragge CID
Snr PCB Designer
Sydney, Australia
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?
I'm trying to generate, say, a library containing all tants I want to
use. I have all the info buried in excel wish to produce an ascii
file I can import into Protel. I'm having one or two niggling problems
this second line might be one of them.
thanks
=
--(99SEsp6)
Dom Bragge
--- Ian Wilson [EMAIL PROTECTED] wrote: On 01:22 PM
10/03/2004, Dom Bragge said:
When I have played with ASCII format files I usually find I need to
add
something to the file (LIB in your case) within Protel and then look
at the
file and then add something more and compare the file.
Yep
, ABC_RES0805_1k2 or what? Where do
you build in your company part number. What do you use all the other
parameters for.
Any suggestions or examples welcome.
=
--
Dom Bragge CID
Snr PCB Designer
Sydney, Australia
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58-60seconds.
Dom Bragge wrote:
I'm having a few probs with my setup here just wanted to bounce the
symptoms off you for any suggestions I could follow up on.
I am running 99SEsp6 XP am connected to a network.
History:
I had My Documents mapped to the H: drive (on a server) instead of my
local
anything like this?
--
Regards,
Dom
Dom Bragge, CID MIEEE | Silverbrook Research PL, PO Box 207
Snr PCB Layout Engr| Balmain NSW 2041, AUSTRALIA
Ph +61-2-9818-6633xt163| [EMAIL PROTECTED]
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with the component). This
looks fairly bulletproof as long as pin2 is *always* the one that is
connected to the tab of a TO220!
--
Regards,
Dom
Dom Bragge, CID MIEEE | Silverbrook Research PL, PO Box 207
Snr PCB Layout Engr| Balmain NSW 2041, AUSTRALIA
Ph +61-2-9818-6633xt163| [EMAIL PROTECTED
I make a 4pin lib part, have a 4th pin on the footprint being the
large hole add a polygon connected to that net? I suppose I'll have to
add an opening for the SMask on the TO-220 footprint as well.
What say you?
--
Regards,
Dom 99SESP6
Dom Bragge, CID MIEEE | Silverbrook Research PL, PO
. I only really want the checking to
be on individual tracks the outline of the polygon. Have I missed some
way of getting this to work properly?
How do you do it (or do you turn acute angle off)?
Thanks in advance
(99SESP6)
--
Regards,
Dom
Dom Bragge, CID MIEEE | Silverbrook Research PL, PO
VK2JNA
Dom Bragge, CID MIEEE | Silverbrook Research PL, PO Box 207
Snr PCB Layout Engr| Balmain NSW 2041, AUSTRALIA
Ph +61-2-9818-6633xt163| [EMAIL PROTECTED]
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Website Visitor wrote:
Does anyone have any experience running Protel 99SE on WinXP? I'm curious whether it will work at all.
Yes, it works here.
--
Regards,
Dom
Dom Bragge, CID MIEEE | Silverbrook Research PL, PO Box 207
Snr PCB Layout Engr| Balmain NSW 2041, AUSTRALIA
Ph +61-2-9818
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