Re: [U-Boot] v2015.04-rc4: broken for custom TI-based board
Hi Peter, On 03/18/15 20:07, Peter Kuemmel wrote: I have a custom board which boots with a patched cm_t35 configuration based on the v2015.01 release. When I update to v2015.04-rc4 the system reboots after the x-loader has read u-boot from MMC and started it. IIUC, we have a working v2015.01 and non working v2015.04-rc4? Does someone has an idea which change could be responsible for this? Not sure. May be you can run a quick git bisect? v2015.01 .. v2015.04-rc4 shouldn't be too much. -- Regards, Igor. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 7/7] ARM: bcm283x: move SoC headers to mach-bcm283x/include/mach
Move arch/arm/include/asm/arch-bcm283x/*
- arch/arm/mach-bcm283x/include/mach/*
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
Acked-by: Stephen Warren swar...@wwwdotorg.org
---
Changes in v2: None
arch/arm/mach-bcm283x/Kconfig | 2 +-
.../{include/asm/arch-bcm2835 = mach-bcm283x/include/mach}/gpio.h| 0
.../{include/asm/arch-bcm2835 = mach-bcm283x/include/mach}/mbox.h| 0
.../{include/asm/arch-bcm2835 = mach-bcm283x/include/mach}/sdhci.h | 0
.../{include/asm/arch-bcm2835 = mach-bcm283x/include/mach}/timer.h | 0
.../{include/asm/arch-bcm2835 = mach-bcm283x/include/mach}/wdog.h| 0
drivers/mmc/bcm2835_sdhci.c | 4 ++--
7 files changed, 3 insertions(+), 3 deletions(-)
rename arch/arm/{include/asm/arch-bcm2835 = mach-bcm283x/include/mach}/gpio.h
(100%)
rename arch/arm/{include/asm/arch-bcm2835 = mach-bcm283x/include/mach}/mbox.h
(100%)
rename arch/arm/{include/asm/arch-bcm2835 =
mach-bcm283x/include/mach}/sdhci.h (100%)
rename arch/arm/{include/asm/arch-bcm2835 =
mach-bcm283x/include/mach}/timer.h (100%)
rename arch/arm/{include/asm/arch-bcm2835 = mach-bcm283x/include/mach}/wdog.h
(100%)
diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
index d5e09e8..b43f2d9 100644
--- a/arch/arm/mach-bcm283x/Kconfig
+++ b/arch/arm/mach-bcm283x/Kconfig
@@ -31,7 +31,7 @@ config SYS_VENDOR
default raspberrypi
config SYS_SOC
- default bcm2835
+ default bcm283x
config SYS_CONFIG_NAME
default rpi if TARGET_RPI
diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h
b/arch/arm/mach-bcm283x/include/mach/gpio.h
similarity index 100%
rename from arch/arm/include/asm/arch-bcm2835/gpio.h
rename to arch/arm/mach-bcm283x/include/mach/gpio.h
diff --git a/arch/arm/include/asm/arch-bcm2835/mbox.h
b/arch/arm/mach-bcm283x/include/mach/mbox.h
similarity index 100%
rename from arch/arm/include/asm/arch-bcm2835/mbox.h
rename to arch/arm/mach-bcm283x/include/mach/mbox.h
diff --git a/arch/arm/include/asm/arch-bcm2835/sdhci.h
b/arch/arm/mach-bcm283x/include/mach/sdhci.h
similarity index 100%
rename from arch/arm/include/asm/arch-bcm2835/sdhci.h
rename to arch/arm/mach-bcm283x/include/mach/sdhci.h
diff --git a/arch/arm/include/asm/arch-bcm2835/timer.h
b/arch/arm/mach-bcm283x/include/mach/timer.h
similarity index 100%
rename from arch/arm/include/asm/arch-bcm2835/timer.h
rename to arch/arm/mach-bcm283x/include/mach/timer.h
diff --git a/arch/arm/include/asm/arch-bcm2835/wdog.h
b/arch/arm/mach-bcm283x/include/mach/wdog.h
similarity index 100%
rename from arch/arm/include/asm/arch-bcm2835/wdog.h
rename to arch/arm/mach-bcm283x/include/mach/wdog.h
diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
index 92f7d89..4ec2968 100644
--- a/drivers/mmc/bcm2835_sdhci.c
+++ b/drivers/mmc/bcm2835_sdhci.c
@@ -39,8 +39,8 @@
#include common.h
#include malloc.h
#include sdhci.h
-#include asm/arch/timer.h
-#include asm/arch-bcm2835/sdhci.h
+#include mach/timer.h
+#include mach/sdhci.h
/* 400KHz is max freq for card ID etc. Use that as min */
#define MIN_FREQ 40
--
1.9.1
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[U-Boot] [PATCH v3 3/7] m68k: remove arch/m68k/lib/board.c
All the M68000 boards have switched to Generic Board.
This file is no longer necessary.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
Cc: Huan Wang alison.w...@freescale.com
Cc: Angelo Dureghello ang...@sysam.it
---
Changes in v2: None
arch/m68k/lib/Makefile | 3 -
arch/m68k/lib/board.c | 642 -
2 files changed, 645 deletions(-)
delete mode 100644 arch/m68k/lib/board.c
diff --git a/arch/m68k/lib/Makefile b/arch/m68k/lib/Makefile
index d0e1a84..73d40bd 100644
--- a/arch/m68k/lib/Makefile
+++ b/arch/m68k/lib/Makefile
@@ -5,9 +5,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-ifndef CONFIG_SYS_GENERIC_BOARD
-obj-y += board.o
-endif
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-y += cache.o
obj-y += interrupts.o
diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c
deleted file mode 100644
index 9caff73..000
--- a/arch/m68k/lib/board.c
+++ /dev/null
@@ -1,642 +0,0 @@
-/*
- * (C) Copyright 2003
- * Josef Baumgartner josef.baumgart...@telex.de
- *
- * (C) Copyright 2000-2002
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include watchdog.h
-#include command.h
-#include malloc.h
-#include stdio_dev.h
-#include linux/compiler.h
-
-#include asm/immap.h
-
-#if defined(CONFIG_CMD_IDE)
-#include ide.h
-#endif
-#if defined(CONFIG_CMD_SCSI)
-#include scsi.h
-#endif
-#if defined(CONFIG_CMD_KGDB)
-#include kgdb.h
-#endif
-#ifdef CONFIG_STATUS_LED
-#include status_led.h
-#endif
-#include net.h
-#include serial.h
-#ifdef CONFIG_SYS_ALLOC_DPRAM
-#include commproc.h
-#endif
-#include version.h
-
-#if defined(CONFIG_HARD_I2C) || \
- defined(CONFIG_SYS_I2C)
-#include i2c.h
-#endif
-
-#ifdef CONFIG_CMD_SPI
-#include spi.h
-#endif
-
-#ifdef CONFIG_BITBANGMII
-#include miiphy.h
-#endif
-
-#include nand.h
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static char *failed = *** failed ***\n;
-
-#include environment.h
-
-extern ulong __init_end;
-extern ulong __bss_end;
-
-#if defined(CONFIG_WATCHDOG)
-# undef INIT_FUNC_WATCHDOG_INIT
-# define INIT_FUNC_WATCHDOG_INIT watchdog_init,
-# define WATCHDOG_DISABLE watchdog_disable
-
-extern int watchdog_init(void);
-extern int watchdog_disable(void);
-#else
-# define INIT_FUNC_WATCHDOG_INIT /* undef */
-# define WATCHDOG_DISABLE /* undef */
-#endif /* CONFIG_WATCHDOG */
-
-ulong monitor_flash_len;
-
-/
- * Utilities *
-
- */
-
-/*
- * All attempts to come up with a common initialization sequence
- * that works for all boards and architectures failed: some of the
- * requirements are just _too_ different. To get rid of the resulting
- * mess of board dependend #ifdef'ed code we now make the whole
- * initialization sequence configurable to the user.
- *
- * The requirements for any new initalization function is simple: it
- * receives a pointer to the global data structure as it's only
- * argument, and returns an integer return code, where 0 means
- * continue and != 0 means fatal error, hang the system.
- */
-typedef int (init_fnc_t) (void);
-
-/
- * Init Utilities
-
- * Some of this code should be moved into the core functions,
- * but let's get it working (again) first...
- */
-
-static int init_baudrate (void)
-{
- gd-baudrate = getenv_ulong(baudrate, 10, CONFIG_BAUDRATE);
- return 0;
-}
-
-/***/
-
-static int init_func_ram (void)
-{
- int board_type = 0; /* use dummy arg */
- puts (DRAM: );
-
- if ((gd-ram_size = initdram (board_type)) 0) {
- print_size (gd-ram_size, \n);
- return (0);
- }
- puts (failed);
- return (1);
-}
-
-/***/
-
-#if defined(CONFIG_HARD_I2C) ||defined(CONFIG_SYS_I2C)
-static int init_func_i2c (void)
-{
- puts (I2C: );
-#ifdef CONFIG_SYS_I2C
- i2c_init_all();
-#else
- i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
-#endif
- puts (ready\n);
- return (0);
-}
-#endif
-
-#if defined(CONFIG_HARD_SPI)
-static int init_func_spi (void)
-{
- puts (SPI: );
- spi_init ();
- puts (ready\n);
- return (0);
-}
-#endif
-
-/***/
-
-/
- * Initialization sequence *
-
- */
-
-init_fnc_t *init_sequence[] = {
[U-Boot] [PATCH] mmc: fix OCR Polling
If in mmc_send_op_cond, OCR_BUSY is set in CMD1's response, then
state is transfered to Ready state, and there is no need to send
CMD1 again. Otherwise following CMD1 will recieve no response, or
timeour error from driver such as fsl_esdhc.c.
If not into Ready state in previous CMD1, then continue CMD1 command.
In mmc_complete_op_cond, we use the value mmc-op_cond_response
from mmc_send_op_cond, since there should be no CMD1 command between
mmc_send_op_cond and mmc_complete_op_cond
Before fixing this, uboot log shows:
CMD_SEND:0
ARG 0x
MMC_RSP_NONE
CMD_SEND:8
ARG 0x01AA
MMC_RSP_R1,5,6,7 0x18EC1504
CMD_SEND:55
ARG 0x
MMC_RSP_R1,5,6,7 0x18EC1504
CMD_SEND:0
ARG 0x
MMC_RSP_NONE
CMD_SEND:1
ARG 0x
MMC_RSP_R3,4 0x00FF8080
CMD_SEND:1
ARG 0x4030
MMC_RSP_R3,4 0xC0FF8080 -- Already OCR_BUSY set
CMD_SEND:1
ARG 0x4030
MMC_RSP_R3,4 0x0096850A -- Failed CMD1
MMC init failed
Using this patch, this issue is fixed, emmc can be detected correctly.
Signed-off-by: Peng Fan peng@freescale.com
---
drivers/mmc/mmc.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index a13769e..43a9a8a 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -406,14 +406,23 @@ static int mmc_complete_op_cond(struct mmc *mmc)
mmc-op_cond_pending = 0;
start = get_timer(0);
- do {
+ /*
+* If in mmc_send_op_cond, OCR_BUSY is set in CMD1's response, then
+* state is transfered to Ready state, and there is no need to
+* send CMD1 again. Otherwise following CMD1 will recieve no response,
+* or timeour error from driver such as fsl_esdhc.c.
+*
+* If not into Ready state in previous CMD1, then continue CMD1
+* command.
+*/
+ while (!(mmc-op_cond_response OCR_BUSY)) {
err = mmc_send_op_cond_iter(mmc, cmd, 1);
if (err)
return err;
if (get_timer(start) timeout)
return UNUSABLE_ERR;
udelay(100);
- } while (!(mmc-op_cond_response OCR_BUSY));
+ }
if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
--
1.8.4
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[U-Boot] [PATCH 2/2] board/BuR/common: remove unused function 'blink'
From: Hannes Petermaier hannes.peterma...@br-automation.com
since we have possibility to write out on lcd whats going on, we don't need
the gpio blink functionality anymore.
Signed-off-by: Hannes Petermaier hannes.peterma...@br-automation.com
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---
board/BuR/common/bur_common.h |1 -
board/BuR/common/common.c | 14 --
2 files changed, 15 deletions(-)
diff --git a/board/BuR/common/bur_common.h b/board/BuR/common/bur_common.h
index 3061e4c..e4896fb 100644
--- a/board/BuR/common/bur_common.h
+++ b/board/BuR/common/bur_common.h
@@ -16,7 +16,6 @@
int load_lcdtiming(struct am335x_lcdpanel *panel);
void br_summaryscreen(void);
-void blink(u32 blinks, u32 intervall, u32 pin);
void pmicsetup(u32 mpupll);
void enable_uart0_pin_mux(void);
void enable_i2c_pin_mux(void);
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 91834eb..ccaa9c6 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -441,20 +441,6 @@ void lcd_enable(void)
#error LCD-support with a suitable FB-Driver is mandatory !
#endif /* CONFIG_LCD */
-void blink(u32 blinks, u32 intervall, u32 pin)
-{
- gpio_direction_output(pin, 0);
- int val = 0;
-
- do {
- val ^= 0x01;
- gpio_set_value(pin, val);
- mdelay(intervall);
- } while (blinks--);
-
- gpio_set_value(pin, 0);
-}
-
#ifdef CONFIG_SPL_BUILD
void pmicsetup(u32 mpupll)
{
--
1.7.9.5
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[U-Boot] [PATCH 1/2] board/BuR/common: move I2C initialization from common part to board-specific
From: Hannes Petermaier hannes.peterma...@br-automation.com
At this time I2C and responsible pin-mux is setup during PMIC initialziation
within common.c, this is possible because today PMIC is always connected on
I2C0.
In Future this will be changed, PMIC isn't anymore connected to bus0 in call
cases.
So we do following:
- rename enable_i2c_pin_mux0 to enable_i2c_pin_mux to be generic for enabling
pin-mux on different or more busses.
- move the call to i2c_pin_mux and i2c_init from common.c to the specific
board.c
Signed-off-by: Hannes Petermaier hannes.peterma...@br-automation.com
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---
board/BuR/common/bur_common.h |2 +-
board/BuR/common/common.c |4
board/BuR/kwb/board.c |3 ++-
board/BuR/kwb/mux.c |2 +-
board/BuR/tseries/board.c |4
board/BuR/tseries/mux.c |2 +-
6 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/board/BuR/common/bur_common.h b/board/BuR/common/bur_common.h
index 39afbba..3061e4c 100644
--- a/board/BuR/common/bur_common.h
+++ b/board/BuR/common/bur_common.h
@@ -19,7 +19,7 @@ void br_summaryscreen(void);
void blink(u32 blinks, u32 intervall, u32 pin);
void pmicsetup(u32 mpupll);
void enable_uart0_pin_mux(void);
-void enable_i2c0_pin_mux(void);
+void enable_i2c_pin_mux(void);
void enable_board_pin_mux(void);
int board_eth_init(bd_t *bis);
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index 5ff8a7e..91834eb 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -461,10 +461,6 @@ void pmicsetup(u32 mpupll)
int mpu_vdd;
int usb_cur_lim;
- /* setup I2C */
- enable_i2c0_pin_mux();
- i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
-
if (i2c_probe(TPS65217_CHIP_PM)) {
puts(PMIC (0x24) not found! skip further initalization.\n);
return;
diff --git a/board/BuR/kwb/board.c b/board/BuR/kwb/board.c
index 892311e..6eed7e0 100644
--- a/board/BuR/kwb/board.c
+++ b/board/BuR/kwb/board.c
@@ -124,7 +124,8 @@ void am33xx_spl_board_init(void)
gpio_direction_output(LCD_PWR, 0);
/* setup I2C */
- enable_i2c0_pin_mux();
+ enable_i2c_pin_mux();
+ i2c_set_bus_num(0);
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
/* power-ON 3V3 via Resetcontroller */
diff --git a/board/BuR/kwb/mux.c b/board/BuR/kwb/mux.c
index 9f89b5e..2b1d8d3 100644
--- a/board/BuR/kwb/mux.c
+++ b/board/BuR/kwb/mux.c
@@ -180,7 +180,7 @@ void enable_uart0_pin_mux(void)
configure_module_pin_mux(uart0_pin_mux);
}
-void enable_i2c0_pin_mux(void)
+void enable_i2c_pin_mux(void)
{
configure_module_pin_mux(i2c0_pin_mux);
}
diff --git a/board/BuR/tseries/board.c b/board/BuR/tseries/board.c
index 9402aa4..89e989f 100644
--- a/board/BuR/tseries/board.c
+++ b/board/BuR/tseries/board.c
@@ -123,6 +123,10 @@ void am33xx_spl_board_init(void)
/* setup LCD-Pixel Clock */
writel(0x2, cmdpll-clklcdcpixelclk); /* clock comes from perPLL M2 */
+ /* setup I2C */
+ enable_i2c_pin_mux();
+ i2c_set_bus_num(0);
+ i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
pmicsetup(0);
}
diff --git a/board/BuR/tseries/mux.c b/board/BuR/tseries/mux.c
index 2c87a63..ac7e885 100644
--- a/board/BuR/tseries/mux.c
+++ b/board/BuR/tseries/mux.c
@@ -226,7 +226,7 @@ void enable_uart0_pin_mux(void)
configure_module_pin_mux(uart0_pin_mux);
}
-void enable_i2c0_pin_mux(void)
+void enable_i2c_pin_mux(void)
{
configure_module_pin_mux(i2c0_pin_mux);
}
--
1.7.9.5
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[U-Boot] [PATCH v3 6/7] ARM: bcm283x: merge BCM2835/BCM2836 directories into mach-bcm283x
BCM2835 (used on Raspberry Pi) and BCM2836 (used on Raspberry Pi 2)
are similar enough. One of the biggest differences is the ARM
processor. It is reasonable to collect the source files into a
single place, arch/arm/mach-bcm283x/.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
Acked-by: Stephen Warren swar...@wwwdotorg.org
---
Changes in v2: None
arch/arm/Kconfig | 15 +++-
arch/arm/Makefile | 1 +
arch/arm/cpu/arm1176/Makefile | 2 --
arch/arm/cpu/arm1176/bcm2835/Kconfig | 12 ---
arch/arm/cpu/armv7/Makefile| 1 -
arch/arm/cpu/armv7/bcm2835/Makefile| 13 ---
arch/arm/mach-bcm283x/Kconfig | 40 ++
.../{cpu/arm1176/bcm2835 = mach-bcm283x}/Makefile | 2 +-
.../{cpu/arm1176/bcm2835 = mach-bcm283x}/init.c | 0
.../bcm2835 = mach-bcm283x}/lowlevel_init.S | 0
.../{cpu/arm1176/bcm2835 = mach-bcm283x}/mbox.c | 0
.../{cpu/arm1176/bcm2835 = mach-bcm283x}/reset.c | 0
.../{cpu/arm1176/bcm2835 = mach-bcm283x}/timer.c | 0
board/raspberrypi/rpi/Kconfig | 15
board/raspberrypi/rpi_2/Kconfig| 15
configs/rpi_2_defconfig| 1 +
configs/rpi_defconfig | 1 +
17 files changed, 48 insertions(+), 70 deletions(-)
delete mode 100644 arch/arm/cpu/arm1176/bcm2835/Kconfig
delete mode 100644 arch/arm/cpu/armv7/bcm2835/Makefile
create mode 100644 arch/arm/mach-bcm283x/Kconfig
rename arch/arm/{cpu/arm1176/bcm2835 = mach-bcm283x}/Makefile (72%)
rename arch/arm/{cpu/arm1176/bcm2835 = mach-bcm283x}/init.c (100%)
rename arch/arm/{cpu/arm1176/bcm2835 = mach-bcm283x}/lowlevel_init.S (100%)
rename arch/arm/{cpu/arm1176/bcm2835 = mach-bcm283x}/mbox.c (100%)
rename arch/arm/{cpu/arm1176/bcm2835 = mach-bcm283x}/reset.c (100%)
rename arch/arm/{cpu/arm1176/bcm2835 = mach-bcm283x}/timer.c (100%)
delete mode 100644 board/raspberrypi/rpi/Kconfig
delete mode 100644 board/raspberrypi/rpi_2/Kconfig
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b9ebee1..9292e98 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -286,13 +286,8 @@ config TARGET_MX35PDK
bool Support mx35pdk
select CPU_ARM1136
-config TARGET_RPI
- bool Support rpi
- select CPU_ARM1176
-
-config TARGET_RPI_2
- bool Support rpi_2
- select CPU_V7
+config ARCH_BCM283X
+ bool Broadcom BCM283X family
config TARGET_INTEGRATORAP_CM946ES
bool Support integratorap_cm946es
@@ -723,9 +718,9 @@ endchoice
source arch/arm/mach-at91/Kconfig
-source arch/arm/mach-davinci/Kconfig
+source arch/arm/mach-bcm283x/Kconfig
-source arch/arm/cpu/arm1176/bcm2835/Kconfig
+source arch/arm/mach-davinci/Kconfig
source arch/arm/cpu/armv7/exynos/Kconfig
@@ -834,8 +829,6 @@ source board/palmtreo680/Kconfig
source board/phytec/pcm051/Kconfig
source board/ppcag/bg0900/Kconfig
source board/pxa255_idp/Kconfig
-source board/raspberrypi/rpi/Kconfig
-source board/raspberrypi/rpi_2/Kconfig
source board/samsung/smdk2410/Kconfig
source board/sandisk/sansa_fuze_plus/Kconfig
source board/scb9328/Kconfig
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 08946de..bac3cb2 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -5,6 +5,7 @@
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
machine-$(CONFIG_ARCH_AT91)+= at91
+machine-$(CONFIG_ARCH_BCM283X) += bcm283x
machine-$(CONFIG_ARCH_DAVINCI) += davinci
machine-$(CONFIG_ARCH_HIGHBANK)+= highbank
machine-$(CONFIG_ARCH_KEYSTONE)+= keystone
diff --git a/arch/arm/cpu/arm1176/Makefile b/arch/arm/cpu/arm1176/Makefile
index 480e130..deec427 100644
--- a/arch/arm/cpu/arm1176/Makefile
+++ b/arch/arm/cpu/arm1176/Makefile
@@ -10,5 +10,3 @@
extra-y= start.o
obj-y = cpu.o
-
-obj-$(CONFIG_BCM2835) += bcm2835/
diff --git a/arch/arm/cpu/arm1176/bcm2835/Kconfig
b/arch/arm/cpu/arm1176/bcm2835/Kconfig
deleted file mode 100644
index 73cc72b..000
--- a/arch/arm/cpu/arm1176/bcm2835/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
-if TARGET_RPI || TARGET_RPI_2
-
-config DM
- default y
-
-config DM_SERIAL
- default y
-
-config DM_GPIO
- default y
-
-endif
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 1312a9d..21fc03b 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -39,7 +39,6 @@ endif
obj-$(if $(filter am33xx,$(SOC)),y) += am33xx/
obj-$(if $(filter armada-xp,$(SOC)),y) += armada-xp/
-obj-$(CONFIG_BCM2835) += bcm2835/
obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/
obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/
obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/
diff --git a/arch/arm/cpu/armv7/bcm2835/Makefile
b/arch/arm/cpu/armv7/bcm2835/Makefile
[U-Boot] [PATCH v3 4/4] common/lcd_console: introduce display/framebuffer rotation
From: Hannes Petermaier hannes.peterma...@br-automation.com
Sometimes, for example if the display is mounted in portrait mode or even if it
mounted landscape but rotated by 180 degrees, we need to rotate our content of
the display respectively the framebuffer, so that user can read the messages
who are printed out.
For this we introduce the feature called CONFIG_LCD_ROTATION, this may be
defined in the board-configuration if needed. After this the lcd_console will
be initialized with a given rotation from vl_rot out of vidinfo_t which is
provided by the board specific code.
If CONFIG_LCD_ROTATION is not defined, the console will be initialized with
0 degrees rotation.
Signed-off-by: Hannes Petermaier hannes.peterma...@br-automation.com
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---
Changes in v3:
- rename lcd_address to fbbase for better readability.
- remove empty line lcd_console.c
- use printf instead puts to inform about invalid-fb rotation.
- avoid code-duplication (move define of fbptr_t into lcd.h)
Changes in v2:
- cleanup README text for feature
- don't make code cleanups (lcd_console.c) within this patch
- remove (unnary) comment in lcd_console.h
- update year to 2015 within copyright in lcd_console.c
- move rotation related code into separate file lcd_console_rotation.c
- rework rotation code
- change meaning of vl_rot to match fbcon=rotate:n from the linux-kernel
README| 22 +
common/Makefile |1 +
common/lcd.c | 15 ++-
common/lcd_console.c | 161 +--
common/lcd_console_rotation.c | 208 +
include/lcd.h |9 ++
include/lcd_console.h | 18 +++-
7 files changed, 349 insertions(+), 85 deletions(-)
create mode 100644 common/lcd_console_rotation.c
diff --git a/README b/README
index b0124d6..c649de1 100644
--- a/README
+++ b/README
@@ -1947,6 +1947,28 @@ CBFS (Coreboot Filesystem) support
the console jump but can help speed up operation when scrolling
is slow.
+ CONFIG_LCD_ROTATION
+
+ Sometimes, for example if the display is mounted in portrait
+ mode or even if it mounted landscape but rotated by 180degree,
+ we need to rotate our content of the display respectively the
+ framebuffer, so that user can read the messages who are printed
+ out.
+ For this we introduce the feature called CONFIG_LCD_ROTATION,
+ this may be defined in the board-configuration if needed. After
+ this the lcd_console will be initialized with a given rotation
+ from vl_rot out of vidinfo_t which is provided by the board
+ specific code.
+ The value for vl_rot is coded as following (matching to
+ fbcon=rotate:n linux-kernel commandline):
+ 0 = no rotation respectively 0 degree
+ 1 = 90 degree rotation
+ 2 = 180 degree rotation
+ 3 = 270 degree rotation
+
+ If CONFIG_LCD_ROTATION is not defined, the console will be
+ initialized with 0degree rotation.
+
CONFIG_LCD_BMP_RLE8
Support drawing of RLE8-compressed bitmaps on the LCD.
diff --git a/common/Makefile b/common/Makefile
index 7216a13..a1b3c09 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -200,6 +200,7 @@ obj-$(CONFIG_KALLSYMS) += kallsyms.o
obj-y += splash.o
obj-$(CONFIG_SPLASH_SOURCE) += splash_source.o
obj-$(CONFIG_LCD) += lcd.o lcd_console.o
+obj-$(CONFIG_LCD_ROTATION) += lcd_console_rotation.o
obj-$(CONFIG_LCD_DT_SIMPLEFB) += lcd_simplefb.o
obj-$(CONFIG_LYNXKDI) += lynxkdi.o
obj-$(CONFIG_MENU) += menu.o
diff --git a/common/lcd.c b/common/lcd.c
index f33942c..d1b4ca7 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -167,7 +167,6 @@ int drv_lcd_init(void)
void lcd_clear(void)
{
- short console_rows, console_cols;
int bg_color;
char *s;
ulong addr;
@@ -211,16 +210,14 @@ void lcd_clear(void)
}
#endif
#endif
+ /* setup text-console */
+ debug([LCD] setting up console...\n);
+ lcd_init_console(lcd_base,
+panel_info.vl_col,
+panel_info.vl_row,
+panel_info.vl_rot);
/* Paint the logo and retrieve LCD base address */
debug([LCD] Drawing the logo...\n);
-#if defined(CONFIG_LCD_LOGO) !defined(CONFIG_LCD_INFO_BELOW_LOGO)
- console_rows = (panel_info.vl_row - BMP_LOGO_HEIGHT);
- console_rows /= VIDEO_FONT_HEIGHT;
-#else
- console_rows = panel_info.vl_row / VIDEO_FONT_HEIGHT;
-#endif
- console_cols = panel_info.vl_col / VIDEO_FONT_WIDTH;
- lcd_init_console(lcd_base, console_rows, console_cols);
if (do_splash) {
s = getenv(splashimage);
if
Re: [U-Boot] [PATCH v2 7/7] ARM: bcm283x: move SoC headers to mach-bcm283x/include/mach
2015-03-17 12:35 GMT+09:00 Masahiro Yamada yamada.masah...@socionext.com: Move arch/arm/include/asm/arch-bcm283x/* - arch/arm/mach-bcm283x/include/mach/* Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Cc: Stephen Warren swar...@nvidia.com Based on Stephen's comment in: http://lists.denx.de/pipermail/u-boot/2015-March/208135.html Acked-by: Stephen Warren swarren at wwwdotorg.org -- Best Regards Masahiro Yamada ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix
On 2015-03-18 17:54, Ian Campbell wrote: On Wed, 2015-03-11 at 11:11 -0400, Tom Rini wrote: On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote: Changes in v4: - rebased over master - implemented psci_get_cpu_id as weak function - implemented psci_disable/enable_smp as weak functions - adjusted register interface of psci_get_cpu_stack_top This version (+ the non-cached memory init fix) can also be found at https://github.com/siemens/u-boot/tree/jetson-tk1-v5. So, I don't know where exactly this should come in. Hans or Ian, if you can ack the sunxi changes (I saw you tested it Ian, thanks!) I just acked the ARM: Factor out common psci_get_cpu_id patch, which I think was the only sunxi bit. Let me know if I'm wrong about that or there is something non-sunxi you'd like me to look at... Actually, patches 1..6 affect sunxi, though some only by moving code into a shared place. Jan -- Siemens AG, Corporate Technology, CT RTC ITP SES-DE Corporate Competence Center Embedded Linux ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 02/14] ARM: Factor out common psci_get_cpu_id
On 2015-03-18 17:54, Ian Campbell wrote: On Mon, 2015-03-09 at 08:00 +0100, Jan Kiszka wrote: Will be required for obtaining the ID of the current CPU in shared PSCI functions. The default implementation requires a dense ID space and only supports a single cluster. Therefore, the functions can be overloaded in cases where these assumptions do not hold. CC: Marc Zyngier marc.zyng...@arm.com Signed-off-by: Jan Kiszka jan.kis...@siemens.com +@ Requires dense and single-cluste CPU ID space cluster Other than that: Acked-by: Ian Campbell i...@hellion.org.uk Thanks, fixed locally. I will resend the series if requested or more remarks arrive. Jan -- Siemens AG, Corporate Technology, CT RTC ITP SES-DE Corporate Competence Center Embedded Linux ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/4] common/lcd_console: ask only one-time for bg/fg-color per call
From: Hannes Petermaier hannes.peterma...@br-automation.com
Don't call the lcd_getfgcolor and lcd_getbgcolor within the draw-loop, this
only wastes time.
Signed-off-by: Hannes Petermaier hannes.peterma...@br-automation.com
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---
Changes in v3: None
Changes in v2: None
common/lcd_console.c |7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/common/lcd_console.c b/common/lcd_console.c
index 243b7c5..b7dda7a 100644
--- a/common/lcd_console.c
+++ b/common/lcd_console.c
@@ -59,7 +59,8 @@ static void lcd_putc_xy(ushort x, ushort y, char c)
{
uchar *dest;
ushort row;
- int fg_color, bg_color;
+ int fg_color = lcd_getfgcolor();
+ int bg_color = lcd_getbgcolor();
int i;
dest = (uchar *)(lcd_console_address +
@@ -73,10 +74,6 @@ static void lcd_putc_xy(ushort x, ushort y, char c)
#else
uchar *d = dest;
#endif
-
- fg_color = lcd_getfgcolor();
- bg_color = lcd_getbgcolor();
-
uchar bits;
bits = video_fontdata[c * VIDEO_FONT_HEIGHT + row];
--
1.7.9.5
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Re: [U-Boot] [PATCH] remove unnecessary version.h includes
On Tue, Mar 17, 2015 at 9:28 PM, Rob Herring r...@kernel.org wrote: Various files are needlessly rebuilt every time due to the version and build time changing. As version.h is not actually needed, remove the include. Signed-off-by: Rob Herring r...@kernel.org Cc: Albert Aribaud albert.u.b...@aribaud.net Cc: Stefano Babic sba...@denx.de Cc: Minkyu Kang mk7.k...@samsung.com Cc: Marek Vasut ma...@denx.de Cc: Tom Warren twar...@nvidia.com Cc: Michal Simek mon...@monstr.eu Cc: Macpaul Lin macp...@andestech.com Cc: Wolfgang Denk w...@denx.de Cc: York Sun york...@freescale.com Cc: Stefan Roese s...@denx.de Cc: Nobuhiro Iwamatsu iwama...@nigauri.org Cc: Simon Glass s...@chromium.org Cc: Philippe Reynes trem...@yahoo.fr Cc: Eric Jarrige eric.jarr...@armadeus.org Cc: Linus Walleij linus.wall...@linaro.org Cc: David Müller d.muel...@elsoft.ch Cc: Phil Edworthy phil.edwor...@renesas.com Cc: Robert Baldyga r.bald...@samsung.com Cc: Łukasz Majewski l.majew...@samsung.com Cc: Torsten Koschorrek koschor...@synertronixx.de Cc: Anatolij Gustschin ag...@denx.de Thanks for spotting this very obvious mess. Reviewed-by: Linus Walleij linus.wall...@linaro.org Yours, Linus Walleij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/4] common/lcd_console: introduce display/framebuffer rotation
Sometimes, for example if the display is mounted in portrait mode or even if it mounted landscape but rotated by 180 degree, we need to rotate our content of the display respectively the framebuffer, so that user can read the messages who are printed out. For this we introduce the feature called CONFIG_LCD_ROTATION, this may be defined in the board-configuration if needed. After this the lcd_console will be initialized with a given rotation from vl_rot out of vidinfo_t which is provided by the board specific code. The value for vl_rot is coded as following (matching to fbcon=rotate:n linux- kernel commandline): 0 = no rotation respectively 0 degree 1 = 90 degree rotation 2 = 180 degree rotation 3 = 270 degree rotation If CONFIG_LCD_ROTATION is not defined, the console will be initialized with 0 degrees rotation. Patch 1-3 make preparations to the code. Patch 4 implements the new feature Changes in v3: - rename lcd_address to fbbase for better readability. - remove empty line lcd_console.c - use printf instead puts to inform about invalid-fb rotation. - avoid code-duplication (move define of fbptr_t into lcd.h) Changes in v2: - cleanup README text for feature - don't make code cleanups (lcd_console.c) within this patch - remove (unnary) comment in lcd_console.h - update year to 2015 within copyright in lcd_console.c - move rotation related code into separate file lcd_console_rotation.c - rework rotation code - change meaning of vl_rot to match fbcon=rotate:n from the linux-kernel Hannes Petermaier (4): common/lcd_console: cleanup lcd_drawchars/lcd_putc_xy common/lcd_console: ask only one-time for bg/fg-color per call common/lcd_console: move single static variables into common (static) structure common/lcd_console: introduce display/framebuffer rotation README| 22 + common/Makefile |1 + common/lcd.c | 15 ++- common/lcd_console.c | 201 --- common/lcd_console_rotation.c | 208 + include/lcd.h |9 ++ include/lcd_console.h | 18 +++- 7 files changed, 363 insertions(+), 111 deletions(-) create mode 100644 common/lcd_console_rotation.c -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/4] common/lcd_console: cleanup lcd_drawchars/lcd_putc_xy
From: Hannes Petermaier hannes.peterma...@br-automation.com
the capability of drawing some *str with count from lcd_drawchars is unnary.
It is always called from lcd_putc_xy with one character of and count = 1.
So we simply rename lcd_drawchars into lcd_putc_xy and remove the loops inside.
Signed-off-by: Hannes Petermaier hannes.peterma...@br-automation.com
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---
Changes in v3: None
Changes in v2: None
common/lcd_console.c | 23 +++
1 file changed, 7 insertions(+), 16 deletions(-)
diff --git a/common/lcd_console.c b/common/lcd_console.c
index 8bf83b9..243b7c5 100644
--- a/common/lcd_console.c
+++ b/common/lcd_console.c
@@ -55,18 +55,17 @@ int lcd_get_screen_columns(void)
return console_cols;
}
-static void lcd_drawchars(ushort x, ushort y, uchar *str, int count)
+static void lcd_putc_xy(ushort x, ushort y, char c)
{
uchar *dest;
ushort row;
int fg_color, bg_color;
+ int i;
dest = (uchar *)(lcd_console_address +
y * lcd_line_length + x * NBITS(LCD_BPP) / 8);
for (row = 0; row VIDEO_FONT_HEIGHT; ++row, dest += lcd_line_length) {
- uchar *s = str;
- int i;
#if LCD_BPP == LCD_COLOR16
ushort *d = (ushort *)dest;
#elif LCD_BPP == LCD_COLOR32
@@ -77,25 +76,17 @@ static void lcd_drawchars(ushort x, ushort y, uchar *str,
int count)
fg_color = lcd_getfgcolor();
bg_color = lcd_getbgcolor();
- for (i = 0; i count; ++i) {
- uchar c, bits;
- c = *s++;
- bits = video_fontdata[c * VIDEO_FONT_HEIGHT + row];
+ uchar bits;
+ bits = video_fontdata[c * VIDEO_FONT_HEIGHT + row];
- for (c = 0; c 8; ++c) {
- *d++ = (bits 0x80) ? fg_color : bg_color;
- bits = 1;
- }
+ for (i = 0; i 8; ++i) {
+ *d++ = (bits 0x80) ? fg_color : bg_color;
+ bits = 1;
}
}
}
-static inline void lcd_putc_xy(ushort x, ushort y, uchar c)
-{
- lcd_drawchars(x, y, c, 1);
-}
-
static void console_scrollup(void)
{
const int rows = CONFIG_CONSOLE_SCROLL_LINES;
--
1.7.9.5
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[U-Boot] [PATCH v3 3/4] common/lcd_console: move single static variables into common (static) structure
From: Hannes Petermaier hannes.peterma...@br-automation.com
For coming implementation of lcd_console rotation, we will need some more
variables for holding information about framebuffer size, rotation, ...
For better readability we catch all them into a common structure.
Signed-off-by: Hannes Petermaier hannes.peterma...@br-automation.com
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---
Changes in v3: None
Changes in v2: None
common/lcd_console.c | 76 +-
1 file changed, 38 insertions(+), 38 deletions(-)
diff --git a/common/lcd_console.c b/common/lcd_console.c
index b7dda7a..cac77be 100644
--- a/common/lcd_console.c
+++ b/common/lcd_console.c
@@ -11,48 +11,49 @@
#include video_font.h/* Get font data, width and height */
#define CONSOLE_ROW_SIZE (VIDEO_FONT_HEIGHT * lcd_line_length)
-#define CONSOLE_ROW_FIRST lcd_console_address
-#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * console_rows)
+#define CONSOLE_ROW_FIRST cons.lcd_address
+#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * cons.rows)
-static short console_curr_col;
-static short console_curr_row;
-static short console_cols;
-static short console_rows;
-static void *lcd_console_address;
+struct console_t {
+ short curr_col, curr_row;
+ short cols, rows;
+ void *lcd_address;
+};
+static struct console_t cons;
void lcd_init_console(void *address, int rows, int cols)
{
- console_curr_col = 0;
- console_curr_row = 0;
- console_cols = cols;
- console_rows = rows;
- lcd_console_address = address;
+ memset(cons, 0, sizeof(cons));
+ cons.cols = cols;
+ cons.rows = rows;
+ cons.lcd_address = address;
+
}
void lcd_set_col(short col)
{
- console_curr_col = col;
+ cons.curr_col = col;
}
void lcd_set_row(short row)
{
- console_curr_row = row;
+ cons.curr_row = row;
}
void lcd_position_cursor(unsigned col, unsigned row)
{
- console_curr_col = min_t(short, col, console_cols - 1);
- console_curr_row = min_t(short, row, console_rows - 1);
+ cons.curr_col = min_t(short, col, cons.cols - 1);
+ cons.curr_row = min_t(short, row, cons.rows - 1);
}
int lcd_get_screen_rows(void)
{
- return console_rows;
+ return cons.rows;
}
int lcd_get_screen_columns(void)
{
- return console_cols;
+ return cons.cols;
}
static void lcd_putc_xy(ushort x, ushort y, char c)
@@ -63,7 +64,7 @@ static void lcd_putc_xy(ushort x, ushort y, char c)
int bg_color = lcd_getbgcolor();
int i;
- dest = (uchar *)(lcd_console_address +
+ dest = (uchar *)(cons.lcd_address +
y * lcd_line_length + x * NBITS(LCD_BPP) / 8);
for (row = 0; row VIDEO_FONT_HEIGHT; ++row, dest += lcd_line_length) {
@@ -91,7 +92,7 @@ static void console_scrollup(void)
/* Copy up rows ignoring those that will be overwritten */
memcpy(CONSOLE_ROW_FIRST,
- lcd_console_address + CONSOLE_ROW_SIZE * rows,
+ cons.lcd_address + CONSOLE_ROW_SIZE * rows,
CONSOLE_SIZE - CONSOLE_ROW_SIZE * rows);
/* Clear the last rows */
@@ -99,7 +100,7 @@ static void console_scrollup(void)
memset(lcd_console_address + CONSOLE_SIZE - CONSOLE_ROW_SIZE * rows,
bg_color, CONSOLE_ROW_SIZE * rows);
#else
- u32 *ppix = lcd_console_address +
+ u32 *ppix = cons.lcd_address +
CONSOLE_SIZE - CONSOLE_ROW_SIZE * rows;
u32 i;
for (i = 0;
@@ -109,27 +110,27 @@ static void console_scrollup(void)
}
#endif
lcd_sync();
- console_curr_row -= rows;
+ cons.curr_row -= rows;
}
static inline void console_back(void)
{
- if (--console_curr_col 0) {
- console_curr_col = console_cols - 1;
- if (--console_curr_row 0)
- console_curr_row = 0;
+ if (--cons.curr_col 0) {
+ cons.curr_col = cons.cols - 1;
+ if (--cons.curr_row 0)
+ cons.curr_row = 0;
}
- lcd_putc_xy(console_curr_col * VIDEO_FONT_WIDTH,
- console_curr_row * VIDEO_FONT_HEIGHT, ' ');
+ lcd_putc_xy(cons.curr_col * VIDEO_FONT_WIDTH,
+ cons.curr_row * VIDEO_FONT_HEIGHT, ' ');
}
static inline void console_newline(void)
{
- console_curr_col = 0;
+ cons.curr_col = 0;
/* Check if we need to scroll the terminal */
- if (++console_curr_row = console_rows)
+ if (++cons.curr_row = cons.rows)
console_scrollup();
else
lcd_sync();
@@ -145,18 +146,17 @@ void lcd_putc(const char c)
switch (c) {
case '\r':
- console_curr_col = 0;
-
+ cons.curr_col = 0;
return;
case '\n':
console_newline();
[U-Boot] [PATCH v3 2/7] generic-board: select SYS_GENERIC_BOARD for some architectures
We have done with the generic board conversion for all the boards of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86. Let's select SYS_GENERIC_BOARD for those architectures, so we can tell which architecture has finished the conversion at a glance. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: None arch/Kconfig | 12 arch/arc/include/asm/config.h| 1 - arch/blackfin/include/asm/config.h | 1 - arch/m68k/include/asm/config.h | 1 - arch/microblaze/include/asm/config.h | 1 - arch/nios2/include/asm/config.h | 1 - arch/sandbox/config.mk | 2 +- arch/x86/include/asm/config.h| 1 - include/configs/amcore.h | 2 -- include/configs/dbau1x00.h | 1 - include/configs/malta.h | 1 - include/configs/pb1x00.h | 1 - include/configs/qemu-mips.h | 1 - include/configs/qemu-mips64.h| 1 - include/configs/vct.h| 1 - 15 files changed, 13 insertions(+), 15 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index cdd1662..ca617e7 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1,6 +1,10 @@ config HAVE_GENERIC_BOARD bool +config SYS_GENERIC_BOARD + bool + depends on HAVE_GENERIC_BOARD + choice prompt Architecture select default SANDBOX @@ -9,6 +13,7 @@ config ARC bool ARC architecture select HAVE_PRIVATE_LIBGCC select HAVE_GENERIC_BOARD + select SYS_GENERIC_BOARD config ARM bool ARM architecture @@ -23,20 +28,24 @@ config AVR32 config BLACKFIN bool Blackfin architecture select HAVE_GENERIC_BOARD + select SYS_GENERIC_BOARD config M68K bool M68000 architecture select HAVE_GENERIC_BOARD + select SYS_GENERIC_BOARD config MICROBLAZE bool MicroBlaze architecture select HAVE_GENERIC_BOARD + select SYS_GENERIC_BOARD select SUPPORT_OF_CONTROL config MIPS bool MIPS architecture select HAVE_PRIVATE_LIBGCC select HAVE_GENERIC_BOARD + select SYS_GENERIC_BOARD config NDS32 bool NDS32 architecture @@ -44,6 +53,7 @@ config NDS32 config NIOS2 bool Nios II architecture select HAVE_GENERIC_BOARD + select SYS_GENERIC_BOARD config OPENRISC bool OpenRISC architecture @@ -57,6 +67,7 @@ config PPC config SANDBOX bool Sandbox select HAVE_GENERIC_BOARD + select SYS_GENERIC_BOARD select SUPPORT_OF_CONTROL config SH @@ -70,6 +81,7 @@ config X86 bool x86 architecture select HAVE_PRIVATE_LIBGCC select HAVE_GENERIC_BOARD + select SYS_GENERIC_BOARD select SUPPORT_OF_CONTROL endchoice diff --git a/arch/arc/include/asm/config.h b/arch/arc/include/asm/config.h index b4e9099..8936f5c 100644 --- a/arch/arc/include/asm/config.h +++ b/arch/arc/include/asm/config.h @@ -7,7 +7,6 @@ #ifndef __ASM_ARC_CONFIG_H_ #define __ASM_ARC_CONFIG_H_ -#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_GENERIC_GLOBAL_DATA #define CONFIG_SYS_BOOT_RAMDISK_HIGH #define CONFIG_ARCH_EARLY_INIT_R diff --git a/arch/blackfin/include/asm/config.h b/arch/blackfin/include/asm/config.h index 73cbfa2..d2cf71b 100644 --- a/arch/blackfin/include/asm/config.h +++ b/arch/blackfin/include/asm/config.h @@ -174,7 +174,6 @@ } #endif -#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_DISPLAY_CPUINFO #define CONFIG_ARCH_MISC_INIT diff --git a/arch/m68k/include/asm/config.h b/arch/m68k/include/asm/config.h index 7590842..e1458ac 100644 --- a/arch/m68k/include/asm/config.h +++ b/arch/m68k/include/asm/config.h @@ -7,7 +7,6 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_GENERIC_GLOBAL_DATA #define CONFIG_NEEDS_MANUAL_RELOC diff --git a/arch/microblaze/include/asm/config.h b/arch/microblaze/include/asm/config.h index 32fd636..4af408a 100644 --- a/arch/microblaze/include/asm/config.h +++ b/arch/microblaze/include/asm/config.h @@ -12,6 +12,5 @@ #endif #define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_GENERIC_BOARD #endif diff --git a/arch/nios2/include/asm/config.h b/arch/nios2/include/asm/config.h index 476a32b..9c13848 100644 --- a/arch/nios2/include/asm/config.h +++ b/arch/nios2/include/asm/config.h @@ -7,7 +7,6 @@ #ifndef _ASM_CONFIG_H_ #define _ASM_CONFIG_H_ -#define CONFIG_SYS_GENERIC_BOARD #define CONFIG_SYS_GENERIC_GLOBAL_DATA #endif diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk index e477a84..b05a90f 100644 --- a/arch/sandbox/config.mk +++ b/arch/sandbox/config.mk @@ -2,7 +2,7 @@ # SPDX-License-Identifier: GPL-2.0+ PLATFORM_CPPFLAGS += -D__SANDBOX__ -U_FORTIFY_SOURCE -PLATFORM_CPPFLAGS += -DCONFIG_ARCH_MAP_SYSMEM -DCONFIG_SYS_GENERIC_BOARD +PLATFORM_CPPFLAGS += -DCONFIG_ARCH_MAP_SYSMEM PLATFORM_LIBS += -lrt # Define this to avoid
[U-Boot] [PATCH 5/6] mmc: Restructure polling loops to avoid extra delays
The polling loops in sd_send_op_cond and mmc_complete_op_cond functions
check the ready flag state at the end of the loop, that is after executing
a delay inside the loop, which, in case of exiting with no error,
is not needed. Also, one of these loops, as well as the loop
in mmc_send_status, have the delay just before exiting on timeout
conditions.
Restructure all these loops to check the respective conditions before making
a delay for the next loop pass, and to appropriately exit without the delay.
Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com
---
drivers/mmc/mmc.c | 27 +--
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 42af47c..b81533c 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -118,7 +118,7 @@ int mmc_send_status(struct mmc *mmc, int timeout)
if (!mmc_host_is_spi(mmc))
cmd.cmdarg = mmc-rca 16;
- do {
+ while (1) {
err = mmc_send_cmd(mmc, cmd, NULL);
if (!err) {
if ((cmd.response[0] MMC_STATUS_RDY_FOR_DATA)
@@ -135,9 +135,11 @@ int mmc_send_status(struct mmc *mmc, int timeout)
} else if (--retries 0)
return err;
- udelay(1000);
+ if (timeout-- = 0)
+ break;
- } while (timeout--);
+ udelay(1000);
+ }
#ifdef CONFIG_MMC_TRACE
status = (cmd.response[0] MMC_STATUS_CURR_STATE) 9;
@@ -291,7 +293,7 @@ static int sd_send_op_cond(struct mmc *mmc)
int err;
struct mmc_cmd cmd;
- do {
+ while (1) {
cmd.cmdidx = MMC_CMD_APP_CMD;
cmd.resp_type = MMC_RSP_R1;
cmd.cmdarg = 0;
@@ -322,11 +324,14 @@ static int sd_send_op_cond(struct mmc *mmc)
if (err)
return err;
- udelay(1000);
- } while ((!(cmd.response[0] OCR_BUSY)) timeout--);
+ if (cmd.response[0] OCR_BUSY)
+ break;
- if (timeout = 0)
- return UNUSABLE_ERR;
+ if (timeout-- = 0)
+ return UNUSABLE_ERR;
+
+ udelay(1000);
+ }
if (mmc-version != SD_VERSION_2)
mmc-version = SD_VERSION_1_0;
@@ -405,14 +410,16 @@ static int mmc_complete_op_cond(struct mmc *mmc)
mmc-op_cond_pending = 0;
if (!(mmc-ocr OCR_BUSY)) {
start = get_timer(0);
- do {
+ while (1) {
err = mmc_send_op_cond_iter(mmc, 1);
if (err)
return err;
+ if (mmc-ocr OCR_BUSY)
+ break;
if (get_timer(start) timeout)
return UNUSABLE_ERR;
udelay(100);
- } while (!(mmc-ocr OCR_BUSY));
+ }
}
if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
--
2.1.0
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[U-Boot] [PATCH 4/6] mmc: Continue polling MMC card for OCR only if it is still not ready
Some MMC cards come to ready state quite quickly, so that the respective
flag appears to be set in mmc_send_op_cond already. In this case trying
to continue polling the card with CMD1 in mmc_complete_op_cond is incorrect
and may lead to unpredictable results. So check the flag before polling
and skip it appropriately.
Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com
---
drivers/mmc/mmc.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index d073d79..42af47c 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -403,15 +403,17 @@ static int mmc_complete_op_cond(struct mmc *mmc)
int err;
mmc-op_cond_pending = 0;
- start = get_timer(0);
- do {
- err = mmc_send_op_cond_iter(mmc, 1);
- if (err)
- return err;
- if (get_timer(start) timeout)
- return UNUSABLE_ERR;
- udelay(100);
- } while (!(mmc-ocr OCR_BUSY));
+ if (!(mmc-ocr OCR_BUSY)) {
+ start = get_timer(0);
+ do {
+ err = mmc_send_op_cond_iter(mmc, 1);
+ if (err)
+ return err;
+ if (get_timer(start) timeout)
+ return UNUSABLE_ERR;
+ udelay(100);
+ } while (!(mmc-ocr OCR_BUSY));
+ }
if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
--
2.1.0
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[U-Boot] [PATCH 6/6] mmc: Fix splitting device initialization
Starting part of device initialization sets the init_in_progress flag
only if the MMC card did not yet come to ready state and needs to continue
polling. If the card is SD or if the MMC card became ready quickly,
the flag is not set and (if using pre-initialization) the starting
phase will be re-executed from mmc_init function.
Set the init_in_progress flag in all non-error cases. Also, move flags
setting statements around so that the flags are not set in error paths.
Also, IN_PROGRESS return status becomes unnecessary, so get rid of it.
Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com
---
drivers/mmc/mmc.c | 16
include/mmc.h | 3 +--
2 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index b81533c..31f8647 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -387,7 +387,6 @@ static int mmc_send_op_cond(struct mmc *mmc)
mmc_go_idle(mmc);
/* Asking to the card its capabilities */
- mmc-op_cond_pending = 1;
for (i = 0; i 2; i++) {
err = mmc_send_op_cond_iter(mmc, i != 0);
if (err)
@@ -395,9 +394,10 @@ static int mmc_send_op_cond(struct mmc *mmc)
/* exit if not busy (flag seems to be inverted) */
if (mmc-ocr OCR_BUSY)
- return 0;
+ break;
}
- return IN_PROGRESS;
+ mmc-op_cond_pending = 1;
+ return 0;
}
static int mmc_complete_op_cond(struct mmc *mmc)
@@ -1627,7 +1627,7 @@ int mmc_start_init(struct mmc *mmc)
if (err == TIMEOUT) {
err = mmc_send_op_cond(mmc);
- if (err err != IN_PROGRESS) {
+ if (err) {
#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
printf(Card did not respond to voltage select!\n);
#endif
@@ -1635,7 +1635,7 @@ int mmc_start_init(struct mmc *mmc)
}
}
- if (err == IN_PROGRESS)
+ if (!err)
mmc-init_in_progress = 1;
return err;
@@ -1645,6 +1645,7 @@ static int mmc_complete_init(struct mmc *mmc)
{
int err = 0;
+ mmc-init_in_progress = 0;
if (mmc-op_cond_pending)
err = mmc_complete_op_cond(mmc);
@@ -1654,13 +1655,12 @@ static int mmc_complete_init(struct mmc *mmc)
mmc-has_init = 0;
else
mmc-has_init = 1;
- mmc-init_in_progress = 0;
return err;
}
int mmc_init(struct mmc *mmc)
{
- int err = IN_PROGRESS;
+ int err = 0;
unsigned start;
if (mmc-has_init)
@@ -1671,7 +1671,7 @@ int mmc_init(struct mmc *mmc)
if (!mmc-init_in_progress)
err = mmc_start_init(mmc);
- if (!err || err == IN_PROGRESS)
+ if (!err)
err = mmc_complete_init(mmc);
debug(%s: %d, time %lu\n, __func__, err, get_timer(start));
return err;
diff --git a/include/mmc.h b/include/mmc.h
index 644e3fa..fbcbe35 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -70,8 +70,7 @@
#define UNUSABLE_ERR -17 /* Unusable Card */
#define COMM_ERR -18 /* Communications Error */
#define TIMEOUT-19
-#define IN_PROGRESS-20 /* operation is in progress */
-#define SWITCH_ERR -21 /* Card reports failure to switch mode */
+#define SWITCH_ERR -20 /* Card reports failure to switch mode */
#define MMC_CMD_GO_IDLE_STATE 0
#define MMC_CMD_SEND_OP_COND 1
--
2.1.0
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[U-Boot] [PATCH v3 5/7] malloc_f: enable SYS_MALLOC_F by default if DM is on
This option has a bool type, not hex. Fix it and enable it if CONFIG_DM is on because Driver Model always requires malloc memory. Devices are scanned twice, before/after relocation. CONFIG_SYS_MALLOC_F should be enabled to use malloc memory before relocation. As it is board-independent, handle it globally. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Acked-by: Stephen Warren swar...@wwwdotorg.org --- Changes in v2: - Fix a typo s/not board-independent/board-independent/ Kconfig | 2 +- arch/arm/cpu/armv7/exynos/Kconfig | 3 --- arch/arm/cpu/armv7/omap3/Kconfig | 3 --- arch/arm/mach-tegra/Kconfig | 3 --- arch/arm/mach-uniphier/Kconfig| 3 --- arch/x86/Kconfig | 3 --- board/amcc/canyonlands/Kconfig| 4 board/ti/am335x/Kconfig | 3 --- configs/Linksprite_pcDuino3_fdt_defconfig | 1 - configs/am335x_igep0033_defconfig | 1 - configs/cm_fx6_defconfig | 1 - configs/cm_t335_defconfig | 1 - configs/mx6dlsabreauto_defconfig | 1 - configs/mx6qsabreauto_defconfig | 1 - configs/mx6qsabresd_defconfig | 1 - configs/mx6sxsabresd_defconfig| 1 - configs/nokia_rx51_defconfig | 1 - configs/pcm051_rev1_defconfig | 1 - configs/pcm051_rev3_defconfig | 1 - configs/pengwyn_defconfig | 1 - configs/pepper_defconfig | 1 - configs/rpi_2_defconfig | 1 - configs/rpi_defconfig | 1 - configs/s5p_goni_defconfig| 1 - configs/sandbox_defconfig | 1 - configs/smdkc100_defconfig| 1 - configs/snapper9260_defconfig | 1 - configs/snapper9g20_defconfig | 1 - configs/stv0991_defconfig | 1 - include/configs/rcar-gen2-common.h| 2 -- 30 files changed, 1 insertion(+), 46 deletions(-) diff --git a/Kconfig b/Kconfig index 8f96c94..b5968d7 100644 --- a/Kconfig +++ b/Kconfig @@ -54,7 +54,7 @@ config CC_OPTIMIZE_FOR_SIZE config SYS_MALLOC_F bool Enable malloc() pool before relocation - default 0x400 + default y if DM help Before relocation memory is very limited on many platforms. Still, we can provide a small malloc() pool if needed. Driver model in diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig index 9e47ed3..bd7540a 100644 --- a/arch/arm/cpu/armv7/exynos/Kconfig +++ b/arch/arm/cpu/armv7/exynos/Kconfig @@ -80,9 +80,6 @@ config DM_SPI_FLASH config DM_GPIO default y -config SYS_MALLOC_F - default y - source board/samsung/smdkv310/Kconfig source board/samsung/trats/Kconfig source board/samsung/universal_c210/Kconfig diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig index aa2ff46..1f96498 100644 --- a/arch/arm/cpu/armv7/omap3/Kconfig +++ b/arch/arm/cpu/armv7/omap3/Kconfig @@ -106,9 +106,6 @@ config DM_GPIO config DM_SERIAL default y if DM -config SYS_MALLOC_F - default y if DM - config SYS_SOC default omap3 diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index fccfd79..fce1c1d 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -17,9 +17,6 @@ config TEGRA124 endchoice -config SYS_MALLOC_F - default y - config SYS_MALLOC_F_LEN default 0x1800 diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index b6dc75f..20e20a5 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -48,9 +48,6 @@ config DCC_MICRO_SUPPORT_CARD endchoice -config SYS_MALLOC_F - default y - config CMD_PINMON bool Enable boot mode pins monitor command default y diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 35d24e4..da27115 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -76,9 +76,6 @@ config DM_GPIO config DM_SERIAL default y -config SYS_MALLOC_F - default y - config SYS_MALLOC_F_LEN default 0x800 diff --git a/board/amcc/canyonlands/Kconfig b/board/amcc/canyonlands/Kconfig index c0dbd18..46efa7a 100644 --- a/board/amcc/canyonlands/Kconfig +++ b/board/amcc/canyonlands/Kconfig @@ -39,8 +39,4 @@ config DM config DM_SERIAL default y -config SYS_MALLOC_F - bool - default y - endif diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig index 8c45892..7cb006f 100644 --- a/board/ti/am335x/Kconfig +++ b/board/ti/am335x/Kconfig @@ -47,7 +47,4 @@ config DM_GPIO config DM_SERIAL default y if DM -config SYS_MALLOC_F - default y if DM - endif diff --git a/configs/Linksprite_pcDuino3_fdt_defconfig b/configs/Linksprite_pcDuino3_fdt_defconfig index 87dd38f..7690d1e 100644 --- a/configs/Linksprite_pcDuino3_fdt_defconfig +++
Re: [U-Boot] v2015.04-rc4: broken for custom TI-based board
Gesendet: Donnerstag, 19. März 2015 um 08:11 Uhr Von: Igor Grinberg grinb...@compulab.co.il An: Peter Kuemmel syntheti...@gmx.net, u-boot@lists.denx.de Cc: Nikita Kiryanov nik...@compulab.co.il Betreff: Re: [U-Boot] v2015.04-rc4: broken for custom TI-based board Hi Peter, On 03/18/15 20:07, Peter Kuemmel wrote: I have a custom board which boots with a patched cm_t35 configuration based on the v2015.01 release. When I update to v2015.04-rc4 the system reboots after the x-loader has read u-boot from MMC and started it. IIUC, we have a working v2015.01 and non working v2015.04-rc4? Does someone has an idea which change could be responsible for this? Not sure. May be you can run a quick git bisect? v2015.01 .. v2015.04-rc4 shouldn't be too much. After bisecting it figures out that the default configuration does not work: I have to disable Enable Driver Model for serial drivers But still have to enable the Driver Model, even without any other drivers are selected. (Seems I have to read some documentation about the driver model). Thanks, Peter -- Regards, Igor. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] U-boot on MPC8641D based board
Hi All, I have been facing a strange problem in my board which is MPC8641D based. In this board we have two nor spansion flashes connected to cs0 and cs1. U boot had detected both the flashes and when flinfo command is it shows both flash information but when we try to access another flash u-boot is crashing. Flash part no is s29gl01gs which is CFI complaint. Please provide some pointers where I should concentrate more to resolve this issue. As I have checked all the configuration in configuration file it seems to be fine. Any help will be really appreciated. Ashish Khetan +91-8886013575 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] dfu: cmd: trigger watchdog before calling usb_gadget_handle_interrupts
Hi Heiko, trigger watchdog before calling usb_gadget_handle_interrupts() This prevents board resets when calling dfu command on boards which have a watchdog. Signed-off-by: Heiko Schocher h...@denx.de --- common/cmd_dfu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/common/cmd_dfu.c b/common/cmd_dfu.c index e975abe..46af4cf 100644 --- a/common/cmd_dfu.c +++ b/common/cmd_dfu.c @@ -9,6 +9,7 @@ */ #include common.h +#include watchdog.h #include dfu.h #include g_dnl.h #include usb.h @@ -64,6 +65,7 @@ static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (ctrlc()) goto exit; + WATCHDOG_RESET(); usb_gadget_handle_interrupts(); } exit: Applied to u-boot-dfu tree! Thanks. -- Best regards, Lukasz Majewski Samsung RD Institute Poland (SRPOL) | Linux Platform Group ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 4/7] malloc_f: remove redundant defalut values of CONFIG_SYS_MALLOC_F_LEN
The default value of CONFIG_SYS_MALLOC_F_LEN is defined by ./Kconfig as 0x400. Each defconfig or Kconfig need not repeat the same value. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com Acked-by: Stephen Warren swar...@wwwdotorg.org --- Changes in v2: None arch/arm/cpu/armv7/exynos/Kconfig | 3 --- arch/arm/cpu/armv7/omap3/Kconfig | 3 --- arch/arm/mach-uniphier/Kconfig| 3 --- board/amcc/canyonlands/Kconfig| 4 board/ti/am335x/Kconfig | 3 --- configs/Linksprite_pcDuino3_fdt_defconfig | 1 - configs/am335x_igep0033_defconfig | 1 - configs/cm_fx6_defconfig | 1 - configs/cm_t335_defconfig | 1 - configs/gwventana_defconfig | 1 - configs/mx6dlsabreauto_defconfig | 1 - configs/mx6qsabreauto_defconfig | 1 - configs/mx6qsabresd_defconfig | 1 - configs/mx6sxsabresd_defconfig| 1 - configs/nokia_rx51_defconfig | 1 - configs/pcm051_rev1_defconfig | 1 - configs/pcm051_rev3_defconfig | 1 - configs/pengwyn_defconfig | 1 - configs/pepper_defconfig | 1 - configs/rpi_2_defconfig | 1 - configs/rpi_defconfig | 1 - configs/s5p_goni_defconfig| 1 - configs/sandbox_defconfig | 1 - configs/smdkc100_defconfig| 1 - configs/snapper9260_defconfig | 1 - configs/snapper9g20_defconfig | 1 - 26 files changed, 37 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig index eb86a7f..9e47ed3 100644 --- a/arch/arm/cpu/armv7/exynos/Kconfig +++ b/arch/arm/cpu/armv7/exynos/Kconfig @@ -83,9 +83,6 @@ config DM_GPIO config SYS_MALLOC_F default y -config SYS_MALLOC_F_LEN - default 0x400 - source board/samsung/smdkv310/Kconfig source board/samsung/trats/Kconfig source board/samsung/universal_c210/Kconfig diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig index 65da6e2..aa2ff46 100644 --- a/arch/arm/cpu/armv7/omap3/Kconfig +++ b/arch/arm/cpu/armv7/omap3/Kconfig @@ -109,9 +109,6 @@ config DM_SERIAL config SYS_MALLOC_F default y if DM -config SYS_MALLOC_F_LEN - default 0x400 if DM - config SYS_SOC default omap3 diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 8335685..b6dc75f 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -51,9 +51,6 @@ endchoice config SYS_MALLOC_F default y -config SYS_MALLOC_F_LEN - default 0x400 - config CMD_PINMON bool Enable boot mode pins monitor command default y diff --git a/board/amcc/canyonlands/Kconfig b/board/amcc/canyonlands/Kconfig index 848e08f..c0dbd18 100644 --- a/board/amcc/canyonlands/Kconfig +++ b/board/amcc/canyonlands/Kconfig @@ -43,8 +43,4 @@ config SYS_MALLOC_F bool default y -config SYS_MALLOC_F_LEN - hex - default 0x400 - endif diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig index 722f9d5..8c45892 100644 --- a/board/ti/am335x/Kconfig +++ b/board/ti/am335x/Kconfig @@ -50,7 +50,4 @@ config DM_SERIAL config SYS_MALLOC_F default y if DM -config SYS_MALLOC_F_LEN - default 0x400 if DM - endif diff --git a/configs/Linksprite_pcDuino3_fdt_defconfig b/configs/Linksprite_pcDuino3_fdt_defconfig index 1504664..87dd38f 100644 --- a/configs/Linksprite_pcDuino3_fdt_defconfig +++ b/configs/Linksprite_pcDuino3_fdt_defconfig @@ -14,4 +14,3 @@ CONFIG_DRAM_CLK=480 CONFIG_DRAM_ZQ=122 CONFIG_DRAM_EMR1=4 CONFIG_SYS_MALLOC_F=y -CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/am335x_igep0033_defconfig b/configs/am335x_igep0033_defconfig index 8d38e26..a439298 100644 --- a/configs/am335x_igep0033_defconfig +++ b/configs/am335x_igep0033_defconfig @@ -4,4 +4,3 @@ CONFIG_SPL_STACK_R_ADDR=0x8200 CONFIG_ARM=y CONFIG_TARGET_AM335X_IGEP0033=y CONFIG_SYS_MALLOC_F=y -CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 2fd21cf..00cbdd2 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -6,4 +6,3 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_SERIAL=y CONFIG_SYS_MALLOC_F=y -CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index 086e526..31705f2 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -2,4 +2,3 @@ CONFIG_SPL=y CONFIG_ARM=y CONFIG_TARGET_CM_T335=y CONFIG_SYS_MALLOC_F=y -CONFIG_SYS_MALLOC_F_LEN=0x400 diff --git a/configs/gwventana_defconfig b/configs/gwventana_defconfig index 6eab019..d6bbdc1 100644 --- a/configs/gwventana_defconfig +++ b/configs/gwventana_defconfig @@ -3,4 +3,3 @@ CONFIG_SYS_EXTRA_OPTIONS=IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6QDL CONFIG_ARM=y CONFIG_TARGET_GW_VENTANA=y CONFIG_SYS_MALLOC_F=y
[U-Boot] [PATCH v3 1/7] generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig
Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- Changes in v2: None Makefile | 2 +- README| 6 +++--- arch/Kconfig | 14 ++ arch/arc/config.mk| 3 --- arch/arm/config.mk| 3 --- arch/avr32/config.mk | 3 --- arch/blackfin/config.mk | 3 --- arch/m68k/config.mk | 3 --- arch/microblaze/config.mk | 1 - arch/mips/config.mk | 2 -- arch/nios2/config.mk | 2 -- arch/powerpc/config.mk| 3 --- arch/sandbox/config.mk| 3 --- arch/x86/config.mk| 3 --- doc/README.generic-board | 12 +++- 15 files changed, 25 insertions(+), 38 deletions(-) diff --git a/Makefile b/Makefile index 346ea27..0d160c9 100644 --- a/Makefile +++ b/Makefile @@ -1163,7 +1163,7 @@ prepare2: prepare3 outputmakefile prepare1: prepare2 $(version_h) $(timestamp_h) \ include/config/auto.conf -ifeq ($(__HAVE_ARCH_GENERIC_BOARD),) +ifeq ($(CONFIG_HAVE_GENERIC_BOARD),) ifeq ($(CONFIG_SYS_GENERIC_BOARD),y) @echo 2 Your architecture does not support generic board. @echo 2 Please undefine CONFIG_SYS_GENERIC_BOARD in your board config file. diff --git a/README b/README index b0124d6..5d57eb9 100644 --- a/README +++ b/README @@ -4190,9 +4190,9 @@ Configuration Settings: to this new framework over time. Defining this will disable the arch/foo/lib/board.c file and use common/board_f.c and common/board_r.c instead. To use this option your architecture - must support it (i.e. must define __HAVE_ARCH_GENERIC_BOARD in - its config.mk file). If you find problems enabling this option on - your board please report the problem and send patches! + must support it (i.e. must select HAVE_GENERIC_BOARD in arch/Kconfig). + If you find problems enabling this option on your board please report + the problem and send patches! - CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only) This is set by OMAP boards for the max time that reset should diff --git a/arch/Kconfig b/arch/Kconfig index 3d419bc..cdd1662 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1,3 +1,6 @@ +config HAVE_GENERIC_BOARD + bool + choice prompt Architecture select default SANDBOX @@ -5,34 +8,42 @@ choice config ARC bool ARC architecture select HAVE_PRIVATE_LIBGCC + select HAVE_GENERIC_BOARD config ARM bool ARM architecture select HAVE_PRIVATE_LIBGCC + select HAVE_GENERIC_BOARD select SUPPORT_OF_CONTROL config AVR32 bool AVR32 architecture + select HAVE_GENERIC_BOARD config BLACKFIN bool Blackfin architecture + select HAVE_GENERIC_BOARD config M68K bool M68000 architecture + select HAVE_GENERIC_BOARD config MICROBLAZE bool MicroBlaze architecture + select HAVE_GENERIC_BOARD select SUPPORT_OF_CONTROL config MIPS bool MIPS architecture select HAVE_PRIVATE_LIBGCC + select HAVE_GENERIC_BOARD config NDS32 bool NDS32 architecture config NIOS2 bool Nios II architecture + select HAVE_GENERIC_BOARD config OPENRISC bool OpenRISC architecture @@ -40,10 +51,12 @@ config OPENRISC config PPC bool PowerPC architecture select HAVE_PRIVATE_LIBGCC + select HAVE_GENERIC_BOARD select SUPPORT_OF_CONTROL config SANDBOX bool Sandbox + select HAVE_GENERIC_BOARD select SUPPORT_OF_CONTROL config SH @@ -56,6 +69,7 @@ config SPARC config X86 bool x86 architecture select HAVE_PRIVATE_LIBGCC + select HAVE_GENERIC_BOARD select SUPPORT_OF_CONTROL endchoice diff --git a/arch/arc/config.mk b/arch/arc/config.mk index 4fcd407..04c034b 100644 --- a/arch/arc/config.mk +++ b/arch/arc/config.mk @@ -57,6 +57,3 @@ LDFLAGS_FINAL += -pie # Load address for standalone apps CONFIG_STANDALONE_LOAD_ADDR ?= 0x8200 - -# Support generic board on ARC -__HAVE_ARCH_GENERIC_BOARD := y diff --git a/arch/arm/config.mk b/arch/arm/config.mk index 0667984..c005ce4 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -19,9 +19,6 @@ PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \ PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \ $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -# Support generic board on ARM -__HAVE_ARCH_GENERIC_BOARD := y - PLATFORM_CPPFLAGS += -D__ARM__ # Choose between ARM/Thumb instruction sets diff --git a/arch/avr32/config.mk b/arch/avr32/config.mk index 8252f59..469185e 100644 --- a/arch/avr32/config.mk +++ b/arch/avr32/config.mk @@ -9,9 +9,6 @@ ifeq ($(CROSS_COMPILE),) CROSS_COMPILE := avr32-linux- endif -# avr32 has generic board support -__HAVE_ARCH_GENERIC_BOARD := y - CONFIG_STANDALONE_LOAD_ADDR ?= 0x
[U-Boot] [PATCH v3 0/7] Some improvements related to build system
- Move GENERIC_BOARD CONFIGs
- Remove arch/m68k/lib/board.c
- Clean ups CONFIG_SYS_MALLOC_F and CONFIG_SYS_MALLOC_F_LEN
- Move BCM283x code into arch/arm/mach-bcm283x
Changes in v3:
- No change. Just add Stephen's Acked-by tag
Changes in v2:
- Fix a typo s/not board-independent/board-independent/
Masahiro Yamada (7):
generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig
generic-board: select SYS_GENERIC_BOARD for some architectures
m68k: remove arch/m68k/lib/board.c
malloc_f: remove redundant defalut values of CONFIG_SYS_MALLOC_F_LEN
malloc_f: enable SYS_MALLOC_F by default if DM is on
ARM: bcm283x: merge BCM2835/BCM2836 directories into mach-bcm283x
ARM: bcm283x: move SoC headers to mach-bcm283x/include/mach
Kconfig| 2 +-
Makefile | 2 +-
README | 6 +-
arch/Kconfig | 26 +
arch/arc/config.mk | 3 -
arch/arc/include/asm/config.h | 1 -
arch/arm/Kconfig | 15 +-
arch/arm/Makefile | 1 +
arch/arm/config.mk | 3 -
arch/arm/cpu/arm1176/Makefile | 2 -
arch/arm/cpu/arm1176/bcm2835/Kconfig | 12 -
arch/arm/cpu/armv7/Makefile| 1 -
arch/arm/cpu/armv7/bcm2835/Makefile| 13 -
arch/arm/cpu/armv7/exynos/Kconfig | 6 -
arch/arm/cpu/armv7/omap3/Kconfig | 6 -
arch/arm/mach-bcm283x/Kconfig | 40 ++
.../{cpu/arm1176/bcm2835 = mach-bcm283x}/Makefile | 2 +-
.../include/mach}/gpio.h | 0
.../include/mach}/mbox.h | 0
.../include/mach}/sdhci.h | 0
.../include/mach}/timer.h | 0
.../include/mach}/wdog.h | 0
.../{cpu/arm1176/bcm2835 = mach-bcm283x}/init.c | 0
.../bcm2835 = mach-bcm283x}/lowlevel_init.S | 0
.../{cpu/arm1176/bcm2835 = mach-bcm283x}/mbox.c | 0
.../{cpu/arm1176/bcm2835 = mach-bcm283x}/reset.c | 0
.../{cpu/arm1176/bcm2835 = mach-bcm283x}/timer.c | 0
arch/arm/mach-tegra/Kconfig| 3 -
arch/arm/mach-uniphier/Kconfig | 6 -
arch/avr32/config.mk | 3 -
arch/blackfin/config.mk| 3 -
arch/blackfin/include/asm/config.h | 1 -
arch/m68k/config.mk| 3 -
arch/m68k/include/asm/config.h | 1 -
arch/m68k/lib/Makefile | 3 -
arch/m68k/lib/board.c | 642 -
arch/microblaze/config.mk | 1 -
arch/microblaze/include/asm/config.h | 1 -
arch/mips/config.mk| 2 -
arch/nios2/config.mk | 2 -
arch/nios2/include/asm/config.h| 1 -
arch/powerpc/config.mk | 3 -
arch/sandbox/config.mk | 5 +-
arch/x86/Kconfig | 3 -
arch/x86/config.mk | 3 -
arch/x86/include/asm/config.h | 1 -
board/amcc/canyonlands/Kconfig | 8 -
board/raspberrypi/rpi/Kconfig | 15 -
board/raspberrypi/rpi_2/Kconfig| 15 -
board/ti/am335x/Kconfig| 6 -
configs/Linksprite_pcDuino3_fdt_defconfig | 2 -
configs/am335x_igep0033_defconfig | 2 -
configs/cm_fx6_defconfig | 2 -
configs/cm_t335_defconfig | 2 -
configs/gwventana_defconfig| 1 -
configs/mx6dlsabreauto_defconfig | 2 -
configs/mx6qsabreauto_defconfig| 2 -
configs/mx6qsabresd_defconfig | 2 -
configs/mx6sxsabresd_defconfig | 2 -
configs/nokia_rx51_defconfig | 2 -
configs/pcm051_rev1_defconfig | 2 -
configs/pcm051_rev3_defconfig | 2 -
configs/pengwyn_defconfig | 2 -
configs/pepper_defconfig | 2 -
configs/rpi_2_defconfig| 3 +-
configs/rpi_defconfig | 3 +-
configs/s5p_goni_defconfig | 2 -
configs/sandbox_defconfig | 2 -
configs/smdkc100_defconfig | 2 -
configs/snapper9260_defconfig | 2 -
configs/snapper9g20_defconfig
Re: [U-Boot] v2015.04-rc4: broken for custom TI-based board
On 03/19/15 12:43, Peter Kuemmel wrote: Gesendet: Donnerstag, 19. März 2015 um 08:11 Uhr Von: Igor Grinberg grinb...@compulab.co.il An: Peter Kuemmel syntheti...@gmx.net, u-boot@lists.denx.de Cc: Nikita Kiryanov nik...@compulab.co.il Betreff: Re: [U-Boot] v2015.04-rc4: broken for custom TI-based board Hi Peter, On 03/18/15 20:07, Peter Kuemmel wrote: I have a custom board which boots with a patched cm_t35 configuration based on the v2015.01 release. When I update to v2015.04-rc4 the system reboots after the x-loader has read u-boot from MMC and started it. IIUC, we have a working v2015.01 and non working v2015.04-rc4? Does someone has an idea which change could be responsible for this? Not sure. May be you can run a quick git bisect? v2015.01 .. v2015.04-rc4 shouldn't be too much. After bisecting it figures out that the default configuration does not work: I have to disable Enable Driver Model for serial drivers But still have to enable the Driver Model, even without any other drivers are selected. (Seems I have to read some documentation about the driver model). Adding Simon to Cc. Simon, can you please shed some light on this? -- Regards, Igor. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 15/28] net/memac_phy: reuse driver for little endian SoCs
On Thu, Mar 19, 2015 at 10:06 PM, Shaohui Xie shaohui@freescale.com
wrote:
Hello Joe,
Thank you for reviewing this patch!
Please see inline.
Best Regards,
Shaohui Xie
From: Joe Hershberger [mailto:joe.hershber...@gmail.com]
Sent: Friday, March 20, 2015 2:04 AM
To: Sun York-R58495
Cc: u-boot; Joe Hershberger; Xie Shaohui-B21989
Subject: Re: [U-Boot] [PATCH 15/28] net/memac_phy: reuse driver for
little endian SoCs
Hi Shaohui Xie,
On Thu, Mar 19, 2015 at 11:45 AM, York Sun york...@freescale.com wrote:
From: Shaohui Xie shaohui@freescale.com
The memac for PHY management on little endian SoCs is similar on big
endian SoCs, so we modify the driver by using I/O accessor function to
handle the endianness, so the driver can be reused on little endian
SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian
SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access
is little endian, if not, the I/O access is big endian. Move fsl_memac.h
out of powerpc include.
Signed-off-by: Shaohui Xie shaohui@freescale.com
CC: Joe Hershberger joe.hershber...@ni.com
---
arch/arm/include/asm/arch-fsl-lsch3/config.h |1 +
drivers/net/Makefile |1 +
drivers/net/fm/eth.c |2 +-
drivers/net/fm/memac.c|2 +-
drivers/net/fm/memac_phy.c| 62
++---
drivers/net/vsc9953.c |2 +-
{arch/powerpc/include/asm = include}/fsl_memac.h |0
7 files changed, 46 insertions(+), 24 deletions(-)
rename {arch/powerpc/include/asm = include}/fsl_memac.h (100%)
diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h
b/arch/arm/include/asm/arch-fsl-lsch3/config.h
index 98db1ef..684c70f 100644
--- a/arch/arm/include/asm/arch-fsl-lsch3/config.h
+++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h
@@ -109,6 +109,7 @@
/* IFC */
#define CONFIG_SYS_FSL_IFC_LE
+#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
It seems tedious to have to define this. Can't you just use the functions
available?
[S.H] To use a define is based on a concern that we cannot assume the I/O
access of an IP share same endianness as the Soc(s), we cannot assume on
little endian Soc the I/O access is little endian, on big endian Soc the
I/O access is big endian, the I/O access could be little endian on big
endian Soc and vice versa.
You're saying that the IP is expected to be in different endianness? If
that is practically the case, then I'm fine with this patch. I just want to
ensure that it is not just speculative generality.
/* PCIe */
#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR +
0x240)
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 5497934..d871093 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -66,4 +66,5 @@ obj-$(CONFIG_XILINX_LL_TEMAC) += xilinx_ll_temac.o
xilinx_ll_temac_mdio.o \
obj-$(CONFIG_ZYNQ_GEM) += zynq_gem.o
obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/
obj-$(CONFIG_FSL_MC_ENET) += ldpaa_eth/
+obj-$(CONFIG_FSL_MEMAC) += fm/memac_phy.o
obj-$(CONFIG_VSC9953) += vsc9953.o
diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index 1d1089d..a7a5c69 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -15,7 +15,7 @@
#include phy.h
#include asm/fsl_dtsec.h
#include asm/fsl_tgec.h
-#include asm/fsl_memac.h
+#include fsl_memac.h
#include fm.h
diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c
index 60e898c..81a64bf 100644
--- a/drivers/net/fm/memac.c
+++ b/drivers/net/fm/memac.c
@@ -12,7 +12,7 @@
#include phy.h
#include asm/types.h
#include asm/io.h
-#include asm/fsl_memac.h
+#include fsl_memac.h
#include fm.h
diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c
index a155d89..4ab78e6 100644
--- a/drivers/net/fm/memac_phy.c
+++ b/drivers/net/fm/memac_phy.c
@@ -10,9 +10,28 @@
#include miiphy.h
#include phy.h
#include asm/io.h
-#include asm/fsl_memac.h
+#include fsl_memac.h
#include fm_eth.h
+#ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN
This can already be detected, right?
#if __BYTE_ORDER == __LITTLE_ENDIAN
[S.H] The issue is the IP’s I/O access order on LS2 is different from big
endian Soc(s).
+#define memac_out_32(a, v) out_le32(a, v)
+#define memac_clrbits_32(a, v) clrbits_le32(a, v)
+#define memac_setbits_32(a, v) setbits_le32(a, v)
+#else
+#define memac_out_32(a, v) out_be32(a, v)
+#define memac_clrbits_32(a, v) clrbits_be32(a, v)
+#define memac_setbits_32(a, v) setbits_be32(a, v)
+#endif
+
+static u32 memac_in_32(u32 *reg)
+{
+#ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN
+ return in_le32(reg);
+#else
+ return in_be32(reg);
+#endif
+}
Another option you have is to take the approach that you don't care the
endianness.
Re: [U-Boot] [PATCH 15/28] net/memac_phy: reuse driver for little endian SoCs
/* IFC */ #define CONFIG_SYS_FSL_IFC_LE +#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN It seems tedious to have to define this. Can't you just use the functions available? [S.H] To use a define is based on a concern that we cannot assume the I/O access of an IP share same endianness as the Soc(s), we cannot assume on little endian Soc the I/O access is little endian, on big endian Soc the I/O access is big endian, the I/O access could be little endian on big endian Soc and vice versa. You're saying that the IP is expected to be in different endianness? If that is practically the case, then I'm fine with this patch. I just want to ensure that it is not just speculative generality. [S.H] Yes. The IP is in different endianness, i.e. little endian on LS2, big endian on PowerPc Soc(s). Thank you! Shaohui ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] dm: serial: remove bogus include ns16550.h
Serial-uclass should be generically implemented without depending a particular hardware. Fortunately, nothing in include/ns16550.h is referenced from drivers/serial/serial-uclass.c, so remove this bogus include. Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com --- drivers/serial/serial-uclass.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index 3fc7104..2de3737 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -16,8 +16,6 @@ #include dm/lists.h #include dm/device-internal.h -#include ns16550.h - DECLARE_GLOBAL_DATA_PTR; /* -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] cmd_scsi: Enable SoC AHCI device on platforms with PCI
Current driver assumes the AHCI is connected to PCI, this is not
true on some SoCs, e.g. LS1021A, which has PCI but the AHCI is
in SoC. This patch will enable embedded AHCI devices on platforms
with PCI.
PCI AHCI devices still can be used by commenting CONFIG_SCSI_AHCI_PLAT
option in head file.
Signed-off-by: Shaohui Xie shaohui@freescale.com
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
common/cmd_scsi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c
index a0a62eb..f80f549 100644
--- a/common/cmd_scsi.c
+++ b/common/cmd_scsi.c
@@ -37,7 +37,7 @@
#define SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
#endif
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PCI) !defined(CONFIG_SCSI_AHCI_PLAT)
const struct pci_device_id scsi_device_list[] = { SCSI_DEV_LIST };
#endif
static ccb tempccb;/* temporary scsi command buffer */
@@ -179,7 +179,7 @@ int scsi_get_disk_count(void)
return scsi_max_devs;
}
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PCI) !defined(CONFIG_SCSI_AHCI_PLAT)
void scsi_init(void)
{
int busdevfunc;
--
2.1.0.27.g96db324
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[U-Boot] [PATCH] mtd: spi: check return value of spi_setup_slave
Need to check value of spi_setup_slave and spi_setup_slave_fdt. If their return value 'bus' is NULL, there is no need to pass it to following spi_flash_probe_tail. If 'bus' is null, the original function flow is as following: spi_flash_probe |-spi_setup_slave |-spi_probe_bus_tail |-spi_flash_probe_slave |-spi_free_slave Alougth check the pointer in spi_free_slave is ok, checking the return value of spi_setup_slave and spi_setup_slave_fdt is better. Before this fix: = sf probe 0:2 FSL_QSPI: Not a valid cs ! SF: Failed to set up slave data abort pc : [fff66dcc] lr : [fff7628c] reloc pc : [87814dcc]lr : [8782428c] sp : fdf4fcf0 ip : e630396c fp : fe0d0888 r10: fffa2538 r9 : fdf4feb8 r8 : 02625a00 r7 : 0002 r6 : fff94ec0 r5 : r4 : 933c r3 : 1af0593c r2 : cb3fe030 r1 : fff94eb8 r0 : e59ff018 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... After this fix: = sf probe 0:2 FSL_QSPI: Not a valid cs ! Failed to initialize SPI flash at 0:2 No data abort using this patch. Signed-off-by: Peng Fan peng@freescale.com --- drivers/mtd/spi/sf_probe.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 4103723..689af3a 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -433,6 +433,8 @@ struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs, struct spi_slave *bus; bus = spi_setup_slave(busnum, cs, max_hz, spi_mode); + if (!bus) + return NULL; return spi_flash_probe_tail(bus); } @@ -443,6 +445,8 @@ struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, struct spi_slave *bus; bus = spi_setup_slave_fdt(blob, slave_node, spi_node); + if (!bus) + return NULL; return spi_flash_probe_tail(bus); } #endif -- 1.8.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_scsi: Enable SoC AHCI device on platforms with PCI
On Fri, Mar 20, 2015 at 10:27 AM, Tang Yuantian
yuantian.t...@freescale.com wrote:
Current driver assumes the AHCI is connected to PCI, this is not
true on some SoCs, e.g. LS1021A, which has PCI but the AHCI is
in SoC. This patch will enable embedded AHCI devices on platforms
with PCI.
PCI AHCI devices still can be used by commenting CONFIG_SCSI_AHCI_PLAT
option in head file.
Signed-off-by: Shaohui Xie shaohui@freescale.com
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
common/cmd_scsi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c
index a0a62eb..f80f549 100644
--- a/common/cmd_scsi.c
+++ b/common/cmd_scsi.c
@@ -37,7 +37,7 @@
#define SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
#endif
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PCI) !defined(CONFIG_SCSI_AHCI_PLAT)
const struct pci_device_id scsi_device_list[] = { SCSI_DEV_LIST };
#endif
static ccb tempccb;/* temporary scsi command buffer */
@@ -179,7 +179,7 @@ int scsi_get_disk_count(void)
return scsi_max_devs;
}
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PCI) !defined(CONFIG_SCSI_AHCI_PLAT)
void scsi_init(void)
{
int busdevfunc;
--
Reviewed-by: Bin Meng bmeng...@gmail.com
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Re: [U-Boot] [PATCH 8/8] driver/i2c/mxc: Add I2C3 and I2C4 for LS2085A
Hello Yrok,
Am 19.03.2015 17:20, schrieb York Sun:
LS2085A uses mxc I2C driver and has four I2C buses.
Signed-off-by: York Sun york...@freescale.com
CC: Heiko Schocher h...@denx.de
---
drivers/i2c/mxc_i2c.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index fc5ee35..02a173e 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -114,6 +114,9 @@ static u16 i2c_clk_div[50][2] = {
#ifndef CONFIG_SYS_MXC_I2C3_SPEED
#define CONFIG_SYS_MXC_I2C3_SPEED 10
#endif
+#ifndef CONFIG_SYS_MXC_I2C4_SPEED
+#define CONFIG_SYS_MXC_I2C4_SPEED 10
+#endif
#ifndef CONFIG_SYS_MXC_I2C1_SLAVE
#define CONFIG_SYS_MXC_I2C1_SLAVE 0
@@ -124,6 +127,9 @@ static u16 i2c_clk_div[50][2] = {
#ifndef CONFIG_SYS_MXC_I2C3_SLAVE
#define CONFIG_SYS_MXC_I2C3_SLAVE 0
#endif
+#ifndef CONFIG_SYS_MXC_I2C4_SLAVE
+#define CONFIG_SYS_MXC_I2C4_SLAVE 0
+#endif
/*
@@ -545,10 +551,18 @@ U_BOOT_I2C_ADAP_COMPLETE(mxc1, mxc_i2c_init,
mxc_i2c_probe,
CONFIG_SYS_MXC_I2C2_SLAVE, 1)
#if defined(CONFIG_MX31) || defined(CONFIG_MX35) ||\
defined(CONFIG_MX51) || defined(CONFIG_MX53) ||\
- defined(CONFIG_MX6) || defined(CONFIG_LS102XA)
+ defined(CONFIG_MX6) || defined(CONFIG_LS102XA) ||\
+ defined(CONFIG_LS2085A)
U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init, mxc_i2c_probe,
mxc_i2c_read, mxc_i2c_write,
mxc_i2c_set_bus_speed,
CONFIG_SYS_MXC_I2C3_SPEED,
CONFIG_SYS_MXC_I2C3_SLAVE, 2)
#endif
+#ifdef CONFIG_LS2085A
+U_BOOT_I2C_ADAP_COMPLETE(mxc3, mxc_i2c_init, mxc_i2c_probe,
+mxc_i2c_read, mxc_i2c_write,
+mxc_i2c_set_bus_speed,
+CONFIG_SYS_MXC_I2C4_SPEED,
+CONFIG_SYS_MXC_I2C4_SLAVE, 3)
+#endif
Dummy question ... CONFIG_LS2085A (and CONFIG_LS102XA) are
board spezific defines, right?
If so, I do not want them in driver specific code... because
every board which uses this driver has to add here more defines.
Could you introduce a SoC or at least a driver specific define
here? Maybe CONFIG_SYS_I2C_MXC_I2C4 if no SoC specific code
is possible ...
Thanks!
bye,
Heiko
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Re: [U-Boot] [PATCH 4/6] mmc: Continue polling MMC card for OCR only if it is still not ready
Hi, Andrew
There is already a patch to fix this issue.
Patchwork: https://patchwork.ozlabs.org/patch/451775/
Regards,
Peng.
-Original Message-
From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Andrew Gabbasov
Sent: Thursday, March 19, 2015 8:44 PM
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 4/6] mmc: Continue polling MMC card for OCR only if it
is still not ready
Some MMC cards come to ready state quite quickly, so that the respective flag
appears to be set in mmc_send_op_cond already. In this case trying to continue
polling the card with CMD1 in mmc_complete_op_cond is incorrect and may lead to
unpredictable results. So check the flag before polling and skip it
appropriately.
Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com
---
drivers/mmc/mmc.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index d073d79..42af47c 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -403,15 +403,17 @@ static int mmc_complete_op_cond(struct mmc *mmc)
int err;
mmc-op_cond_pending = 0;
- start = get_timer(0);
- do {
- err = mmc_send_op_cond_iter(mmc, 1);
- if (err)
- return err;
- if (get_timer(start) timeout)
- return UNUSABLE_ERR;
- udelay(100);
- } while (!(mmc-ocr OCR_BUSY));
+ if (!(mmc-ocr OCR_BUSY)) {
+ start = get_timer(0);
+ do {
+ err = mmc_send_op_cond_iter(mmc, 1);
+ if (err)
+ return err;
+ if (get_timer(start) timeout)
+ return UNUSABLE_ERR;
+ udelay(100);
+ } while (!(mmc-ocr OCR_BUSY));
+ }
if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
--
2.1.0
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Re: [U-Boot] [PATCH 15/28] net/memac_phy: reuse driver for little endian SoCs
On Thu, Mar 19, 2015 at 10:48 PM, Shaohui Xie shaohui@freescale.com wrote: /* IFC */ #define CONFIG_SYS_FSL_IFC_LE +#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN It seems tedious to have to define this. Can't you just use the functions available? [S.H] To use a define is based on a concern that we cannot assume the I/O access of an IP share same endianness as the Soc(s), we cannot assume on little endian Soc the I/O access is little endian, on big endian Soc the I/O access is big endian, the I/O access could be little endian on big endian Soc and vice versa. You're saying that the IP is expected to be in different endianness? If that is practically the case, then I'm fine with this patch. I just want to ensure that it is not just speculative generality. [S.H] Yes. The IP is in different endianness, i.e. little endian on LS2, big endian on PowerPc Soc(s). OK. It seems that in both of your examples the IP endianness matches the SoC endianness, which is why I recommended what I did in the first reply. If you think that this is needed flexibility, then, Acked-by: Joe Hershberger joe.hershber...@ni.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 15/28] net/memac_phy: reuse driver for little endian SoCs
Hello Joe,
Thank you for reviewing this patch!
Please see inline.
Best Regards,
Shaohui Xie
From: Joe Hershberger [mailto:joe.hershber...@gmail.com]
Sent: Friday, March 20, 2015 2:04 AM
To: Sun York-R58495
Cc: u-boot; Joe Hershberger; Xie Shaohui-B21989
Subject: Re: [U-Boot] [PATCH 15/28] net/memac_phy: reuse driver for little
endian SoCs
Hi Shaohui Xie,
On Thu, Mar 19, 2015 at 11:45 AM, York Sun
york...@freescale.commailto:york...@freescale.com wrote:
From: Shaohui Xie
shaohui@freescale.commailto:shaohui@freescale.com
The memac for PHY management on little endian SoCs is similar on big
endian SoCs, so we modify the driver by using I/O accessor function to
handle the endianness, so the driver can be reused on little endian
SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian
SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access
is little endian, if not, the I/O access is big endian. Move fsl_memac.h
out of powerpc include.
Signed-off-by: Shaohui Xie
shaohui@freescale.commailto:shaohui@freescale.com
CC: Joe Hershberger joe.hershber...@ni.commailto:joe.hershber...@ni.com
---
arch/arm/include/asm/arch-fsl-lsch3/config.h |1 +
drivers/net/Makefile |1 +
drivers/net/fm/eth.c |2 +-
drivers/net/fm/memac.c|2 +-
drivers/net/fm/memac_phy.c| 62
++---
drivers/net/vsc9953.c |2 +-
{arch/powerpc/include/asm = include}/fsl_memac.h |0
7 files changed, 46 insertions(+), 24 deletions(-)
rename {arch/powerpc/include/asm = include}/fsl_memac.h (100%)
diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h
b/arch/arm/include/asm/arch-fsl-lsch3/config.h
index 98db1ef..684c70f 100644
--- a/arch/arm/include/asm/arch-fsl-lsch3/config.h
+++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h
@@ -109,6 +109,7 @@
/* IFC */
#define CONFIG_SYS_FSL_IFC_LE
+#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
It seems tedious to have to define this. Can't you just use the functions
available?
[S.H] To use a define is based on a concern that we cannot assume the I/O
access of an IP share same endianness as the Soc(s), we cannot assume on little
endian Soc the I/O access is little endian, on big endian Soc the I/O access is
big endian, the I/O access could be little endian on big endian Soc and vice
versa.
/* PCIe */
#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x240)
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 5497934..d871093 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -66,4 +66,5 @@ obj-$(CONFIG_XILINX_LL_TEMAC) += xilinx_ll_temac.o
xilinx_ll_temac_mdio.o \
obj-$(CONFIG_ZYNQ_GEM) += zynq_gem.o
obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/
obj-$(CONFIG_FSL_MC_ENET) += ldpaa_eth/
+obj-$(CONFIG_FSL_MEMAC) += fm/memac_phy.o
obj-$(CONFIG_VSC9953) += vsc9953.o
diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index 1d1089d..a7a5c69 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -15,7 +15,7 @@
#include phy.h
#include asm/fsl_dtsec.h
#include asm/fsl_tgec.h
-#include asm/fsl_memac.h
+#include fsl_memac.h
#include fm.h
diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c
index 60e898c..81a64bf 100644
--- a/drivers/net/fm/memac.c
+++ b/drivers/net/fm/memac.c
@@ -12,7 +12,7 @@
#include phy.h
#include asm/types.h
#include asm/io.h
-#include asm/fsl_memac.h
+#include fsl_memac.h
#include fm.h
diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c
index a155d89..4ab78e6 100644
--- a/drivers/net/fm/memac_phy.c
+++ b/drivers/net/fm/memac_phy.c
@@ -10,9 +10,28 @@
#include miiphy.h
#include phy.h
#include asm/io.h
-#include asm/fsl_memac.h
+#include fsl_memac.h
#include fm_eth.h
+#ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN
This can already be detected, right?
#if __BYTE_ORDER == __LITTLE_ENDIAN
[S.H] The issue is the IP’s I/O access order on LS2 is different from big
endian Soc(s).
+#define memac_out_32(a, v) out_le32(a, v)
+#define memac_clrbits_32(a, v) clrbits_le32(a, v)
+#define memac_setbits_32(a, v) setbits_le32(a, v)
+#else
+#define memac_out_32(a, v) out_be32(a, v)
+#define memac_clrbits_32(a, v) clrbits_be32(a, v)
+#define memac_setbits_32(a, v) setbits_be32(a, v)
+#endif
+
+static u32 memac_in_32(u32 *reg)
+{
+#ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN
+ return in_le32(reg);
+#else
+ return in_be32(reg);
+#endif
+}
Another option you have is to take the approach that you don't care the
endianness. Something like using the this type of pattern:
value = ntohl(in_be32(reg));
out_be32(reg, htonl(value));
[S.H] same concern as above.
+
/*
* Write value to the PHY for this device to the register at regnum, waiting
* until the write is done before it returns. All PHY
Re: [U-Boot] [PATCH 28/28] armv8/fsl-lsch3: Implement workaround for I2C issue
Hello York,
Am 19.03.2015 17:45, schrieb York Sun:
This erratum requires setting GLITCH_EN bit in debug register.
Signed-off-by: York Sun york...@freescale.com
---
arch/arm/cpu/armv8/fsl-lsch3/soc.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/soc.c
b/arch/arm/cpu/armv8/fsl-lsch3/soc.c
index ca00108..4d9df20 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/soc.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/soc.c
@@ -37,11 +37,41 @@ static void erratum_rcw_src(void)
#endif
}
+#define I2C_DEBUG_REG 0x6
+#define I2C_GLITCH_EN 0x8
+static void erratum_i2c(void)
Could you add here a short comment, where to find some info
about this erratum? Thanks!
+{
+ u8 __iomem *ptr;
+#ifdef CONFIG_SYS_I2C
+#ifdef I2C1_BASE_ADDR
+ ptr = (u8 __iomem *)(I2C1_BASE_ADDR + I2C_DEBUG_REG);
using a struct here would be nicer ...
bye,
Heiko
+
+ writeb(I2C_GLITCH_EN, ptr);
+#endif
+#ifdef I2C2_BASE_ADDR
+ ptr = (u8 __iomem *)(I2C2_BASE_ADDR + I2C_DEBUG_REG);
+
+ writeb(I2C_GLITCH_EN, ptr);
+#endif
+#ifdef I2C3_BASE_ADDR
+ ptr = (u8 __iomem *)(I2C3_BASE_ADDR + I2C_DEBUG_REG);
+
+ writeb(I2C_GLITCH_EN, ptr);
+#endif
+#ifdef I2C4_BASE_ADDR
+ ptr = (u8 __iomem *)(I2C4_BASE_ADDR + I2C_DEBUG_REG);
+
+ writeb(I2C_GLITCH_EN, ptr);
+#endif
+#endif
+}
+
void fsl_lsch3_early_init_f(void)
{
erratum_a008751();
erratum_rcw_src();
init_early_memctl_regs(); /* tighten IFC timing */
+ erratum_i2c();
}
#ifdef CONFIG_SPL_BUILD
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Re: [U-Boot] [PATCH 13/28] net/phy/cortina: Fix compilation warning
On Thu, Mar 19, 2015 at 11:45 AM, York Sun york...@freescale.com wrote: From: pankaj chauhan pankaj.chau...@freescale.com Fix comilation warning which is emitted when firmware address is more than 32 bit. Signed-off-by: pankaj chauhan pankaj.chau...@freescale.com CC: Joe Hershberger joe.hershber...@ni.com Acked-by: Joe Hershberger joe.hershber...@ni.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] arm: mx5: Add support for USB armory board
Hello Vagrant, On Thu, Mar 19, 2015 at 1:55 PM, Vagrant Cascadian vagr...@debian.org wrote: On 2015-02-24, and...@inversepath.com wrote: Add support for Inverse Path USB armory board, an open source flash-drive sized computer based on Freescale i.MX53 SoC. ... diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h new file mode 100644 index 000..e00ec7b --- /dev/null +++ b/include/configs/usbarmory.h ... +#include asm/arch/imx-regs.h +#include config_cmd_default.h Would you consider patches that include config_distro_defaults.h and config_distro_bootcmd.h, documented in doc/README.distro? It may require adding several variables such as fdt_addr_r, fdtfile, ramdisk_addr_r, ramdiskfile, kernel_addr_r, bootfile, pxe_addr_r and scriptaddr, documented in README and doc/README.distro. I'd be happy to work on patches. I'd like to enable the usbarmory target in Debian's u-boot packages, and this would make it easier for it to behave more-or-less consistantly with several other platforms, and allow for more flexibility when booting. It'd be nice to do the same for other reference boards. If you want to work on this I can help working on the Yocto Project BSP to support it as well :) -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 15/28] net/memac_phy: reuse driver for little endian SoCs
Hi Shaohui Xie,
On Thu, Mar 19, 2015 at 11:45 AM, York Sun york...@freescale.com wrote:
From: Shaohui Xie shaohui@freescale.com
The memac for PHY management on little endian SoCs is similar on big
endian SoCs, so we modify the driver by using I/O accessor function to
handle the endianness, so the driver can be reused on little endian
SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian
SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access
is little endian, if not, the I/O access is big endian. Move fsl_memac.h
out of powerpc include.
Signed-off-by: Shaohui Xie shaohui@freescale.com
CC: Joe Hershberger joe.hershber...@ni.com
---
arch/arm/include/asm/arch-fsl-lsch3/config.h |1 +
drivers/net/Makefile |1 +
drivers/net/fm/eth.c |2 +-
drivers/net/fm/memac.c|2 +-
drivers/net/fm/memac_phy.c| 62
++---
drivers/net/vsc9953.c |2 +-
{arch/powerpc/include/asm = include}/fsl_memac.h |0
7 files changed, 46 insertions(+), 24 deletions(-)
rename {arch/powerpc/include/asm = include}/fsl_memac.h (100%)
diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h
b/arch/arm/include/asm/arch-fsl-lsch3/config.h
index 98db1ef..684c70f 100644
--- a/arch/arm/include/asm/arch-fsl-lsch3/config.h
+++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h
@@ -109,6 +109,7 @@
/* IFC */
#define CONFIG_SYS_FSL_IFC_LE
+#define CONFIG_SYS_MEMAC_LITTLE_ENDIAN
It seems tedious to have to define this. Can't you just use the functions
available?
/* PCIe */
#define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR +
0x240)
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 5497934..d871093 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -66,4 +66,5 @@ obj-$(CONFIG_XILINX_LL_TEMAC) += xilinx_ll_temac.o
xilinx_ll_temac_mdio.o \
obj-$(CONFIG_ZYNQ_GEM) += zynq_gem.o
obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/
obj-$(CONFIG_FSL_MC_ENET) += ldpaa_eth/
+obj-$(CONFIG_FSL_MEMAC) += fm/memac_phy.o
obj-$(CONFIG_VSC9953) += vsc9953.o
diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index 1d1089d..a7a5c69 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -15,7 +15,7 @@
#include phy.h
#include asm/fsl_dtsec.h
#include asm/fsl_tgec.h
-#include asm/fsl_memac.h
+#include fsl_memac.h
#include fm.h
diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c
index 60e898c..81a64bf 100644
--- a/drivers/net/fm/memac.c
+++ b/drivers/net/fm/memac.c
@@ -12,7 +12,7 @@
#include phy.h
#include asm/types.h
#include asm/io.h
-#include asm/fsl_memac.h
+#include fsl_memac.h
#include fm.h
diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c
index a155d89..4ab78e6 100644
--- a/drivers/net/fm/memac_phy.c
+++ b/drivers/net/fm/memac_phy.c
@@ -10,9 +10,28 @@
#include miiphy.h
#include phy.h
#include asm/io.h
-#include asm/fsl_memac.h
+#include fsl_memac.h
#include fm_eth.h
+#ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN
This can already be detected, right?
#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define memac_out_32(a, v) out_le32(a, v)
+#define memac_clrbits_32(a, v) clrbits_le32(a, v)
+#define memac_setbits_32(a, v) setbits_le32(a, v)
+#else
+#define memac_out_32(a, v) out_be32(a, v)
+#define memac_clrbits_32(a, v) clrbits_be32(a, v)
+#define memac_setbits_32(a, v) setbits_be32(a, v)
+#endif
+
+static u32 memac_in_32(u32 *reg)
+{
+#ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN
+ return in_le32(reg);
+#else
+ return in_be32(reg);
+#endif
+}
Another option you have is to take the approach that you don't care the
endianness. Something like using the this type of pattern:
value = ntohl(in_be32(reg));
out_be32(reg, htonl(value));
+
/*
* Write value to the PHY for this device to the register at regnum,
waiting
* until the write is done before it returns. All PHY configuration has
to be
@@ -28,31 +47,31 @@ int memac_mdio_write(struct mii_dev *bus, int
port_addr, int dev_addr,
if (dev_addr == MDIO_DEVAD_NONE) {
c45 = 0; /* clause 22 */
dev_addr = regnum 0x1f;
- clrbits_be32(regs-mdio_stat, MDIO_STAT_ENC);
+ memac_clrbits_32(regs-mdio_stat, MDIO_STAT_ENC);
} else
- setbits_be32(regs-mdio_stat, MDIO_STAT_ENC);
+ memac_setbits_32(regs-mdio_stat, MDIO_STAT_ENC);
/* Wait till the bus is free */
- while ((in_be32(regs-mdio_stat)) MDIO_STAT_BSY)
+ while ((memac_in_32(regs-mdio_stat)) MDIO_STAT_BSY)
;
/* Set the port and dev addr */
mdio_ctl = MDIO_CTL_PORT_ADDR(port_addr) |
MDIO_CTL_DEV_ADDR(dev_addr);
- out_be32(regs-mdio_ctl, mdio_ctl);
+ memac_out_32(regs-mdio_ctl, mdio_ctl);
Re: [U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts
On Thu, Mar 19, 2015 at 04:45:48PM +, York Sun wrote: From: Scott Wood scottw...@freescale.com This lets us see the problems (close to) when they happen, rather than Linux hanging when it enables them prior to having a working console. FYI, if the Linux driver for your UART supports earlycon, that should work since commit 7a9c43bed891d1f8 (setup: Move unmask of async interrupts after possible earlycon setup). I hope that SError is masked again prior to entering Linux, as required by the boot protocol? Mark. Signed-off-by: Scott Wood scottw...@freescale.com --- arch/arm/cpu/armv8/fsl-lsch3/cpu.c |4 1 file changed, 4 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c index 07064a3..22b5fb2 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c @@ -263,6 +263,10 @@ int arch_cpu_init(void) __asm_invalidate_tlb_all(); early_mmu_setup(); set_sctlr(get_sctlr() | CR_C); + + /* Enable system error aborts */ + asm volatile(msr daifclr, #4 : : : memory); + return 0; } -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] Document config_distro_bootcmd environment variables for interactive booting.
Signed-off-by: Karsten Merker mer...@debian.org --- doc/README.distro | 17 + 1 file changed, 17 insertions(+) diff --git a/doc/README.distro b/doc/README.distro index dd0f1c7..5150eda 100644 --- a/doc/README.distro +++ b/doc/README.distro @@ -1,6 +1,7 @@ /* * (C) Copyright 2014 Red Hat Inc. * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2015 K. Merker mer...@debian.org * * SPDX-License-Identifier: GPL-2.0+ */ @@ -339,3 +340,19 @@ scan_dev_for_scripts: If you want to disable boot.scr on all disks, set the value to something innocuous, e.g. setenv scan_dev_for_scripts true. + + +Interactively booting from a specific device at the u-boot prompt += + +For interactively booting from a user-selected device at the u-boot command +prompt, the environment provides predefined bootcmd_target variables for +every target defined in boot_targets, which can be run be the user. + +Examples: + + - run bootcmd_usb0 + boots from the first USB mass storage device + + - run bootcmd_mmc1 + boots from the second MMC device -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] config_distro_bootcmd and boot environment (was: Regression in bootcmd handling in v2015.04-rc3?)
Tom Rini tr...@konsulko.com wrote: So then we're settled on run bootcmd_usb was unintended but run bootcmd_usb0 is and must remain so if anything a slight update to doc/README.distro would be expected and we're good, right? Thanks guys! Following is a patch to add such a description to doc/README.distro. Regards, Karsten Karsten Merker (1): Document config_distro_bootcmd environment variables for interactive booting. doc/README.distro | 17 + 1 file changed, 17 insertions(+) -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts
On Thu, 2015-03-19 at 18:14 +, Mark Rutland wrote: On Thu, Mar 19, 2015 at 04:45:48PM +, York Sun wrote: From: Scott Wood scottw...@freescale.com This lets us see the problems (close to) when they happen, rather than Linux hanging when it enables them prior to having a working console. FYI, if the Linux driver for your UART supports earlycon, that should work since commit 7a9c43bed891d1f8 (setup: Move unmask of async interrupts after possible earlycon setup). I wrote this patch in the context of board bringup, where I was stuck using an older kernel. In any case, when U-Boot causes a problem we want to see it in U-Boot. I hope that SError is masked again prior to entering Linux, as required by the boot protocol? Doesn't look like it based on grepping for daifset. Where is the boot protocol documented? Just for future reference -- I agree that leaving this enabled during the handover would be a bad thing. Mark. Signed-off-by: Scott Wood scottw...@freescale.com York, where's your signoff since you're the one submitting the patch? -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts
On Thu, 2015-03-19 at 13:02 -0700, York Sun wrote: On 03/19/2015 12:58 PM, Scott Wood wrote: On Thu, 2015-03-19 at 12:54 -0700, York Sun wrote: On 03/19/2015 12:52 PM, Scott Wood wrote: On Thu, 2015-03-19 at 18:14 +, Mark Rutland wrote: On Thu, Mar 19, 2015 at 04:45:48PM +, York Sun wrote: Signed-off-by: Scott Wood scottw...@freescale.com York, where's your signoff since you're the one submitting the patch? I am sending many patches in this set. Since I didn't contribute to this patch, I didn't add my signed-off-by. That's not what signed-off-by means. I realize (though never understood why) the U-Boot project differs from Linux rules in terms of whether custodians are expected to sign off patches when applying, but does that extend to submitting patches by e-mail as well? I don't have the answer myself. I haven't added any of my signed-off-by for the patches I squashed/tested/sent. For small patch set, I would request the original author to send each patch. For large set with dependency, I send patch on behalf of the authors. I don't want to take credit for the patch I didn't contribute the change. I test all of them though. The From: line is for giving credit. Signed-off-by shows the path the patch took. Plus, leaving your name off puts all the blame on the author, when they weren't the ones who decided the patch was ready to submit. :-) -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts
On 03/19/2015 12:52 PM, Scott Wood wrote: On Thu, 2015-03-19 at 18:14 +, Mark Rutland wrote: On Thu, Mar 19, 2015 at 04:45:48PM +, York Sun wrote: From: Scott Wood scottw...@freescale.com This lets us see the problems (close to) when they happen, rather than Linux hanging when it enables them prior to having a working console. FYI, if the Linux driver for your UART supports earlycon, that should work since commit 7a9c43bed891d1f8 (setup: Move unmask of async interrupts after possible earlycon setup). I wrote this patch in the context of board bringup, where I was stuck using an older kernel. In any case, when U-Boot causes a problem we want to see it in U-Boot. I hope that SError is masked again prior to entering Linux, as required by the boot protocol? Doesn't look like it based on grepping for daifset. Where is the boot protocol documented? Just for future reference -- I agree that leaving this enabled during the handover would be a bad thing. Mark. Signed-off-by: Scott Wood scottw...@freescale.com York, where's your signoff since you're the one submitting the patch? I am sending many patches in this set. Since I didn't contribute to this patch, I didn't add my signed-off-by. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Document config_distro_bootcmd environment variables for interactive booting.
On 03/19/2015 01:41 PM, Karsten Merker wrote: A brief description would be nice. diff --git a/doc/README.distro b/doc/README.distro +Interactively booting from a specific device at the u-boot prompt += + +For interactively booting from a user-selected device at the u-boot command +prompt, the environment provides predefined bootcmd_target variables for +every target defined in boot_targets, which can be run be the user. + +Examples: + + - run bootcmd_usb0 + boots from the first USB mass storage device + + - run bootcmd_mmc1 + boots from the second MMC device Should we enumerate all the possible device types, e.g. include bootcmd_sata0, bootcmd_ide0, ...? We should definitely mention that bootcmd_usb is an internal implementation detail even though bootcmd_usb0 is a command that we intend users to run. In the text, perhaps rephrase bootcmd_target as bootcmd_devtypedevnum, and note that devnum is not optional in the command name? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts
On Thu, 2015-03-19 at 12:54 -0700, York Sun wrote: On 03/19/2015 12:52 PM, Scott Wood wrote: On Thu, 2015-03-19 at 18:14 +, Mark Rutland wrote: On Thu, Mar 19, 2015 at 04:45:48PM +, York Sun wrote: Signed-off-by: Scott Wood scottw...@freescale.com York, where's your signoff since you're the one submitting the patch? I am sending many patches in this set. Since I didn't contribute to this patch, I didn't add my signed-off-by. That's not what signed-off-by means. I realize (though never understood why) the U-Boot project differs from Linux rules in terms of whether custodians are expected to sign off patches when applying, but does that extend to submitting patches by e-mail as well? -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts
On 03/19/2015 12:58 PM, Scott Wood wrote: On Thu, 2015-03-19 at 12:54 -0700, York Sun wrote: On 03/19/2015 12:52 PM, Scott Wood wrote: On Thu, 2015-03-19 at 18:14 +, Mark Rutland wrote: On Thu, Mar 19, 2015 at 04:45:48PM +, York Sun wrote: Signed-off-by: Scott Wood scottw...@freescale.com York, where's your signoff since you're the one submitting the patch? I am sending many patches in this set. Since I didn't contribute to this patch, I didn't add my signed-off-by. That's not what signed-off-by means. I realize (though never understood why) the U-Boot project differs from Linux rules in terms of whether custodians are expected to sign off patches when applying, but does that extend to submitting patches by e-mail as well? I don't have the answer myself. I haven't added any of my signed-off-by for the patches I squashed/tested/sent. For small patch set, I would request the original author to send each patch. For large set with dependency, I send patch on behalf of the authors. I don't want to take credit for the patch I didn't contribute the change. I test all of them though. If the signed-off-by has different meanings, I am OK to change my practice. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/6] mmc: Fix OCR polling and splitted initialization
Patch 4 contains a fix for a problem that really occures with some MMC cards, that are capable to get to ready state within a single polling call. Patch 6 is a fix for an error, that may be not so important and is not visible at the moment, since no platform does actually use pre-initialization. However, it still makes sense to fix it. It also makes the code more clean, straightforward, and understandable. Patch 5 eliminates some unneeded delays in polling loops, thus improving overall performance. Patches 2 and 3 clean up the code, making it simpler and more correct. Patch 1 is actually not directly related to the patched code area, but just uses the occasion to fix the typo. This is a series of patches, the next patch depending on previous ones, so that should be applied in order, on top of previous ones. Andrew Gabbasov (6): mmc: Fix typo in MMC type checking macro mmc: Avoid extra duplicate entry in mmc device structure mmc: Do not pass external mmc_cmd structure to mmc_send_op_cond_iter() mmc: Continue polling MMC card for OCR only if it is still not ready mmc: Restructure polling loops to avoid extra delays mmc: Fix splitting device initialization drivers/mmc/mmc.c | 90 ++- include/mmc.h | 6 ++-- 2 files changed, 51 insertions(+), 45 deletions(-) -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot v2] [i2c] Pull request
On Wed, Mar 18, 2015 at 10:17:51AM +0100, Heiko Schocher wrote: Hello Tom, updated pull request for u-boot-i2c.git. Added the mvtwsi baudrate fix patch from Stefan after Hans added his Acked-by ... The following changes since commit 052a681bae8ee91c9854089549b20c857d499fd7: Prepare v2015.04-rc4 (2015-03-17 16:37:48 -0400) are available in the git repository at: git://git.denx.de/u-boot-i2c.git master for you to fetch changes up to f582a1583b2c7ae91737f3b1a0b850e7f4ef68bb: i2c: mvtwsi: Fix problem with baud rate calculation (2015-03-18 09:48:42 +0100) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PULL] Please pull u-boot-imx
On Wed, Mar 18, 2015 at 10:23:38AM +0100, Stefano Babic wrote: Hi Tom, please pull (small fixes) from u-boot-imx, thanks ! The following changes since commit 32df39c741788e8637cffe6633d73594b26d70fb: mx5: fix get_reset_cause (2015-03-05 10:29:27 +0100) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master for you to fetch changes up to d5eb6dcf44f5c889dd80c81cf3b06385a27f8baf: mx6sabre: Do not enable UMS with SPL (2015-03-13 13:46:51 +0100) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request: u-boot-mmc 18032015
On Wed, Mar 18, 2015 at 10:08:46AM +0200, Pantelis Antoniou wrote: Hi Tom, Only bug fixes for now, rather uneventful. The following changes since commit 3231e364bf8426a9c8fd5158fe2d155ae7b9: mmc: fsl_esdhc fix register offset (2015-03-17 09:09:47 -0400) are available in the git repository at: git://git.denx.de/u-boot-mmc.git master for you to fetch changes up to 3a48944bc9a7455fec97e9df74c3d5bb600d3d7c: mv_sdhci: fix warnings on 64-bit builds (2015-03-18 09:56:17 +0200) Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/6] mmc: Fix typo in MMC type checking macro
The version flag constant name used in IS_MMC macro is incorrect/undefined. Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com --- include/mmc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/mmc.h b/include/mmc.h index 2ad0f19..a251531 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -61,7 +61,7 @@ #define SD_DATA_4BIT 0x0004 #define IS_SD(x) ((x)-version SD_VERSION_SD) -#define IS_MMC(x) ((x)-version SD_VERSION_MMC) +#define IS_MMC(x) ((x)-version MMC_VERSION_MMC) #define MMC_DATA_READ 1 #define MMC_DATA_WRITE 2 -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] am335x: GPMC: reading speed with prefetch mode
I've got v2015.04-rc4 running on my custom am335x (600MHz) based
board. My 8-bit NAND chip:
[17.297793 0.004021] omap-gpmc 5000.gpmc: GPMC revision 6.0
[17.303850 0.006057] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda
[17.309706 0.005856] nand: Micron MT29F2G08ABAEAWP
[17.312823 0.003117] nand: 256MiB, SLC, page size: 2048, OOB size: 64
[17.317311 0.004488] nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme
I need to load about 17Mb FIT image from UBIFS partition. In Linux it
takes about 7 seconds:
# time cp /mnt/kernel-fit.itb /tmp/
real0m 7.12s
user0m 0.00s
sys 0m 6.89s
But U-Boot needs about twice the time:
[3.592231 0.004182] Booting from nand ...
[4.905171 1.312940] UBI: default fastmap pool size: 100
[4.912605 0.007434] UBI: default fastmap WL pool size: 25
[4.919754 0.007149] UBI: attaching mtd1 to ubi0
[5.354450 0.434696] UBI: attached by fastmap
[5.360417 0.005967] UBI: fastmap pool size: 100
[5.365765 0.005348] UBI: fastmap WL pool size: 25
[5.398237 0.032472] UBI: attached mtd1 (name mtd=5, size 253 MiB) to ubi0
[5.404582 0.006345] UBI: PEB size: 131072 bytes (128 KiB), LEB size:
129024 bytes
[5.409969 0.005387] UBI: min./max. I/O unit sizes: 2048/2048, sub-page size 512
[5.415245 0.005276] UBI: VID header offset: 512 (aligned 512), data offset: 2048
[5.420208 0.004963] UBI: good PEBs: 2029, bad PEBs: 0, corrupted PEBs: 0
[5.424650 0.004442] UBI: user volume: 1, internal volumes: 1, max.
volumes count: 128
[5.430645 0.005995] UBI: max/mean erase counter: 25/18, WL threshold:
4096, image sequence number: 1052535214
[5.438221 0.007576] UBI: available PEBs: 1527, total reserved PEBs:
502, PEBs reserved for bad PEB handling: 40
[5.810683 0.372462] Loading file 'kernel-fit.itb' to addr 0x8400
with size 17651408 (0x010d56d0)...
[19.013472 13.202789] Done
13 seconds are not affected by CONFIG_NAND_OMAP_GPMC_PREFETCH. Am I
missing some configs?
#ifdef CONFIG_NAND
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_GPMC_PREFETCH
#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
10, 11, 12, 13, 14, 15, 16, 17, \
18, 19, 20, 21, 22, 23, 24, 25, \
26, 27, 28, 29, 30, 31, 32, 33, \
34, 35, 36, 37, 38, 39, 40, 41, \
42, 43, 44, 45, 46, 47, 48, 49, \
50, 51, 52, 53, 54, 55, 56, 57, }
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES14
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
#define CONFIG_SYS_NAND_U_BOOT_STARTCONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x0008
#endif
#endif
Yegor
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[U-Boot] [PATCH 3/6] mmc: Do not pass external mmc_cmd structure to mmc_send_op_cond_iter()
The previous change to use 'ocr' structure field for storing send_op_cond
command response also stopped using command response directly
outside of mmc_send_op_cond_iter(). Now it becomes possible to use
command structure in mmc_send_op_cond_iter() locally, removing a necessity
to pass it as an argument from the caller.
Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com
---
drivers/mmc/mmc.c | 24 +++-
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index fe00a19..d073d79 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -350,34 +350,32 @@ static int sd_send_op_cond(struct mmc *mmc)
return 0;
}
-/* We pass in the cmd since otherwise the init seems to fail */
-static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
- int use_arg)
+static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
{
+ struct mmc_cmd cmd;
int err;
- cmd-cmdidx = MMC_CMD_SEND_OP_COND;
- cmd-resp_type = MMC_RSP_R3;
- cmd-cmdarg = 0;
+ cmd.cmdidx = MMC_CMD_SEND_OP_COND;
+ cmd.resp_type = MMC_RSP_R3;
+ cmd.cmdarg = 0;
if (use_arg !mmc_host_is_spi(mmc)) {
- cmd-cmdarg =
+ cmd.cmdarg =
(mmc-cfg-voltages
(mmc-ocr OCR_VOLTAGE_MASK)) |
(mmc-ocr OCR_ACCESS_MODE);
if (mmc-cfg-host_caps MMC_MODE_HC)
- cmd-cmdarg |= OCR_HCS;
+ cmd.cmdarg |= OCR_HCS;
}
- err = mmc_send_cmd(mmc, cmd, NULL);
+ err = mmc_send_cmd(mmc, cmd, NULL);
if (err)
return err;
- mmc-ocr = cmd-response[0];
+ mmc-ocr = cmd.response[0];
return 0;
}
static int mmc_send_op_cond(struct mmc *mmc)
{
- struct mmc_cmd cmd;
int err, i;
/* Some cards seem to need this */
@@ -386,7 +384,7 @@ static int mmc_send_op_cond(struct mmc *mmc)
/* Asking to the card its capabilities */
mmc-op_cond_pending = 1;
for (i = 0; i 2; i++) {
- err = mmc_send_op_cond_iter(mmc, cmd, i != 0);
+ err = mmc_send_op_cond_iter(mmc, i != 0);
if (err)
return err;
@@ -407,7 +405,7 @@ static int mmc_complete_op_cond(struct mmc *mmc)
mmc-op_cond_pending = 0;
start = get_timer(0);
do {
- err = mmc_send_op_cond_iter(mmc, cmd, 1);
+ err = mmc_send_op_cond_iter(mmc, 1);
if (err)
return err;
if (get_timer(start) timeout)
--
2.1.0
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[U-Boot] [PATCH 2/6] mmc: Avoid extra duplicate entry in mmc device structure
The 'op_cond_response' field in mmc structure contains the response
from the last SEND_OP_COND MMC command while making iterational
polling of the card. Later it is copied to 'ocr' field, designed
to contain the OCR register value, which is actually the same
response from the same command. So, these fields have actually
the same data, just in different time periods. It's easier to use
the same 'ocr' field in both cases at once, without temporary using
of the 'op_cond_response' field.
Signed-off-by: Andrew Gabbasov andrew_gabba...@mentor.com
---
drivers/mmc/mmc.c | 13 +++--
include/mmc.h | 1 -
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index a13769e..fe00a19 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -362,8 +362,8 @@ static int mmc_send_op_cond_iter(struct mmc *mmc, struct
mmc_cmd *cmd,
if (use_arg !mmc_host_is_spi(mmc)) {
cmd-cmdarg =
(mmc-cfg-voltages
- (mmc-op_cond_response OCR_VOLTAGE_MASK)) |
- (mmc-op_cond_response OCR_ACCESS_MODE);
+ (mmc-ocr OCR_VOLTAGE_MASK)) |
+ (mmc-ocr OCR_ACCESS_MODE);
if (mmc-cfg-host_caps MMC_MODE_HC)
cmd-cmdarg |= OCR_HCS;
@@ -371,7 +371,7 @@ static int mmc_send_op_cond_iter(struct mmc *mmc, struct
mmc_cmd *cmd,
err = mmc_send_cmd(mmc, cmd, NULL);
if (err)
return err;
- mmc-op_cond_response = cmd-response[0];
+ mmc-ocr = cmd-response[0];
return 0;
}
@@ -391,7 +391,7 @@ static int mmc_send_op_cond(struct mmc *mmc)
return err;
/* exit if not busy (flag seems to be inverted) */
- if (mmc-op_cond_response OCR_BUSY)
+ if (mmc-ocr OCR_BUSY)
return 0;
}
return IN_PROGRESS;
@@ -413,7 +413,7 @@ static int mmc_complete_op_cond(struct mmc *mmc)
if (get_timer(start) timeout)
return UNUSABLE_ERR;
udelay(100);
- } while (!(mmc-op_cond_response OCR_BUSY));
+ } while (!(mmc-ocr OCR_BUSY));
if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
@@ -424,10 +424,11 @@ static int mmc_complete_op_cond(struct mmc *mmc)
if (err)
return err;
+
+ mmc-ocr = cmd.response[0];
}
mmc-version = MMC_VERSION_UNKNOWN;
- mmc-ocr = cmd.response[0];
mmc-high_capacity = ((mmc-ocr OCR_HCS) == OCR_HCS);
mmc-rca = 1;
diff --git a/include/mmc.h b/include/mmc.h
index a251531..644e3fa 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -356,7 +356,6 @@ struct mmc {
char op_cond_pending; /* 1 if we are waiting on an op_cond command */
char init_in_progress; /* 1 if we have done mmc_start_init() */
char preinit; /* start init as early as possible */
- uint op_cond_response; /* the response byte from the last op_cond */
int ddr_mode;
};
--
2.1.0
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Re: [U-Boot] [PATCH v2 1/1] ARM: DRA7XX: Add config file for Android with fastboot support
On Thu, Mar 19, 2015 at 02:42:16AM +0530, Dileep Katta wrote:
Hi Tom,
On 18 March 2015 at 21:41, Tom Rini tr...@konsulko.com wrote:
On Wed, Mar 18, 2015 at 12:08:23AM +0530, Dileep Katta wrote:
- Added new configuration for Android fastboot
- This is based on following patch modified accordingly
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=b2e04f92b5d91c708b6fd6b79d2266966ac51f4b
Signed-off-by: Angela Stegmaier angelaba...@ti.com
Signed-off-by: Dileep Katta dileep.ka...@linaro.org
[snip]
@@ -43,6 +43,16 @@
uuid_disk=${uuid_gpt_disk}; \
name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}
+#ifdef CONFIG_DRA7XX_ANDROID
+/* Fastboot */
+#define CONFIG_CMD_FASTBOOT
+#define CONFIG_ANDROID_BOOT_IMAGE
+#define CONFIG_USB_FASTBOOT_BUF_ADDRCONFIG_SYS_LOAD_ADDR
+#define CONFIG_USB_FASTBOOT_BUF_SIZE0x2F00
+#define CONFIG_FASTBOOT_FLASH
+#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
+#endif
+
#include configs/ti_omap5_common.h
No, just enable fastboot. There's a growing population of people whose
workflow is use fastboot to shove a new test kernel at my device that
aren't strictly using Android, lets enable them.
OK, will enable fastboot unconditional.
Now there is no much difference for android_defconfig, but will still keep
separate config for future changes.
I remain unconvinced that we need a separate config upstream still.
@@ -115,7 +125,11 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#ifdef CONFIG_DRA7XX_ANDROID
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8
+#else
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x4
+#endif
Why are you moving U-Boot so much higher in SPI flash?
This is done to accommodate larger size MLO.
Oh that's right. Some parts can be made with a larger SRAM and thus we
could use a larger MLO. But are we? What functionality would we be
shoving into a larger MLO that would make sense to do this really?
Frankly I had been thinking that in these parts it makes more sense to
jump to full U-Boot and skip SPL rather than make SPL be very
complicated.
+#define CONFIG_USBDOWNLOAD_GADGET
+#define CONFIG_USB_GADGET_VBUS_DRAW 2
+#define CONFIG_G_DNL_MANUFACTURER Texas Instruments
+#ifdef CONFIG_CMD_FASTBOOT
+#define CONFIG_G_DNL_VENDOR_NUM 0x0451
+#define CONFIG_G_DNL_PRODUCT_NUM 0xd022
+#else
+#define CONFIG_G_DNL_VENDOR_NUM 0x0403
+#define CONFIG_G_DNL_PRODUCT_NUM 0xBD00
+#endif
+#define CONFIG_USB_GADGET_DUALSPEED
Why can't we always use one vid/pid?
As we are restricted to use the vid which fastboot host application knows,
the other/original
vid/pid kept intact for the dependent functionality, if any.
Will check if 0x0403/0xBD00 could be removed.
I think we can just always use the VID/PID that fastboot knows, DFU
isn't nearly so picky and other gadget use cases don't care I believe.
--
Tom
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Re: [U-Boot] 64Bit device tree compilation
Hi Hanna, On 18 March 2015 at 11:17, Hanna Hawa han...@marvell.com wrote: Hi Simon, My name is Hanna, I’m working in Software team in Marvell with Yehuda. I’m trying to run U-Boot with FDT in 64Bit. I’ve issue when I’m trying to load the image on my board, I got abort (**Synchronous Abort**) Exactly when the U-boot run fdt_addr_to_cpu(*cell) under lib/fdtdec.c The issue is the format of the FDT is 32Bit, and Big Endian mode. After some debug, I changed the typedef of fdt_size, and fdt_addr to be u32. Also fdt_addr_to_cpu, and fdt_size_to_cpu to use u32 swap, it works. My question is: Is that correct to change the typedef to use u32Bit? What do you have CONFIG_PHYS_64BIT set to? That is supposed to indicate the machine word size. Do you have a 64-bit CPU? I recall someone reporting that on 64-bit machines things like '*cell' can fail because the address is not always 64-bit aligned. But on 64-bit machines, fdt_addr_t should be 64-bit, so changing it to 32-bit seems wrong since you may not be able to address everything (e.g. the reg properties will be limited to the first 4GB). I suspect it is wrong to use *cell. Instead we could use fdtdec_get_number(cell, size) or similar logic. Any existing use of fdt_addr_t/fdt_size_t to access a cell is wrong, i.e. in fdtdec_get_addr_size() and fdtdec_decode_region(). You could send a patch for that. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] Exynos: Clock: Fix exynos5_get_periph_rate for I2C.
Ping. Guillaume Le 11/03/2015 10:34, Guillaume GARDET a écrit : Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec keyboard working again on Samsung Chromebook (snow). Changes in V2: reorder lines as requested by Joonyoung Shim. Signed-off-by: Guillaume GARDET guillaume.gar...@free.fr Cc: Akshay Saraswat aksha...@samsung.com Cc: Minkyu Kang mk7.k...@samsung.com Cc: Joonyoung Shim jy0922.s...@samsung.com --- arch/arm/cpu/armv7/exynos/clock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index c6455c2..2984867 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral) case PERIPH_ID_I2C6: case PERIPH_ID_I2C7: src = EXYNOS_SRC_MPLL; - div = readl(clk-div_top0); - sub_div = readl(clk-div_top1); + div = readl(clk-div_top1); + sub_div = readl(clk-div_top0); break; default: debug(%s: invalid peripheral %d, __func__, peripheral); ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers/net/e1000.c: Cleanup whitespace
On 03/19/2015 10:16 AM, Joe Hershberger wrote: On Thu, Mar 19, 2015 at 11:43 AM, York Sun york...@freescale.com mailto:york...@freescale.com wrote: From: Minghuan Lian minghuan.l...@freescale.com mailto:minghuan.l...@freescale.com The patch removes unnecessary whitespace to fix checkpatch's warning: unnecessary whitespace before a quoted newline Signed-off-by: Minghuan Lian minghuan.l...@freescale.com mailto:minghuan.l...@freescale.com CC: Joe Hershberger joe.hershber...@ni.com mailto:joe.hershber...@ni.com Acked-by: Joe Hershberger joe.hershber...@ni.com mailto:joe.hershber...@ni.com Want me to pull this one through my tree? No. Your ack is good enough. I will pull it in along with other patches. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_mem: Store last address/size/etc as ulong
On 19 March 2015 at 10:43, York Sun york...@freescale.com wrote: From: Scott Wood scottw...@freescale.com Otherwise the high 32 bits get truncated on 64-bit U-boot. Signed-off-by: Scott Wood scottw...@freescale.com CC: Simon Glass s...@chromium.org --- common/cmd_mem.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/common/cmd_mem.c b/common/cmd_mem.c index bcb3ee3..62a0404 100644 --- a/common/cmd_mem.c +++ b/common/cmd_mem.c @@ -35,9 +35,9 @@ static int mod_mem(cmd_tbl_t *, int, int, int, char * const []); /* Display values from last command. * Memory modify remembered values are different from display memory. */ -static uintdp_last_addr, dp_last_size; -static uintdp_last_length = 0x40; -static uintmm_last_addr, mm_last_size; +static ulong dp_last_addr, dp_last_size; +static ulong dp_last_length = 0x40; +static ulong mm_last_addr, mm_last_size; static ulong base_address = 0; Reviewed-by: Simon Glass s...@chromium.org -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] U-boot on MPC8641D based board
Hi Ashish On 03/19/2015 08:12 AM, Ashish Khetan wrote: Hi All, I have been facing a strange problem in my board which is MPC8641D based. In this board we have two nor spansion flashes connected to cs0 and cs1. U boot had detected both the flashes and when flinfo command is it shows both flash information but when we try to access another flash u-boot is crashing. Flash part no is s29gl01gs which is CFI complaint. Please provide some pointers where I should concentrate more to resolve this issue. As I have checked all the configuration in configuration file it seems to be fine. Any help will be really appreciated. As a rule of thumb, you need to provide u-boot version that you are running. Ideally you should run the latest mainline u-boot and reproduce the problem if you like to get effective help from others. So please reproduce the issue with the latest mainline u-boot, document the steps and provide some more info on your target hw. Regards Sinan Akman ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/28] armv8/ls2085a: Fix generic timer clock source
On Thu, Mar 19, 2015 at 04:45:35PM +, York Sun wrote:
The timer clock is system clock divided by 4, not fixed 12MHz. This is
common to the SoC, not board specific.
Signed-off-by: York Sun york...@freescale.com
---
README |8
arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 24
board/freescale/ls2085a/ls2085a.c | 18 --
include/configs/ls2085a_common.h |6 +-
4 files changed, 37 insertions(+), 19 deletions(-)
diff --git a/README b/README
index f473515..776ebf4 100644
--- a/README
+++ b/README
@@ -690,6 +690,14 @@ The following options need to be configured:
exists, unlike the similar options in the Linux kernel. Do not
set these options unless they apply!
+ COUNTER_FREQUENCY
+ Generic timer clock source frequency.
+
+ COUNTER_FREQUENCY_REAL
+ Generic timer clock source frequency if the real clock is
+ different from COUNTER_FREQUENCY, and can only be determined
+ at run time.
+
NOTE: The following can be machine specific errata. These
do have ability to provide rudimentary version and machine
specific checks, but expect no product checks.
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
index 94fd147..e985181 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
@@ -395,3 +395,27 @@ int arch_early_init_r(void)
return 0;
}
+
+int timer_init(void)
+{
+ u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
+ u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
+#ifdef COUNTER_FREQUENCY_REAL
+ unsigned long cntfrq = COUNTER_FREQUENCY_REAL;
+
+ /* Update with accurate clock frequency */
+ asm volatile(msr cntfrq_el0, %0 : : r (cntfrq) : memory);
+#endif
Is this executed on all CPUs, or do secondary CPUs have CNTFRQ
programmed with the correct value elsewhere?
Mark.
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Re: [U-Boot] [PATCH 04/28] armv8/ls2085a: Fix generic timer clock source
On Thu, Mar 19, 2015 at 06:16:25PM +, York Sun wrote:
On 03/19/2015 11:08 AM, Mark Rutland wrote:
+
+int timer_init(void)
+{
+ u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
+ u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
+#ifdef COUNTER_FREQUENCY_REAL
+ unsigned long cntfrq = COUNTER_FREQUENCY_REAL;
+
+ /* Update with accurate clock frequency */
+ asm volatile(msr cntfrq_el0, %0 : : r (cntfrq) : memory);
+#endif
Is this executed on all CPUs, or do secondary CPUs have CNTFRQ
programmed with the correct value elsewhere?
Only the primary CPU runs here. The secondary CPU doesn't come here.
Ok. Where does CNTFRQ get programmed for those CPUs?
If it's necessary to write COUNTER_FREQUENCY_REAL to the primary CPU's
CNTFRQ, that's also necessary on the secondaries before they enter the
OS.
Mark.
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Re: [U-Boot] 64Bit device tree compilation
On Thu, Mar 19, 2015 at 07:43:35AM -0600, Simon Glass wrote: Hi Hanna, On 18 March 2015 at 11:17, Hanna Hawa han...@marvell.com wrote: Hi Simon, My name is Hanna, I’m working in Software team in Marvell with Yehuda. I’m trying to run U-Boot with FDT in 64Bit. I’ve issue when I’m trying to load the image on my board, I got abort (**Synchronous Abort**) Exactly when the U-boot run fdt_addr_to_cpu(*cell) under lib/fdtdec.c The issue is the format of the FDT is 32Bit, and Big Endian mode. After some debug, I changed the typedef of fdt_size, and fdt_addr to be u32. Also fdt_addr_to_cpu, and fdt_size_to_cpu to use u32 swap, it works. My question is: Is that correct to change the typedef to use u32Bit? What do you have CONFIG_PHYS_64BIT set to? That is supposed to indicate the machine word size. Do you have a 64-bit CPU? I recall someone reporting that on 64-bit machines things like '*cell' can fail because the address is not always 64-bit aligned. But on 64-bit machines, fdt_addr_t should be 64-bit, so changing it to 32-bit seems wrong since you may not be able to address everything (e.g. the reg properties will be limited to the first 4GB). I suspect it is wrong to use *cell. Instead we could use fdtdec_get_number(cell, size) or similar logic. Any existing use of fdt_addr_t/fdt_size_t to access a cell is wrong, i.e. in fdtdec_get_addr_size() and fdtdec_decode_region(). You could send a patch for that. I have a couple of patches for this kind of issue that I encountered during recent bring-up of 64-bit U-Boot on Tegra210. I'm on my way out of the office right now, but I'll send out the patches tomorrow. Thierry pgp9wm0IiUlgf.pgp Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] arm: mx5: Add support for USB armory board
On 2015-02-24, and...@inversepath.com wrote: Add support for Inverse Path USB armory board, an open source flash-drive sized computer based on Freescale i.MX53 SoC. ... diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h new file mode 100644 index 000..e00ec7b --- /dev/null +++ b/include/configs/usbarmory.h ... +#include asm/arch/imx-regs.h +#include config_cmd_default.h Would you consider patches that include config_distro_defaults.h and config_distro_bootcmd.h, documented in doc/README.distro? It may require adding several variables such as fdt_addr_r, fdtfile, ramdisk_addr_r, ramdiskfile, kernel_addr_r, bootfile, pxe_addr_r and scriptaddr, documented in README and doc/README.distro. I'd be happy to work on patches. I'd like to enable the usbarmory target in Debian's u-boot packages, and this would make it easier for it to behave more-or-less consistantly with several other platforms, and allow for more flexibility when booting. live well, vagrant signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] cmd_mem: Store last address/size/etc as ulong
On 03/19/2015 10:50 AM, Simon Glass wrote: On 19 March 2015 at 10:43, York Sun york...@freescale.com wrote: From: Scott Wood scottw...@freescale.com Otherwise the high 32 bits get truncated on 64-bit U-boot. Signed-off-by: Scott Wood scottw...@freescale.com CC: Simon Glass s...@chromium.org --- common/cmd_mem.c |6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/common/cmd_mem.c b/common/cmd_mem.c index bcb3ee3..62a0404 100644 --- a/common/cmd_mem.c +++ b/common/cmd_mem.c @@ -35,9 +35,9 @@ static int mod_mem(cmd_tbl_t *, int, int, int, char * const []); /* Display values from last command. * Memory modify remembered values are different from display memory. */ -static uintdp_last_addr, dp_last_size; -static uintdp_last_length = 0x40; -static uintmm_last_addr, mm_last_size; +static ulong dp_last_addr, dp_last_size; +static ulong dp_last_length = 0x40; +static ulong mm_last_addr, mm_last_size; static ulong base_address = 0; Reviewed-by: Simon Glass s...@chromium.org Feel free to bring it in. Otherwise I will bring it in along with my other patches, targeting 2015.07. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] am335x: GPMC: reading speed with prefetch mode
Hi, On 03/19/2015 02:41 PM, Yegor Yefremov wrote: I've got v2015.04-rc4 running on my custom am335x (600MHz) based board. My 8-bit NAND chip: [17.297793 0.004021] omap-gpmc 5000.gpmc: GPMC revision 6.0 [17.303850 0.006057] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xda [17.309706 0.005856] nand: Micron MT29F2G08ABAEAWP [17.312823 0.003117] nand: 256MiB, SLC, page size: 2048, OOB size: 64 [17.317311 0.004488] nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme I need to load about 17Mb FIT image from UBIFS partition. In Linux it takes about 7 seconds: # time cp /mnt/kernel-fit.itb /tmp/ real0m 7.12s user0m 0.00s sys 0m 6.89s But U-Boot needs about twice the time: On my boards, I didn't load the uImage through UBIFS but directly from the raw mtdblock device. That might make a significant difference, depending on how UBIFS is implemented in U-Boot. For performance tests, I recommend you compare the numbers using 'dd' from the mtdblock device under Linux, and 'nand read.i' from U-Boot. Linux will, however, still be faster due to DMA, which is unsuable from U-Boot due to the lack of interrupt handlers. But in my tests, enabling the prefetch mode in U-Boot gave me a speed-up of roughly factor 2 IIRC. Thanks, Daniel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers/net/e1000.c: Cleanup whitespace
On Thu, Mar 19, 2015 at 11:43 AM, York Sun york...@freescale.com wrote: From: Minghuan Lian minghuan.l...@freescale.com The patch removes unnecessary whitespace to fix checkpatch's warning: unnecessary whitespace before a quoted newline Signed-off-by: Minghuan Lian minghuan.l...@freescale.com CC: Joe Hershberger joe.hershber...@ni.com Acked-by: Joe Hershberger joe.hershber...@ni.com Want me to pull this one through my tree? -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers/net/e1000.c: Cleanup whitespace
On 03/19/2015 10:19 AM, York Sun wrote: On 03/19/2015 10:16 AM, Joe Hershberger wrote: On Thu, Mar 19, 2015 at 11:43 AM, York Sun york...@freescale.com mailto:york...@freescale.com wrote: From: Minghuan Lian minghuan.l...@freescale.com mailto:minghuan.l...@freescale.com The patch removes unnecessary whitespace to fix checkpatch's warning: unnecessary whitespace before a quoted newline Signed-off-by: Minghuan Lian minghuan.l...@freescale.com mailto:minghuan.l...@freescale.com CC: Joe Hershberger joe.hershber...@ni.com mailto:joe.hershber...@ni.com Acked-by: Joe Hershberger joe.hershber...@ni.com mailto:joe.hershber...@ni.com Want me to pull this one through my tree? No. Your ack is good enough. I will pull it in along with other patches. A second thought, if you can bring it in for 2015.04, feel free to do so. Otherwise I will bring it in along with my other patches, targeting 2015.07. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers/net/e1000.c: Cleanup whitespace
On Thu, Mar 19, 2015 at 12:55 PM, York Sun york...@freescale.com wrote: On 03/19/2015 10:19 AM, York Sun wrote: On 03/19/2015 10:16 AM, Joe Hershberger wrote: On Thu, Mar 19, 2015 at 11:43 AM, York Sun york...@freescale.com mailto:york...@freescale.com wrote: From: Minghuan Lian minghuan.l...@freescale.com mailto:minghuan.l...@freescale.com The patch removes unnecessary whitespace to fix checkpatch's warning: unnecessary whitespace before a quoted newline Signed-off-by: Minghuan Lian minghuan.l...@freescale.com mailto:minghuan.l...@freescale.com CC: Joe Hershberger joe.hershber...@ni.com mailto: joe.hershber...@ni.com Acked-by: Joe Hershberger joe.hershber...@ni.com mailto: joe.hershber...@ni.com Want me to pull this one through my tree? No. Your ack is good enough. I will pull it in along with other patches. A second thought, if you can bring it in for 2015.04, feel free to do so. Otherwise I will bring it in along with my other patches, targeting 2015.07. It wouldn't be for 2015.04. Go ahead and take it along with your other patches. -Joe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/28] armv8/ls2085a: Fix generic timer clock source
On 03/19/2015 11:08 AM, Mark Rutland wrote:
+
+int timer_init(void)
+{
+u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
+u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
+#ifdef COUNTER_FREQUENCY_REAL
+unsigned long cntfrq = COUNTER_FREQUENCY_REAL;
+
+/* Update with accurate clock frequency */
+asm volatile(msr cntfrq_el0, %0 : : r (cntfrq) : memory);
+#endif
Is this executed on all CPUs, or do secondary CPUs have CNTFRQ
programmed with the correct value elsewhere?
Only the primary CPU runs here. The secondary CPU doesn't come here.
York
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Re: [U-Boot] [PATCH 04/28] armv8/ls2085a: Fix generic timer clock source
On 03/19/2015 11:17 AM, Mark Rutland wrote:
On Thu, Mar 19, 2015 at 06:16:25PM +, York Sun wrote:
On 03/19/2015 11:08 AM, Mark Rutland wrote:
+
+int timer_init(void)
+{
+ u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
+ u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
+#ifdef COUNTER_FREQUENCY_REAL
+ unsigned long cntfrq = COUNTER_FREQUENCY_REAL;
+
+ /* Update with accurate clock frequency */
+ asm volatile(msr cntfrq_el0, %0 : : r (cntfrq) : memory);
+#endif
Is this executed on all CPUs, or do secondary CPUs have CNTFRQ
programmed with the correct value elsewhere?
Only the primary CPU runs here. The secondary CPU doesn't come here.
Ok. Where does CNTFRQ get programmed for those CPUs?
If it's necessary to write COUNTER_FREQUENCY_REAL to the primary CPU's
CNTFRQ, that's also necessary on the secondaries before they enter the
OS.
Hmm, this may be a bug. Didn't hear any complain from Linux users. We found the
timer wasn't correct during bring-up. Let me check with internal team.
Thanks, Mark.
York
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Re: [U-Boot] [PATCH 14/28] drivers/fsl-mc: Changed MC firmware loading for new boot architecture
On Thu, 19 Mar 2015 09:45:45 -0700
York Sun york...@freescale.com wrote:
From: J. German Rivera german.riv...@freescale.com
Changed MC firmware loading to comply with the new MC boot architecture.
Flush D-cache hierarchy after loading MC images. Add environment
variables mcboottimeout for MC boot timeout in milliseconds,
mcmemsize for MC DRAM block size. Check MC boot status before calling
flib functions.
Can we just assign actual and/or optimal values for 'mcboottimeout'
and 'mcmemsize' instead of making them environment variables?
+static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
+{
+ u32 reg_gsr;
+ u32 mc_fw_boot_status;
+ unsigned long timeout_ms = get_mc_boot_timeout_ms();
+ struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
+
+ dmb();
+ debug(Polling mc_ccsr_regs-reg_gsr ...\n);
+ assert(timeout_ms 0);
+ for (;;) {
+ udelay(1000); /* throttle polling */
does this really need to be a whole 1ms?
@@ -318,14 +545,28 @@ int get_mc_boot_status(void)
/**
* Return the actual size of the MC private DRAM block.
- *
- * NOTE: For now this function always returns the minimum required size,
- * However, in the future, the actual size may be obtained from an
environment
- * variable.
*/
why?
Kim
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Re: [U-Boot] [PATCH v5 00/14] Add PSCI support for Jetson TK1/Tegra124 + CNTFRQ fix
On Mon, Mar 09, 2015 at 08:00:10AM +0100, Jan Kiszka wrote:
Changes in v4:
- rebased over master
- implemented psci_get_cpu_id as weak function
- implemented psci_disable/enable_smp as weak functions
- adjusted register interface of psci_get_cpu_stack_top
This version (+ the non-cached memory init fix) can also be found at
https://github.com/siemens/u-boot/tree/jetson-tk1-v5.
Jan
CC: Ian Campbell i...@hellion.org.uk
CC: Marc Zyngier marc.zyng...@arm.com
Ian Campbell (3):
tegra124: Add more registers to struct mc_ctlr
jetson-tk1: Add PSCI configuration options and reserve secure code
tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0
Jan Kiszka (11):
sun7i: Remove duplicate call to psci_arch_init
ARM: Factor out common psci_get_cpu_id
ARM: Factor out reusable psci_cpu_off_common
ARM: Factor out reusable psci_cpu_entry
ARM: Factor out reusable psci_get_cpu_stack_top
ARM: Put target PC for PSCI CPU_ON on per-CPU stack
virt-dt: Allow reservation of secure region when in a RAM carveout
tegra: Make tegra_powergate_power_on public
tegra: Add ap_pm_init hook
tegra124: Add PSCI support for Tegra124
tegra: Set CNTFRQ for secondary CPUs
arch/arm/cpu/armv7/psci.S | 121
arch/arm/cpu/armv7/sunxi/psci.S | 112 -
arch/arm/cpu/armv7/virt-dt.c| 29 +++
arch/arm/cpu/armv7/virt-v7.c| 5 ++
arch/arm/include/asm/arch-tegra/ap.h| 5 ++
arch/arm/include/asm/arch-tegra/powergate.h | 1 +
arch/arm/include/asm/arch-tegra124/flow.h | 6 ++
arch/arm/include/asm/arch-tegra124/mc.h | 35 +++-
arch/arm/include/asm/armv7.h| 1 +
arch/arm/include/asm/system.h | 1 +
arch/arm/lib/bootm-fdt.c| 5 ++
arch/arm/mach-tegra/Makefile| 4 +
arch/arm/mach-tegra/ap.c| 15
arch/arm/mach-tegra/powergate.c | 2 +-
arch/arm/mach-tegra/psci.S | 114 ++
arch/arm/mach-tegra/tegra124/Kconfig| 2 +
arch/arm/mach-tegra/tegra124/Makefile | 4 +
arch/arm/mach-tegra/tegra124/ap.c | 55 +
board/nvidia/common/board.c | 4 +
include/configs/jetson-tk1.h| 5 ++
20 files changed, 428 insertions(+), 98 deletions(-)
create mode 100644 arch/arm/mach-tegra/psci.S
create mode 100644 arch/arm/mach-tegra/tegra124/ap.c
For the series:
Reviewed-by: Thierry Reding tred...@nvidia.com
Tested-by: Thierry Reding tred...@nvidia.com
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[U-Boot] [PATCH 2/2] [PATCH v2] fix ARM DCC support for ARMv7 based cores (e.g. CortexA)
Signed-off-by: Alexander Merkle alexander.mer...@lauterbach.com --- include/configs/zynq-common.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 87b4fff..789e437 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -34,7 +34,6 @@ /* DCC driver */ #if defined(CONFIG_ZYNQ_DCC) # define CONFIG_ARM_DCC -# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ #else # define CONFIG_ZYNQ_SERIAL #endif -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/28] Adding LS2085AQDS and RDB
This set adds necessary support in common ls2085a support and board support for QDS and RDB. Bhupesh Sharma (1): armv8/fsl-ch3: Add support to print RCW configuration J. German Rivera (2): drivers/fsl-mc: Changed MC firmware loading for new boot architecture drivers/fsl-mc: Autoload AOIP image from NOR flash Jaiprakash Singh (1): driver/ifc: Add 64KB page support Minghuan Lian (1): armv8: Add SerDes framework for LayerScape Architecture Prabhakar Kushwaha (4): armv8/ls2085a: Update common header file driver/ldpaa_eth: Update ldpaa ethernet driver driver/ldpaa: Add support of WRIOP static data structure board/ls2085qds: Add support ethernet Scott Wood (8): armv8/fsl-lsch3: Set nodes in DVM domain fsl-lsch3: Introduce place for common early SoC init armv8/ls2085a: Add workaround for USB erratum A-008751 armv8/fsl-lsch3: Use correct compatible for serial clock fixup armv8/fsl-lsch3: Enable system error aborts armv8/ls2085aqds: NAND boot support freescale/qixis: Add support for booting from NAND armv8/ls2085ardb: Enable NAND SPL support Shaohui Xie (1): net/memac_phy: reuse driver for little endian SoCs Yangbo Lu (1): ls2085a: esdhc: Add esdhc support for ls2085a York Sun (7): armv8/fsl-lsch3: Implement workaround for erratum A008585 armv8/fsl-lsch3: Fix platform clock calculation armv8/ls2085a: Fix generic timer clock source armv8/fsl-lsch3: Update early MMU table armv8/ls2085aqds: Add support of LS2085AQDS platform armv8/ls2085ardb: Add support of LS2085ARDB platform armv8/fsl-lsch3: Implement workaround for I2C issue pankaj chauhan (2): armv8/ls2085a: Add support for reset request net/phy/cortina: Fix compilation warning README|8 + arch/arm/Kconfig | 24 + arch/arm/cpu/armv7/ls102xa/clock.c|4 +- arch/arm/cpu/armv8/fsl-lsch3/Makefile |2 + arch/arm/cpu/armv8/fsl-lsch3/README | 78 +++- arch/arm/cpu/armv8/fsl-lsch3/cpu.c| 123 - arch/arm/cpu/armv8/fsl-lsch3/fdt.c|9 +- arch/arm/cpu/armv8/fsl-lsch3/fsl_lsch3_serdes.c | 115 + arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S |9 + arch/arm/cpu/armv8/fsl-lsch3/ls2085a_serdes.c | 117 + arch/arm/cpu/armv8/fsl-lsch3/soc.c| 103 + arch/arm/cpu/armv8/fsl-lsch3/speed.c | 11 +- arch/arm/cpu/armv8/generic_timer.c| 11 + arch/arm/cpu/armv8/u-boot-spl.lds | 77 arch/arm/include/asm/arch-fsl-lsch3/config.h | 42 ++ arch/arm/include/asm/arch-fsl-lsch3/fsl_serdes.h | 67 +++ arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h | 29 ++ arch/arm/include/asm/arch-fsl-lsch3/soc.h |8 + arch/arm/lib/crt0_64.S|7 + arch/powerpc/cpu/mpc85xx/cpu_init_early.c |8 +- arch/powerpc/cpu/mpc85xx/speed.c |4 +- board/freescale/bsc9132qds/bsc9132qds.c |4 +- board/freescale/c29xpcie/c29xpcie.c |4 +- board/freescale/common/qixis.c| 31 +- board/freescale/ls2085a/ls2085a.c | 29 +- board/freescale/ls2085aqds/Kconfig| 16 + board/freescale/ls2085aqds/MAINTAINERS|7 + board/freescale/ls2085aqds/Makefile |9 + board/freescale/ls2085aqds/README | 129 ++ board/freescale/ls2085aqds/ddr.c | 196 board/freescale/ls2085aqds/ddr.h | 92 board/freescale/ls2085aqds/eth.c | 380 +++ board/freescale/ls2085aqds/ls2085aqds.c | 274 +++ board/freescale/ls2085aqds/ls2085aqds_qixis.h | 30 ++ board/freescale/ls2085ardb/Kconfig| 16 + board/freescale/ls2085ardb/MAINTAINERS|7 + board/freescale/ls2085ardb/Makefile |8 + board/freescale/ls2085ardb/README | 109 + board/freescale/ls2085ardb/ddr.c | 196 board/freescale/ls2085ardb/ddr.h | 92 board/freescale/ls2085ardb/ls2085ardb.c | 249 ++ board/freescale/ls2085ardb/ls2085ardb_qixis.h | 20 + board/freescale/p1010rdb/p1010rdb.c |5 +- board/freescale/p1010rdb/spl.c|4 +- common/board_r.c |6 + common/spl/spl.c |2 +- common/spl/spl_nand.c |2 +- configs/ls2085aqds_defconfig |3 + configs/ls2085aqds_nand_defconfig |4 + configs/ls2085ardb_defconfig |3 + configs/ls2085ardb_nand_defconfig |4 + drivers/misc/fsl_ifc.c| 12 + drivers/mmc/fsl_esdhc.c | 36 +-
Re: [U-Boot] [PATCH 04/28] armv8/ls2085a: Fix generic timer clock source
On Thu, Mar 19, 2015 at 06:24:10PM +, York Sun wrote:
On 03/19/2015 11:17 AM, Mark Rutland wrote:
On Thu, Mar 19, 2015 at 06:16:25PM +, York Sun wrote:
On 03/19/2015 11:08 AM, Mark Rutland wrote:
+
+int timer_init(void)
+{
+u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
+u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
+#ifdef COUNTER_FREQUENCY_REAL
+unsigned long cntfrq = COUNTER_FREQUENCY_REAL;
+
+/* Update with accurate clock frequency */
+asm volatile(msr cntfrq_el0, %0 : : r (cntfrq) : memory);
+#endif
Is this executed on all CPUs, or do secondary CPUs have CNTFRQ
programmed with the correct value elsewhere?
Only the primary CPU runs here. The secondary CPU doesn't come here.
Ok. Where does CNTFRQ get programmed for those CPUs?
If it's necessary to write COUNTER_FREQUENCY_REAL to the primary CPU's
CNTFRQ, that's also necessary on the secondaries before they enter the
OS.
Hmm, this may be a bug. Didn't hear any complain from Linux users. We found
the
timer wasn't correct during bring-up. Let me check with internal team.
Cheers!
If the CPUs don't have matching CNTFRQ, things will work most of the
time, but timekeeping will be broken in some cases (e.g. KVM guests,
after a kexec). It's not possible for the OS to fix this up, so the boot
protocol requires that it's programmed on all CPUs prior to entering the
kernel.
Since commit 127161aaf0fcd376 (arm64: add runtime system sanity
checks), Linux should complain at boot time if CNTFRQ is mismatched
across CPUs. We've added other sanity checks since that commit.
Mark.
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[U-Boot] [PATCH 1/2] fix ARM DCC support for ARMv7 based cores (e.g. CortexA)
fix arm_dcc.c implementation for ARMv7 based cores. remove now obsolete workaround for ZYNQ Alexander Merkle (2): fix ARM DCC support for ARMv7 based cores (e.g. CortexA) fix ARM DCC support for ARMv7 based cores (e.g. CortexA) drivers/serial/arm_dcc.c | 4 ++-- include/configs/zynq-common.h | 1 - 2 files changed, 2 insertions(+), 3 deletions(-) -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] fix ARM DCC support for ARMv7 based cores (e.g. CortexA)
Signed-off-by: Alexander Merkle alexander.mer...@lauterbach.com --- drivers/serial/arm_dcc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/serial/arm_dcc.c b/drivers/serial/arm_dcc.c index 5dfb02f..e37 100644 --- a/drivers/serial/arm_dcc.c +++ b/drivers/serial/arm_dcc.c @@ -29,9 +29,9 @@ #include common.h #include serial.h -#if defined(CONFIG_CPU_V6) +#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V7) /* - * ARMV6 + * ARMV6 ARMV7 */ #define DCC_RBIT (1 30) #define DCC_WBIT (1 29) -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] arm: mx5: Add support for USB armory board
Hi Vagrant, On Thu, Mar 19, 2015 at 09:55:26AM -0700, Vagrant Cascadian wrote: On 2015-02-24, and...@inversepath.com wrote: Add support for Inverse Path USB armory board, an open source flash-drive sized computer based on Freescale i.MX53 SoC. ... diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h new file mode 100644 index 000..e00ec7b --- /dev/null +++ b/include/configs/usbarmory.h ... +#include asm/arch/imx-regs.h +#include config_cmd_default.h Would you consider patches that include config_distro_defaults.h and config_distro_bootcmd.h, documented in doc/README.distro? It may require adding several variables such as fdt_addr_r, fdtfile, ramdisk_addr_r, ramdiskfile, kernel_addr_r, bootfile, pxe_addr_r and scriptaddr, documented in README and doc/README.distro. I'd be happy to work on patches. I'd like to enable the usbarmory target in Debian's u-boot packages, and this would make it easier for it to behave more-or-less consistantly with several other platforms, and allow for more flexibility when booting. Sure, it would be nice to have this included in the patch. I didn't know about this, I will take a look as well. Let me know if you need any help from my side. Thanks Andrej live well, vagrant -- Andrej Rosano Inverse Path Srl and...@inversepath.com http://www.inversepath.com 0x01939B215BB8 574E 68E8 D841 E18F D5E9 CEAD E0CF 0193 9B21 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 04/28] armv8/ls2085a: Fix generic timer clock source
On 03/19/2015 11:46 AM, Mark Rutland wrote:
On Thu, Mar 19, 2015 at 06:24:10PM +, York Sun wrote:
On 03/19/2015 11:17 AM, Mark Rutland wrote:
On Thu, Mar 19, 2015 at 06:16:25PM +, York Sun wrote:
On 03/19/2015 11:08 AM, Mark Rutland wrote:
+
+int timer_init(void)
+{
+u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
+u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
+#ifdef COUNTER_FREQUENCY_REAL
+unsigned long cntfrq = COUNTER_FREQUENCY_REAL;
+
+/* Update with accurate clock frequency */
+asm volatile(msr cntfrq_el0, %0 : : r (cntfrq) : memory);
+#endif
Is this executed on all CPUs, or do secondary CPUs have CNTFRQ
programmed with the correct value elsewhere?
Only the primary CPU runs here. The secondary CPU doesn't come here.
Ok. Where does CNTFRQ get programmed for those CPUs?
If it's necessary to write COUNTER_FREQUENCY_REAL to the primary CPU's
CNTFRQ, that's also necessary on the secondaries before they enter the
OS.
Hmm, this may be a bug. Didn't hear any complain from Linux users. We found
the
timer wasn't correct during bring-up. Let me check with internal team.
Cheers!
If the CPUs don't have matching CNTFRQ, things will work most of the
time, but timekeeping will be broken in some cases (e.g. KVM guests,
after a kexec). It's not possible for the OS to fix this up, so the boot
protocol requires that it's programmed on all CPUs prior to entering the
kernel.
Since commit 127161aaf0fcd376 (arm64: add runtime system sanity
checks), Linux should complain at boot time if CNTFRQ is mismatched
across CPUs. We've added other sanity checks since that commit.
I checked again. We don't have this Linux commit for internal development.
For u-boot, the secondary CPUs only have cntfrq set in start.S which is a
compiling macro, not a real time value. We happen to have it same as the real
value so no one observed any issue. If the board reference clock changes (which
is possible), the clock needs to be fixed. I will update the patch after
verification.
York
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Re: [U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts
On 03/19/2015 01:37 PM, Scott Wood wrote: On Thu, 2015-03-19 at 13:27 -0700, York Sun wrote: On 03/19/2015 01:06 PM, Scott Wood wrote: On Thu, 2015-03-19 at 13:02 -0700, York Sun wrote: On 03/19/2015 12:58 PM, Scott Wood wrote: On Thu, 2015-03-19 at 12:54 -0700, York Sun wrote: On 03/19/2015 12:52 PM, Scott Wood wrote: On Thu, 2015-03-19 at 18:14 +, Mark Rutland wrote: On Thu, Mar 19, 2015 at 04:45:48PM +, York Sun wrote: Signed-off-by: Scott Wood scottw...@freescale.com York, where's your signoff since you're the one submitting the patch? I am sending many patches in this set. Since I didn't contribute to this patch, I didn't add my signed-off-by. That's not what signed-off-by means. I realize (though never understood why) the U-Boot project differs from Linux rules in terms of whether custodians are expected to sign off patches when applying, but does that extend to submitting patches by e-mail as well? I don't have the answer myself. I haven't added any of my signed-off-by for the patches I squashed/tested/sent. For small patch set, I would request the original author to send each patch. For large set with dependency, I send patch on behalf of the authors. I don't want to take credit for the patch I didn't contribute the change. I test all of them though. The From: line is for giving credit. Signed-off-by shows the path the patch took. Plus, leaving your name off puts all the blame on the author, when they weren't the ones who decided the patch was ready to submit. :-) When multiple patches are squashed, I put authors' name in signed-off-by. For this reason, I think adding my signoff will be confusing. If there are multiple authors you can give credit with an explicit statement in the changelog. But I agree with you that I should have my name somewhere for the patches I sent. Doesn't the email from qualify? The email from doesn't go in the git history. Changelog doesn't goes to git history either. Anyway, adding my signed-off-by is not a burden to me. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts
On 03/19/2015 01:51 PM, Scott Wood wrote: On Thu, 2015-03-19 at 13:47 -0700, York Sun wrote: On 03/19/2015 01:37 PM, Scott Wood wrote: On Thu, 2015-03-19 at 13:27 -0700, York Sun wrote: On 03/19/2015 01:06 PM, Scott Wood wrote: On Thu, 2015-03-19 at 13:02 -0700, York Sun wrote: On 03/19/2015 12:58 PM, Scott Wood wrote: On Thu, 2015-03-19 at 12:54 -0700, York Sun wrote: On 03/19/2015 12:52 PM, Scott Wood wrote: On Thu, 2015-03-19 at 18:14 +, Mark Rutland wrote: On Thu, Mar 19, 2015 at 04:45:48PM +, York Sun wrote: Signed-off-by: Scott Wood scottw...@freescale.com York, where's your signoff since you're the one submitting the patch? I am sending many patches in this set. Since I didn't contribute to this patch, I didn't add my signed-off-by. That's not what signed-off-by means. I realize (though never understood why) the U-Boot project differs from Linux rules in terms of whether custodians are expected to sign off patches when applying, but does that extend to submitting patches by e-mail as well? I don't have the answer myself. I haven't added any of my signed-off-by for the patches I squashed/tested/sent. For small patch set, I would request the original author to send each patch. For large set with dependency, I send patch on behalf of the authors. I don't want to take credit for the patch I didn't contribute the change. I test all of them though. The From: line is for giving credit. Signed-off-by shows the path the patch took. Plus, leaving your name off puts all the blame on the author, when they weren't the ones who decided the patch was ready to submit. :-) When multiple patches are squashed, I put authors' name in signed-off-by. For this reason, I think adding my signoff will be confusing. If there are multiple authors you can give credit with an explicit statement in the changelog. But I agree with you that I should have my name somewhere for the patches I sent. Doesn't the email from qualify? The email from doesn't go in the git history. Changelog doesn't goes to git history either. Yes, it does. I'm not talking about the comments below the --- that are sometimes used to give history of the patch itself or other transient info. The stuff above the --- is the git changelog. Can you show me some examples so I can follow? Back to this patch, it is not critical for u-boot to operate. Do you want to drop this patch? York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts
On 03/19/2015 01:06 PM, Scott Wood wrote: On Thu, 2015-03-19 at 13:02 -0700, York Sun wrote: On 03/19/2015 12:58 PM, Scott Wood wrote: On Thu, 2015-03-19 at 12:54 -0700, York Sun wrote: On 03/19/2015 12:52 PM, Scott Wood wrote: On Thu, 2015-03-19 at 18:14 +, Mark Rutland wrote: On Thu, Mar 19, 2015 at 04:45:48PM +, York Sun wrote: Signed-off-by: Scott Wood scottw...@freescale.com York, where's your signoff since you're the one submitting the patch? I am sending many patches in this set. Since I didn't contribute to this patch, I didn't add my signed-off-by. That's not what signed-off-by means. I realize (though never understood why) the U-Boot project differs from Linux rules in terms of whether custodians are expected to sign off patches when applying, but does that extend to submitting patches by e-mail as well? I don't have the answer myself. I haven't added any of my signed-off-by for the patches I squashed/tested/sent. For small patch set, I would request the original author to send each patch. For large set with dependency, I send patch on behalf of the authors. I don't want to take credit for the patch I didn't contribute the change. I test all of them though. The From: line is for giving credit. Signed-off-by shows the path the patch took. Plus, leaving your name off puts all the blame on the author, when they weren't the ones who decided the patch was ready to submit. :-) When multiple patches are squashed, I put authors' name in signed-off-by. For this reason, I think adding my signoff will be confusing. But I agree with you that I should have my name somewhere for the patches I sent. Doesn't the email from qualify? York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts
On Thu, 2015-03-19 at 13:47 -0700, York Sun wrote: On 03/19/2015 01:37 PM, Scott Wood wrote: On Thu, 2015-03-19 at 13:27 -0700, York Sun wrote: On 03/19/2015 01:06 PM, Scott Wood wrote: On Thu, 2015-03-19 at 13:02 -0700, York Sun wrote: On 03/19/2015 12:58 PM, Scott Wood wrote: On Thu, 2015-03-19 at 12:54 -0700, York Sun wrote: On 03/19/2015 12:52 PM, Scott Wood wrote: On Thu, 2015-03-19 at 18:14 +, Mark Rutland wrote: On Thu, Mar 19, 2015 at 04:45:48PM +, York Sun wrote: Signed-off-by: Scott Wood scottw...@freescale.com York, where's your signoff since you're the one submitting the patch? I am sending many patches in this set. Since I didn't contribute to this patch, I didn't add my signed-off-by. That's not what signed-off-by means. I realize (though never understood why) the U-Boot project differs from Linux rules in terms of whether custodians are expected to sign off patches when applying, but does that extend to submitting patches by e-mail as well? I don't have the answer myself. I haven't added any of my signed-off-by for the patches I squashed/tested/sent. For small patch set, I would request the original author to send each patch. For large set with dependency, I send patch on behalf of the authors. I don't want to take credit for the patch I didn't contribute the change. I test all of them though. The From: line is for giving credit. Signed-off-by shows the path the patch took. Plus, leaving your name off puts all the blame on the author, when they weren't the ones who decided the patch was ready to submit. :-) When multiple patches are squashed, I put authors' name in signed-off-by. For this reason, I think adding my signoff will be confusing. If there are multiple authors you can give credit with an explicit statement in the changelog. But I agree with you that I should have my name somewhere for the patches I sent. Doesn't the email from qualify? The email from doesn't go in the git history. Changelog doesn't goes to git history either. Yes, it does. I'm not talking about the comments below the --- that are sometimes used to give history of the patch itself or other transient info. The stuff above the --- is the git changelog. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Document config_distro_bootcmd environment variables for interactive booting.
On 03/19/2015 02:53 PM, Karsten Merker wrote: On Thu, Mar 19, 2015 at 01:53:14PM -0600, Stephen Warren wrote: +Interactively booting from a specific device at the u-boot prompt += + +For interactively booting from a user-selected device at the u-boot command +prompt, the environment provides predefined bootcmd_target variables for +every target defined in boot_targets, which can be run be the user. + +Examples: + + - run bootcmd_usb0 + boots from the first USB mass storage device + + - run bootcmd_mmc1 + boots from the second MMC device Should we enumerate all the possible device types, e.g. include bootcmd_sata0, bootcmd_ide0, ...? Hm, I suppose that depends on whether there is such a thing as definitve list of all possible device types on all platforms and how many elements are in this list. Are functionally equivalent devices named the same on all platforms, i.e. is a PATA interface always ide0, or could it be ide0 on one platform and pata0 on another? The list is limited to the macros that are set up in config_distro_bootcmd.h. At least for the device types supported there, and the set of platforms which use that header so far, a particular device type is always named the same on all platforms. I'd expect a patch that added a new device type to the header to update the list in the documentation. In the text, perhaps rephrase bootcmd_target as bootcmd_devtypedevnum, and note that devnum is not optional in the command name? I had thought about explictly using devtype and devnum, but there are device types such as pxe which do not have a devnum, so I chose to use the generic target designation instead. I can change that, but it might cause confusion so that a user would try to use something like run bootcmd_pxe0 which would not work. I would therefore prefer the generic target designation. Ah yes. Perhaps continue to use target and then explain that when target is a storage device that can have multiple instances, the format of target must be devtypedevnum, but in other cases (pxe, dhcp), it is just a standalone name? ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 04/28] armv8/ls2085a: Fix generic timer clock source
The timer clock is system clock divided by 4, not fixed 12MHz. This is
common to the SoC, not board specific.
Signed-off-by: York Sun york...@freescale.com
---
Changes in v2:
Fix CNTFRQ for secondary cores when COUNTER_FREQUENCY_REAL is defined.
README |8
arch/arm/cpu/armv8/fsl-lsch3/cpu.c | 26 ++
arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S |6 ++
arch/arm/cpu/armv8/fsl-lsch3/mp.h |1 +
board/freescale/ls2085a/ls2085a.c | 18 --
include/configs/ls2085a_common.h|6 +-
6 files changed, 46 insertions(+), 19 deletions(-)
diff --git a/README b/README
index f473515..776ebf4 100644
--- a/README
+++ b/README
@@ -690,6 +690,14 @@ The following options need to be configured:
exists, unlike the similar options in the Linux kernel. Do not
set these options unless they apply!
+ COUNTER_FREQUENCY
+ Generic timer clock source frequency.
+
+ COUNTER_FREQUENCY_REAL
+ Generic timer clock source frequency if the real clock is
+ different from COUNTER_FREQUENCY, and can only be determined
+ at run time.
+
NOTE: The following can be machine specific errata. These
do have ability to provide rudimentary version and machine
specific checks, but expect no product checks.
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
index 94fd147..f75b21d 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
@@ -395,3 +395,29 @@ int arch_early_init_r(void)
return 0;
}
+
+int timer_init(void)
+{
+ u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
+ u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
+#ifdef COUNTER_FREQUENCY_REAL
+ unsigned long cntfrq = COUNTER_FREQUENCY_REAL;
+
+ /* Update with accurate clock frequency */
+ asm volatile(msr cntfrq_el0, %0 : : r (cntfrq) : memory);
+
+ __real_cntfrq = cntfrq; /* update for secondary cores */
+#endif
+
+ /* Enable timebase for all clusters.
+* It is safe to do so even some clusters are not enabled.
+*/
+ out_le32(cltbenr, 0xf);
+
+ /* Enable clock for timer
+* This is a global setting.
+*/
+ out_le32(cntcr, 0x1);
+
+ return 0;
+}
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S
b/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S
index 886576e..8d330ff 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S
+++ b/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S
@@ -224,6 +224,9 @@ ENTRY(secondary_boot_func)
/* physical address of this cpus spin table element */
add x11, x1, x0
+ ldr x0, =__real_cntfrq
+ ldr x0, [x0]
+ msr cntfrq_el0, x0 /* set with real frequency */
str x9, [x11, #16] /* LPID */
mov x4, #1
str x4, [x11, #8] /* STATUS */
@@ -275,6 +278,9 @@ ENDPROC(secondary_switch_to_el1)
/* 64 bit alignment for elements accessed as data */
.align 4
+ .global __real_cntfrq
+__real_cntfrq:
+ .quad 0x17d7840 /* 25MHz */
.globl __secondary_boot_code_size
.type __secondary_boot_code_size, %object
/* Secondary Boot Code ends here */
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/mp.h
b/arch/arm/cpu/armv8/fsl-lsch3/mp.h
index 66144d6..c985d6a 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/mp.h
+++ b/arch/arm/cpu/armv8/fsl-lsch3/mp.h
@@ -26,6 +26,7 @@
#define id_to_core(x) ((x 3) | (x 6))
#ifndef __ASSEMBLY__
extern u64 __spin_table[];
+extern u64 __real_cntfrq;
extern u64 *secondary_boot_code;
extern size_t __secondary_boot_code_size;
int fsl_lsch3_wake_seconday_cores(void);
diff --git a/board/freescale/ls2085a/ls2085a.c
b/board/freescale/ls2085a/ls2085a.c
index e78c63a..bd016e9 100644
--- a/board/freescale/ls2085a/ls2085a.c
+++ b/board/freescale/ls2085a/ls2085a.c
@@ -55,24 +55,6 @@ int dram_init(void)
return 0;
}
-int timer_init(void)
-{
- u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
- u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
-
- /* Enable timebase for all clusters.
-* It is safe to do so even some clusters are not enabled.
-*/
- out_le32(cltbenr, 0xf);
-
- /* Enable clock for timer
-* This is a global setting.
-*/
- out_le32(cntcr, 0x1);
-
- return 0;
-}
-
/*
* Board specific reset that is system reset.
*/
diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h
index 339337d..b47cf68 100644
--- a/include/configs/ls2085a_common.h
+++ b/include/configs/ls2085a_common.h
@@ -72,7 +72,11 @@
#define CONFIG_DP_DDR_NUM_CTRLS1
/* Generic Timer Definitions */
-#define COUNTER_FREQUENCY 1200/* 12MHz */
Re: [U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts
On Thu, 2015-03-19 at 13:27 -0700, York Sun wrote: On 03/19/2015 01:06 PM, Scott Wood wrote: On Thu, 2015-03-19 at 13:02 -0700, York Sun wrote: On 03/19/2015 12:58 PM, Scott Wood wrote: On Thu, 2015-03-19 at 12:54 -0700, York Sun wrote: On 03/19/2015 12:52 PM, Scott Wood wrote: On Thu, 2015-03-19 at 18:14 +, Mark Rutland wrote: On Thu, Mar 19, 2015 at 04:45:48PM +, York Sun wrote: Signed-off-by: Scott Wood scottw...@freescale.com York, where's your signoff since you're the one submitting the patch? I am sending many patches in this set. Since I didn't contribute to this patch, I didn't add my signed-off-by. That's not what signed-off-by means. I realize (though never understood why) the U-Boot project differs from Linux rules in terms of whether custodians are expected to sign off patches when applying, but does that extend to submitting patches by e-mail as well? I don't have the answer myself. I haven't added any of my signed-off-by for the patches I squashed/tested/sent. For small patch set, I would request the original author to send each patch. For large set with dependency, I send patch on behalf of the authors. I don't want to take credit for the patch I didn't contribute the change. I test all of them though. The From: line is for giving credit. Signed-off-by shows the path the patch took. Plus, leaving your name off puts all the blame on the author, when they weren't the ones who decided the patch was ready to submit. :-) When multiple patches are squashed, I put authors' name in signed-off-by. For this reason, I think adding my signoff will be confusing. If there are multiple authors you can give credit with an explicit statement in the changelog. But I agree with you that I should have my name somewhere for the patches I sent. Doesn't the email from qualify? The email from doesn't go in the git history. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 17/28] armv8/fsl-lsch3: Enable system error aborts
On Thu, 2015-03-19 at 13:56 -0700, York Sun wrote: On 03/19/2015 01:51 PM, Scott Wood wrote: On Thu, 2015-03-19 at 13:47 -0700, York Sun wrote: On 03/19/2015 01:37 PM, Scott Wood wrote: On Thu, 2015-03-19 at 13:27 -0700, York Sun wrote: On 03/19/2015 01:06 PM, Scott Wood wrote: On Thu, 2015-03-19 at 13:02 -0700, York Sun wrote: On 03/19/2015 12:58 PM, Scott Wood wrote: On Thu, 2015-03-19 at 12:54 -0700, York Sun wrote: On 03/19/2015 12:52 PM, Scott Wood wrote: On Thu, 2015-03-19 at 18:14 +, Mark Rutland wrote: On Thu, Mar 19, 2015 at 04:45:48PM +, York Sun wrote: Signed-off-by: Scott Wood scottw...@freescale.com York, where's your signoff since you're the one submitting the patch? I am sending many patches in this set. Since I didn't contribute to this patch, I didn't add my signed-off-by. That's not what signed-off-by means. I realize (though never understood why) the U-Boot project differs from Linux rules in terms of whether custodians are expected to sign off patches when applying, but does that extend to submitting patches by e-mail as well? I don't have the answer myself. I haven't added any of my signed-off-by for the patches I squashed/tested/sent. For small patch set, I would request the original author to send each patch. For large set with dependency, I send patch on behalf of the authors. I don't want to take credit for the patch I didn't contribute the change. I test all of them though. The From: line is for giving credit. Signed-off-by shows the path the patch took. Plus, leaving your name off puts all the blame on the author, when they weren't the ones who decided the patch was ready to submit. :-) When multiple patches are squashed, I put authors' name in signed-off-by. For this reason, I think adding my signoff will be confusing. If there are multiple authors you can give credit with an explicit statement in the changelog. But I agree with you that I should have my name somewhere for the patches I sent. Doesn't the email from qualify? The email from doesn't go in the git history. Changelog doesn't goes to git history either. Yes, it does. I'm not talking about the comments below the --- that are sometimes used to give history of the patch itself or other transient info. The stuff above the --- is the git changelog. Can you show me some examples so I can follow? This patch includes work by name, name, and name. Back to this patch, it is not critical for u-boot to operate. Do you want to drop this patch? From this patchset, sure. But it ought to be fixed and resubmitted at some point. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6 2/8] lpc32xx: mtd: nand: add MLC NAND controller
On Wed, 2015-03-18 at 10:04 +0100, Albert ARIBAUD (3ADEV) wrote:
+int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
+{
+ int block_good;
bool?
+ struct lpc32xx_oob oob;
+ unsigned int page, left;
+
+ /* if starting mid-block consider block good */
+ block_good = 1;
+
+ for (page = offs / BYTES_PER_PAGE,
+ left = DIV_ROUND_UP(size, BYTES_PER_PAGE);
+ left (page PAGES_PER_CHIP_MAX); page++) {
+ /* read inband and oob page data anyway */
+ int res = read_single_page(dst, page, oob);
+ /* return error if a good block's page was not readable */
+ if ((res 0) block_good)
+ return -1;
Why even try to read it if it's been marked bad?
+ /* if first page in a block, update 'block good' status */
The non-SPL driver appears to be checking the last two pages in the
block, not the first page.
+ if ((page % PAGES_PER_BLOCK) == 0) {
+ /* assume block is good */
+ block_good = 1;
+ /* if page could not be read, assume block is bad */
+ if (res 0)
+ block_good = 0;
No. A block is to be skipped if and only if it has a bad block marker.
ECC errors should not be silently ignored just because they happen on
the first page of a block. If the writer of this data didn't skip the
block, then skipping it when reading will result in unusable data
regardless of the underlying ECC problem.
-Scott
___
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[U-Boot] [PATCH 4/8] driver/ldpaa_eth: Add LDPAA Ethernet driver
From: Prabhakar Kushwaha prabha...@freescale.com
LDPAA Ethernet driver is a freescale's new ethernet driver based on
Layerscape architecture.
Every ethernet driver controls on DPNI object. Where all DPNIs share
one common DPBP and DPIO object to support Rx and Tx flows.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
CC: Cristian Sovaiala cristian.sovai...@freescale.com
CC: Bogdan Hamciuc bogdan.hamc...@freescale.com
CC: J. German Rivera german.riv...@freescale.com
---
arch/arm/include/asm/arch-fsl-lsch3/config.h|6 +
drivers/net/Makefile|1 +
drivers/net/fsl-mc/mc.c | 16 +-
drivers/net/{fsl-mc/dpio = ldpaa_eth}/Makefile |5 +-
drivers/net/ldpaa_eth/ldpaa_eth.c | 695 +++
drivers/net/ldpaa_eth/ldpaa_eth.h | 153 +
include/fsl-mc/fsl_mc_private.h |2 +
7 files changed, 872 insertions(+), 6 deletions(-)
copy drivers/net/{fsl-mc/dpio = ldpaa_eth}/Makefile (59%)
create mode 100644 drivers/net/ldpaa_eth/ldpaa_eth.c
create mode 100644 drivers/net/ldpaa_eth/ldpaa_eth.h
diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h
b/arch/arm/include/asm/arch-fsl-lsch3/config.h
index 0217582..1d2a7fa 100644
--- a/arch/arm/include/asm/arch-fsl-lsch3/config.h
+++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h
@@ -10,6 +10,12 @@
#include fsl_ddrc_version.h
#define CONFIG_SYS_PAGE_SIZE 0x1
+
+#ifndef L1_CACHE_BYTES
+#define L1_CACHE_SHIFT 6
+#define L1_CACHE_BYTES (1 L1_CACHE_SHIFT)
+#endif
+
#define CONFIG_MP
#define CONFIG_SYS_FSL_OCRAM_BASE 0x1800 /* initial RAM */
/* Link Definitions */
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index b8b0803..5497934 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -65,4 +65,5 @@ obj-$(CONFIG_XILINX_LL_TEMAC) += xilinx_ll_temac.o
xilinx_ll_temac_mdio.o \
xilinx_ll_temac_fifo.o xilinx_ll_temac_sdma.o
obj-$(CONFIG_ZYNQ_GEM) += zynq_gem.o
obj-$(CONFIG_FSL_MC_ENET) += fsl-mc/
+obj-$(CONFIG_FSL_MC_ENET) += ldpaa_eth/
obj-$(CONFIG_VSC9953) += vsc9953.o
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index e29ee3d..2a2b0af 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -397,9 +397,10 @@ int dpbp_init(struct dprc_obj_desc obj_desc)
return 0;
}
-int dprc_init_container_obj(struct dprc_obj_desc obj_desc)
+int dprc_init_container_obj(struct dprc_obj_desc obj_desc, uint16_t
dprc_handle)
{
- int error = 0;
+ int error = 0, state = 0;
+ struct dprc_endpoint dpni_endpoint, dpmac_endpoint;
if (!strcmp(obj_desc.type, dpbp)) {
if (!dflt_dpbp) {
error = dpbp_init(obj_desc);
@@ -412,6 +413,15 @@ int dprc_init_container_obj(struct dprc_obj_desc obj_desc)
if (error 0)
printf(dpio_init failed\n);
}
+ } else if (!strcmp(obj_desc.type, dpni)) {
+ strcpy(dpni_endpoint.type, obj_desc.type);
+ dpni_endpoint.id = obj_desc.id;
+ error = dprc_get_connection(dflt_mc_io, dprc_handle,
+dpni_endpoint, dpmac_endpoint, state);
+ if (!strcmp(dpmac_endpoint.type, dpmac))
+ error = ldpaa_eth_init(obj_desc);
+ if (error 0)
+ printf(ldpaa_eth_init failed\n);
}
return error;
@@ -436,7 +446,7 @@ int dprc_scan_container_obj(uint16_t dprc_handle, char
*obj_type, int i)
debug(Discovered object: type %s, id %d, req %s\n,
obj_desc.type, obj_desc.id, obj_type);
- error = dprc_init_container_obj(obj_desc);
+ error = dprc_init_container_obj(obj_desc, dprc_handle);
if (error 0) {
printf(dprc_init_container_obj(i=%d) failed: %d\n,
i, error);
diff --git a/drivers/net/fsl-mc/dpio/Makefile b/drivers/net/ldpaa_eth/Makefile
similarity index 59%
copy from drivers/net/fsl-mc/dpio/Makefile
copy to drivers/net/ldpaa_eth/Makefile
index 1ccefc0..3b1a60b 100644
--- a/drivers/net/fsl-mc/dpio/Makefile
+++ b/drivers/net/ldpaa_eth/Makefile
@@ -4,6 +4,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
-# Layerscape MC DPIO driver
-obj-y += dpio.o\
- qbman_portal.o
+# Layerscape LDPAA driver
+obj-y += ldpaa_eth.o
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c
b/drivers/net/ldpaa_eth/ldpaa_eth.c
new file mode 100644
index 000..b79942f
--- /dev/null
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -0,0 +1,695 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/types.h
+#include malloc.h
+#include net.h
+#include hwconfig.h
+#include phy.h
+#include linux/compat.h
+
+#include
[U-Boot] [PATCH 6/8] driver/fsl_ifc: Add support to finalize CS1, CS3 address binding
From: Prabhakar Kushwaha prabha...@freescale.com For fsl-lsch3, IFC is binded with address within 32-bit at fist. After u-boot relocates to DDR, CS1, CS3 can be binded to higher address to support large space. Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Signed-off-by: York Sun york...@freescale.com --- drivers/misc/fsl_ifc.c |9 + 1 file changed, 9 insertions(+) diff --git a/drivers/misc/fsl_ifc.c b/drivers/misc/fsl_ifc.c index 3902e9f..45d299c 100644 --- a/drivers/misc/fsl_ifc.c +++ b/drivers/misc/fsl_ifc.c @@ -168,4 +168,13 @@ void init_final_memctl_regs(void) #ifdef CONFIG_SYS_CSPR0_FINAL set_ifc_cspr(IFC_CS0, CONFIG_SYS_CSPR0_FINAL); #endif +#ifdef CONFIG_SYS_CSPR1_FINAL + set_ifc_cspr(IFC_CS1, CONFIG_SYS_CSPR1_FINAL); +#endif +#ifdef CONFIG_SYS_AMASK1_FINAL + set_ifc_amask(IFC_CS1, CONFIG_SYS_AMASK1_FINAL); +#endif +#ifdef CONFIG_SYS_CSPR3_FINAL + set_ifc_cspr(IFC_CS3, CONFIG_SYS_CSPR3_FINAL); +#endif } -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/8] armv8/fsl-lsch3: Add Freescale Debug Server driver
From: Bhupesh Sharma bhupesh.sha...@freescale.com
The Debug Server driver is responsible for loading the Debug
server FW on the Service Processor (Cortex-A5 core) on LS2085A like
SoCs and then polling for the successful initialization of the same.
TOP MEM HIDE is adjusted to ensure the space required by Debug Server
FW is accounted for. MC uses the DDR area which is calculated as:
MC DDR region start = Top of DDR - area reserved by Debug Server FW
Signed-off-by: Bhupesh Sharma bhupesh.sha...@freescale.com
---
arch/arm/cpu/armv8/fsl-lsch3/cpu.c |2 +-
arch/arm/include/asm/arch-fsl-lsch3/config.h | 10 +-
board/freescale/ls2085a/ls2085a.c| 29 +++
drivers/misc/Makefile|1 +
drivers/misc/fsl_debug_server.c | 246 ++
drivers/net/fsl-mc/mc.c |4 +
include/configs/ls2085a_common.h | 20 ++-
include/fsl-mc/fsl_mc.h |1 +
include/fsl_debug_server.h | 32
9 files changed, 338 insertions(+), 7 deletions(-)
create mode 100644 drivers/misc/fsl_debug_server.c
create mode 100644 include/fsl_debug_server.h
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
index 4997487..618fbc2 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c
@@ -10,6 +10,7 @@
#include asm/armv8/mmu.h
#include asm/io.h
#include asm/arch-fsl-lsch3/immap_lsch3.h
+#include fsl_debug_server.h
#include fsl-mc/fsl_mc.h
#include cpu.h
#include mp.h
@@ -384,7 +385,6 @@ int cpu_eth_init(bd_t *bis)
return error;
}
-
int arch_early_init_r(void)
{
int rv;
diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h
b/arch/arm/include/asm/arch-fsl-lsch3/config.h
index b140c1f..59d10bf 100644
--- a/arch/arm/include/asm/arch-fsl-lsch3/config.h
+++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h
@@ -30,6 +30,15 @@
#define CONFIG_SYS_FSL_PMU_CLTBENR (CONFIG_SYS_FSL_PMU_ADDR + \
0x18A0)
+/* SP (Cortex-A5) related */
+#define CONFIG_SYS_FSL_SP_ADDR (CONFIG_SYS_IMMR + 0x00F0)
+#define CONFIG_SYS_FSL_SP_VSG_GIC_ADDR (CONFIG_SYS_FSL_SP_ADDR)
+#define CONFIG_SYS_FSL_SP_VSG_GIC_VIGR1(CONFIG_SYS_FSL_SP_ADDR)
+#define CONFIG_SYS_FSL_SP_VSG_GIC_VIGR2\
+ (CONFIG_SYS_FSL_SP_ADDR + 0x0008)
+#define CONFIG_SYS_FSL_SP_LOOPBACK_DUART \
+ (CONFIG_SYS_FSL_SP_ADDR + 0x1000)
+
#define CONFIG_SYS_FSL_DCSR_DDR_ADDR 0x70012c000ULL
#define CONFIG_SYS_FSL_DCSR_DDR2_ADDR 0x70012d000ULL
#define CONFIG_SYS_FSL_DCSR_DDR3_ADDR 0x700132000ULL
@@ -88,7 +97,6 @@
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS2_DDR_BLOCK1_SIZE
#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
-
/* IFC */
#define CONFIG_SYS_FSL_IFC_LE
diff --git a/board/freescale/ls2085a/ls2085a.c
b/board/freescale/ls2085a/ls2085a.c
index 519d61c..a16c2c8 100644
--- a/board/freescale/ls2085a/ls2085a.c
+++ b/board/freescale/ls2085a/ls2085a.c
@@ -12,6 +12,7 @@
#include asm/io.h
#include fdt_support.h
#include libfdt.h
+#include fsl_debug_server.h
#include fsl-mc/fsl_mc.h
#include environment.h
@@ -79,6 +80,34 @@ void reset_cpu(ulong addr)
{
}
+#if defined(CONFIG_ARCH_MISC_INIT)
+int arch_misc_init(void)
+{
+#ifdef CONFIG_FSL_DEBUG_SERVER
+ debug_server_init();
+#endif
+
+ return 0;
+}
+#endif
+
+unsigned long get_dram_size_to_hide(void)
+{
+ unsigned long dram_to_hide = 0;
+
+/* Carve the Debug Server private DRAM block from the end of DRAM */
+#ifdef CONFIG_FSL_DEBUG_SERVER
+ dram_to_hide += debug_server_get_dram_block_size();
+#endif
+
+/* Carve the MC private DRAM block from the end of DRAM */
+#ifdef CONFIG_FSL_MC_ENET
+ dram_to_hide += mc_get_dram_block_size();
+#endif
+
+ return dram_to_hide;
+}
+
int board_eth_init(bd_t *bis)
{
int error = 0;
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 6028cd4..3dd76eb 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o
obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
+obj-$(CONFIG_FSL_DEBUG_SERVER) += fsl_debug_server.o
obj-$(CONFIG_FSL_IIM) += fsl_iim.o
obj-$(CONFIG_GPIO_LED) += gpio_led.o
obj-$(CONFIG_I2C_EEPROM) += i2c_eeprom.o
diff --git a/drivers/misc/fsl_debug_server.c b/drivers/misc/fsl_debug_server.c
new file mode 100644
index 000..e080fe6
--- /dev/null
+++ b/drivers/misc/fsl_debug_server.c
@@ -0,0 +1,246 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include errno.h
+#include asm/io.h
+#include asm/system.h
+#include
[U-Boot] [PATCH 7/8] nand/fsl_ifc: Increase eccstat[] for IFC 2.0
From: Scott Wood scottw...@freescale.com
IFC 2.0 doubled the SRAM size, which means double the number of
ECCSTAT registers. Fix the resulting array overflow.
Signed-off-by: Scott Wood scottw...@freescale.com
---
drivers/mtd/nand/fsl_ifc_nand.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index b283eae..16266fa 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -292,7 +292,7 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
struct fsl_ifc *ifc = ctrl-regs;
u32 timeo = (CONFIG_SYS_HZ * 10) / 1000;
u32 time_start;
- u32 eccstat[4] = {0};
+ u32 eccstat[8] = {0};
int i;
/* set the chip select for NAND Transaction */
@@ -325,8 +325,15 @@ static int fsl_ifc_run_command(struct mtd_info *mtd)
int sector = bufnum * chip-ecc.steps;
int sector_end = sector + chip-ecc.steps - 1;
- for (i = sector / 4; i = sector_end / 4; i++)
+ for (i = sector / 4; i = sector_end / 4; i++) {
+ if (i = ARRAY_SIZE(eccstat)) {
+ printf(%s: eccstat too small for %d\n,
+ __func__, i);
+ return -EIO;
+ }
+
eccstat[i] = ifc_in32(ifc-ifc_nand.nand_eccstat[i]);
+ }
for (i = sector; i = sector_end; i++) {
errors = check_read_ecc(mtd, ctrl, eccstat, i);
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 5/8] board/ls2085_common: Increase malloc length
From: Prabhakar Kushwaha prabha...@freescale.com Increase malloc length for more than 2M. Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com Change-Id: Id3b87453be03c97467ab58c841274fb5ea0883f2 Reviewed-on: http://git.am.freescale.net:8181/26580 Tested-by: Review Code-CDREVIEW cdrev...@freescale.com --- include/configs/ls2085a_common.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index c70ba70..eb7b9b2 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -78,7 +78,7 @@ #define COUNTER_FREQUENCY 1200/* 12MHz */ /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024) /* I2C */ #define CONFIG_CMD_I2C -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/4] driver/ddr/fsl: Fix driver to support empty first slot
CS0 was not allowed to be empty by u-boot driver in the past to simplify
the driver. This may be inconvenient for some debugging. This patch lifts
the restrictions. Controller interleaving still requires CS0 populated.
Signed-off-by: York Sun york...@freescale.com
---
drivers/ddr/fsl/ctrl_regs.c | 64 +--
drivers/ddr/fsl/ddr4_dimm_params.c |3 +-
drivers/ddr/fsl/interactive.c |5 ++-
drivers/ddr/fsl/lc_common_dimm_params.c |5 +--
drivers/ddr/fsl/options.c |7 +++-
5 files changed, 56 insertions(+), 28 deletions(-)
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
index 9ccddef..b692bdb 100644
--- a/drivers/ddr/fsl/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -1116,8 +1116,14 @@ static void set_ddr_sdram_mode_9(fsl_ddr_cfg_regs_t *ddr,
int i;
unsigned short esdmode4 = 0;/* Extended SDRAM mode 4 */
unsigned short esdmode5;/* Extended SDRAM mode 5 */
+ int rtt_park = 0;
- esdmode5 = 0x0500; /* Data mask enabled */
+ if (ddr-cs[0].config SDRAM_CS_CONFIG_EN) {
+ esdmode5 = 0x0500; /* Data mask enable, RTT_PARK CS0 */
+ rtt_park = 1;
+ } else {
+ esdmode5 = 0x0400; /* Data mask enabled */
+ }
ddr-ddr_sdram_mode_9 = (0
| ((esdmode4 0x) 16)
@@ -1125,11 +1131,17 @@ static void set_ddr_sdram_mode_9(fsl_ddr_cfg_regs_t
*ddr,
);
/* only mode_9 use 0x500, others use 0x400 */
- esdmode5 = 0x0400; /* Data mask enabled */
debug(FSLDDR: ddr_sdram_mode_9) = 0x%08x\n, ddr-ddr_sdram_mode_9);
if (unq_mrs_en) { /* unique mode registers are supported */
for (i = 1; i CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
+ if (!rtt_park
+ (ddr-cs[i].config SDRAM_CS_CONFIG_EN)) {
+ esdmode5 |= 0x0500; /* RTT_PARK */
+ rtt_park = 1;
+ } else {
+ esdmode5 = 0x0400;
+ }
switch (i) {
case 1:
ddr-ddr_sdram_mode_11 = (0
@@ -1969,31 +1981,41 @@ static void set_ddr_dq_mapping(fsl_ddr_cfg_regs_t *ddr,
const dimm_params_t *dimm_params)
{
unsigned int acc_ecc_en = (ddr-ddr_sdram_cfg 2) 0x1;
+ int i;
+
+ for (i = 0; i CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
+ if (dimm_params[i].n_ranks)
+ break;
+ }
+ if (i = CONFIG_DIMM_SLOTS_PER_CTLR) {
+ puts(DDR error: no DIMM found!\n);
+ return;
+ }
- ddr-dq_map_0 = ((dimm_params-dq_mapping[0] 0x3F) 26) |
- ((dimm_params-dq_mapping[1] 0x3F) 20) |
- ((dimm_params-dq_mapping[2] 0x3F) 14) |
- ((dimm_params-dq_mapping[3] 0x3F) 8) |
- ((dimm_params-dq_mapping[4] 0x3F) 2);
+ ddr-dq_map_0 = ((dimm_params[i].dq_mapping[0] 0x3F) 26) |
+ ((dimm_params[i].dq_mapping[1] 0x3F) 20) |
+ ((dimm_params[i].dq_mapping[2] 0x3F) 14) |
+ ((dimm_params[i].dq_mapping[3] 0x3F) 8) |
+ ((dimm_params[i].dq_mapping[4] 0x3F) 2);
- ddr-dq_map_1 = ((dimm_params-dq_mapping[5] 0x3F) 26) |
- ((dimm_params-dq_mapping[6] 0x3F) 20) |
- ((dimm_params-dq_mapping[7] 0x3F) 14) |
- ((dimm_params-dq_mapping[10] 0x3F) 8) |
- ((dimm_params-dq_mapping[11] 0x3F) 2);
+ ddr-dq_map_1 = ((dimm_params[i].dq_mapping[5] 0x3F) 26) |
+ ((dimm_params[i].dq_mapping[6] 0x3F) 20) |
+ ((dimm_params[i].dq_mapping[7] 0x3F) 14) |
+ ((dimm_params[i].dq_mapping[10] 0x3F) 8) |
+ ((dimm_params[i].dq_mapping[11] 0x3F) 2);
- ddr-dq_map_2 = ((dimm_params-dq_mapping[12] 0x3F) 26) |
- ((dimm_params-dq_mapping[13] 0x3F) 20) |
- ((dimm_params-dq_mapping[14] 0x3F) 14) |
- ((dimm_params-dq_mapping[15] 0x3F) 8) |
- ((dimm_params-dq_mapping[16] 0x3F) 2);
+ ddr-dq_map_2 = ((dimm_params[i].dq_mapping[12] 0x3F) 26) |
+ ((dimm_params[i].dq_mapping[13] 0x3F) 20) |
+ ((dimm_params[i].dq_mapping[14] 0x3F) 14) |
+ ((dimm_params[i].dq_mapping[15] 0x3F) 8) |
+ ((dimm_params[i].dq_mapping[16] 0x3F) 2);
/* dq_map for ECC[4:7] is set to 0 if accumulated ECC is enabled */
- ddr-dq_map_3 =
