Przemek Klosowski wrote: > On Wed, May 29, 2013 at 7:22 AM, Charles Steinkuehler < > [email protected]> wrote: > > >> The PRU can do a great job with step/dir generation. Anything that >> has encoders should really be running with FPGA hardware and something >> like the Mesa boards. >> >> > > Why do you say so? PRU is running at 200MHz and can read and write GPIO > every 5ns. I think that's close to what the FPGA is capable of. Of course > FPGA can then process these in parallel using independent hardware units, > but still. > > 5 ns is only one instruction. Do you think it can read, say, the 3 signals from 4 encoders and keep count, all with only one instruction? Not possible. It would probably take 20 -30 instructions for each encoder channel, and possibly quite a bit more. Assuming one PRU was dedicated to encoders, that would mean sampling the encoders at about a 1 MHz rate. This is still fantastic (if my totally off-the cuff guess at how many instructions it takes is anywhere near correct) and an incredible improvement on reading encoders via the LinuxCNC encoder HAL component. I would not be astonished to find out that it actually takes 200 instruction per encoder, reducing the rate to a 4 us sampling period. Still, not bad at all, and will handle many hobby-level machines.
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