> But any OS needs to disable interrupts to access shared memmory or maybe > for some IO drivers.
I use to get by without disabling interrupts. Then exchanging data most usually the methodI use is to write data in shared memory and use a variable written to zero or one to indicate new data is avaiable as this only change one bit without reading I expect it to be an atomic operation. > But if writing motion control on a uP you would not use software to make > pulses Correct. Usually there is a builtin in PWM timer with shadow registers updated at top and/or bottom of timer at the same time as interrupt is triggered. With prioritized interrupt as is available in the Cortex-M-* CPU this should if I did not miss anything fulfill the requirements for Rate-monotonic scheduling so that it is possible to calculate if all dead lines will be met. Regards Nicklas Karlsson _______________________________________________ Emc-users mailing list Emcemail@example.com https://lists.sourceforge.net/lists/listinfo/emc-users