> and if we can cram a good 3D design into it,

There's that "3D" again.

But see a possible solution below.

-------------

> that saves us on die area
> and therefore cost on the ASIC.

If you use the larger FPGA for OGD1, and then find a way to shrink
the design, is there a way to make a smaller ASIC?

-------------

> We want two independent video heads.

IIRC, 2 dual-link DVI plus s-video.  Would 1 dual-link DVI plus
1 single-link DVI plus s-video be enough?  Would it save significant
space?  Single-link is supposed to be good for up to 1920x1200.  How
many people will need to drive two displays both larger than 1920x1200?

-------------

> An option we have is to produce an ECP2-50 board now and then switch
> to the ECP2-70 in 2007.

If you think that the ECP2-50 is too small, why make a ECP2-50 board?

-------------

I assume you have already "outsourced" any pieces available in an
existing sufficiently documented IC.

-------------

There is that FPGA that plugs into an AMD64 socket.  Expensive, and
requires a mainboard with at least two CPU sockets, therefore not practical
for a mass-production low-cost video solution, but perhaps useful for 
development?

Perhaps this could be a way to split out some optional 3D stuff, as a couple
of us have suggested.  Build a basic ECP2-50 board, and put the fancy 3D stuff
in the AMD64 socket.  The AMD64 socket has direct access to the hypertransport
bus, thus very very high bandwidth available.  This could turn out to be a
better solution for high-end 3D than the SLI type kludge.
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