On Fri, 30 Nov 2007, Timothy Normand Miller wrote:
On 11/30/07, Vesa Solonen <[EMAIL PROTECTED]> wrote:
Umm I see, are you certain that there is no ground-loop problem in your
test setup? That analog jitter of few Hz may be some beat with mains
frequency and vsync. Or ground loop on the pcb...
This could be a factor. What I do know, however, is that switching to
alternate clock generators clears up the problem significantly.
That's when feeding the whole fpga from some dedicated generator and
without using DCM PLL clock multiplier? Have you actually measured Vcc and
Vccaux ripple voltages? According to AN I linked to, Vccaux is critical
for DCM. Routing and groundplane for 125 MHz is very critical it might
also help to isolate Vcc for the oscillator with a small choke. That way
one avoids global coupling from supply to local ground via bypass cap.
Otherwise the whole pcb is a ground-loop mess... Also disconnect your
monitors ground lead or better feed it via isolation transformer to make
sure you aren't observing currents between different grounds...
-Vesa
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