Terry,

In answer to part of your query, there is no provision for mid pads. The
IPC-D-356 testpoint generation only allows for selection of top or bottom
layer pads and if you think about this it makes sense for a finished board
testpoint generation program. What you appear to be looking for would be a
testpoint output that would allow testing of layer pairs in a multilayer PCB
before they are stack laminated. Seems you are out of luck, Protel doesn't
seem to support that function.

Brad Velander,
Lead PCB Designer,
Norsat International Inc.,
#300 - 4401 Still Creek Dr.,
Burnaby, B.C., V5C 6G9.
Tel. (604) 292-9089 direct
Fax (604) 292-9010
website www.norsat.com


> -----Original Message-----
> From: Terry Harris [mailto:[EMAIL PROTECTED]]
> Sent: Friday, May 04, 2001 9:26 AM
> To: Protel EDA Forum
> Subject: Re: [PEDA] Export an IPC-D-356 format Netlist for PWB
> MFGcircuitt esting
> 
> 
> 
> 
> So has anyone else been playing with Protel D-356 ?
> 
> Seems prone to generating exceptions when setting up the 
> export and the
> files appear not to identify mid pads. 
> 
> No feedback from my board house yet.
> 
> 
> Cheers, Terry.


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