Shuping,
        you say that it has passed ERC. However you don't state any other
comment about warnings, etc.. This makes me a little suspicious that it may
have passed a limited or modified ERC check. Did you have all (note: Abd
ul-Rahman stated "full") ERC checks enabled? Has the Rule Matrix
error/warning/noreport states been modified from it's default/original
state? There are many small ERC errors ("annoyances") that could have been
disabled at some time and now they are hiding subtle ERC errors which could
contribute to your problems.

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com

Visit us at Booth 2G2-09 at CommunicAsia 2002 in Singapore June 18-21.


> -----Original Message-----
> From: Shuping Lew [mailto:[EMAIL PROTECTED]]
> Sent: Wednesday, April 17, 2002 10:14 AM
> To: 'Protel EDA Forum'
> Subject: Re: [PEDA] FW: Access violation -- Is it a Protel bug?
> 
> 
> Dear ABD,
> 
> 
> 
> First of all, yes, I would strongly suspect a bug, though a damaged
> executable is a possible but unlikely culprit. Mr. Wilson is 
> correct, it
> should not be possible to cause an access violation with bad (or good)
> netlist data.
> 

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