Thanks Vince,
We do all of your mentioned tricks, it still takes hours. As a matter of fact anytime I layout a design I turn off DRCs when I a place parts, I turn on only clearance constraints and hide gnd and plane nets after I start to manually route critical lines. This allows my computer to work with me and not work the DRCs. Also I do not set up any rules until I need them. It really speeds things up, But large designs copper pours with a jillion pixels takes hours Mike ----- Original Message ----- From: vincent mail <[EMAIL PROTECTED]> To: Protel EDA Forum <[EMAIL PROTECTED]> Sent: Wednesday, July 31, 2002 2:23 PM Subject: Re: [PEDA] Copper pours on outer layers > before pouring , switch off the online DRC , 'Pour over same net' and > 'remove dead copper' > > since you have only that on thse layers no need to have the pouring > algorithm look for this stuff. > that should speed it up somewhat > > Michael Reagan (EDSI) wrote: > > >Question to smartest of smartest designers out there: > > > >Here is the delima, we have a board appox 24 x 30 ( a very large > >backplane) , many thousands of connections, every layer controlled > >impedance. The boards are used for high speed tele comminications > >switching and data monitoring. ( No the the tele com industry is not dead). > >The designs are as many as 28 layers, some approching .250 inch in > >thickness, a very expensive baord to design and manufacture. > > > >On the outer layers we avoid placing traces, since we embed the entire > >design, The outer layer are copper pours tied to gnd to reduce EMI and to > >maintain controlled Z on the next inner layer. The copper is poured on both > >the top and bottom layers. > > > >Copper pours of this size are poured last because they are time consuming. > >The pours can take 4 hours, and even longer if they are not right the first > >time. Question to any of the best out there.....can we avoid a copper pour > >and merge a gnd layer to the top? Does anyone have a method or suggestion > >to merge copper to flood the top layer. Is there a quicker method? We > >are using 99SE on aa 1 gig cpu with 512 meg. > > > >Mike Reagan > >EDSI > > > > > >************************************************************************ > >* Tracking #: C05FC4455FDD074E8E0D19C321C392CAC217810D > >* > >************************************************************************ > > > > -- > -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- > _____________ > /____________/ Vincent Himpe > // _____ ___/ Lab Manager > / \ \ / / / ST Microelectronics > /___\ \ / / / 5510 Six Forks Road . Suite 200 > /______//_/__/ Raleigh NC 27612 > > Tel : (919) 850 6070 > Fax : (919) 850 6689 > e-mail : [EMAIL PROTECTED] > > -=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- > > > > > > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[email protected] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
