Anand Kulkarni wrote: > Hi all, > I am currently designing a printed circuit board in which the main part is a XILINX >FPGA. > > What I want to know is: (please read on) > > Upon completion of the schematics of the board design > do PCB designers do anything to verify the correctness of the board > schematics ....like simulation ? > > Especially where something complex like a XILINX FPGA is involved. > > -------------------OR-------------------- > > do PCB designers simply trust the correctness of the schematic and proceed with PCB >placement and routing ? > > In short ,is any board-level simulation (involving SPICE models or something >similar) done before fabrication of the board ?
Generally, I think the answer is no. There may be some need to simulate critical traces, such as high-speed clocks, to evaluate need for termination, and similar things. A complete analog simulation of a complex digital circuit including the FPGA is beyond the capacity of todays computers, unless you have a HUGE budget, and a few months of real supercomputer time available. PCB designers generally are not involved in the verification of the circuitry, especially what is programmed into an FPGA. My personal approach to this is to possibly simulate a generalized case of a single signal, like one bit of a data bus, or possibly 2 bits to check cross-talk. Once you know the signal quality of a representative signal, and have varied some of the parameters to see over what range of trace lengths, for instance, proper operation is obtained, you can then apply this as a 'rule' against all the signals of the same character. Some of the people designing Pentium motherboards are supposed to be using lots of simulation, but I have no idea what tools they are using. I think it is pretty clear they are NOT using Protel99 for this. Jon ************************************************************************ * Tracking #: 5BBAE86F2A670642A7A4D94DB8F0729E3A643CF8 * ************************************************************************ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[email protected] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
