I know, I know, I know, how to do it Create a class of nets to include all your nets, Delete the default board/ board clearance rule, add a clearance rule ( your net classname ) to ( your net class name)
It works but I wouldnt use it, I was tinkering with this several months ago while doing BGAs and had intentional shorts all on the same board. I forgot why it was dangerous, but I dont use it Try it Mike Reagan > -----Original Message----- > From: Brad Velander [mailto:[EMAIL PROTECTED]] > Sent: Thursday, August 29, 2002 11:48 AM > To: 'Protel EDA Forum' > Subject: Re: [PEDA] PCB Rules question > > > Michael, > I have some very similar needs but have never found a way to > accomplish this task. I have had the same results as you have described. I > look forward to reading any results that have come to a different > conclusion. > In my case I have tried the exact same thing with layer specific > keepouts. In a similar vein I have also searched for a manner of > setting via > holes such that they have a minimum laminate material left between them > after drilling, seems anything to test vias in the rules only > tests the via > metal pad and to a 0mil space or touching. Anything closer then touching > pads cannot be defined. > > Sincerely, > Brad Velander. > > Lead PCB Designer > Norsat International Inc. > Microwave Products > Tel (604) 292-9089 (direct line) > Fax (604) 292-9010 > email: [EMAIL PROTECTED] > http://www.norsat.com > Norsat's Microwave Products Division has now achieved ISO 9001:2000 > certification > > > > > -----Original Message----- > > From: Schmitt Michael [mailto:[EMAIL PROTECTED]] > > Sent: Thursday, August 29, 2002 6:23 AM > > To: Protel EDA Forum (E-Mail) > > Subject: [PEDA] PCB Rules question > > > > > > Now to something completly different ... > > > > I use Protel 99SE SP6 and i want to create / modify my design > > rules so that > > there will be no drc errors if a pad and / or a track is > > touching the keep > > out. > > > > Imagine a pad placed inside the pcb-outline and keepout's but > > the outter > > diameter of that pad is not inside the keepout as the outer > > diameter is > > bigger than the relative distance of the pad to the keepout. > > > > the reason is that a have to place pads at the edge of the > > pcb that there is > > no gap between the pad / track an the keepout (the outline of > > the pcb) so > > the copper will be directly at the end of a pcb side ... yes > > i know that > > there should be normaly a gap of about 20-25mil but in this > > case i realy > > need the pads and tracks be placed at the edged .. > > > > i have tried to setup some design rules like > > > > Clearance Rule > > A: Object Kind (Via; TH-Pad; Tracks/Arcs) > > B: Object Kind (KeepOuts) > > Any Net > > Minimum Clearance 0mil > > > > but all i enter in these dialog box still produces DRC erros > > as if it is in > > general not allowed to place anything directly with no gap to > > a keepout. > > > > well of course i could ignore these messages, but i prefer a final pcb > > without any drc error messages. > > > > any ideas ? > > > > Dipl.-Ing. (FH) Michael Schmitt > > Baumer Ident GmbH > > Entwicklung / Development Department > > Hertzstr. 10 > > D-69469 Weinheim > > Deutschland / Germany > > Tel. +49 (0) 6201 9957 - 30 > > Fax. +49 (0) 6201 9957 - 99 > > E-Mail : [EMAIL PROTECTED] > > Web: <http://www.baumerident.com/> > > > > > > ************************************************************************ > * Tracking #: 8D52133DB5934C46ACCBEAAD91ABEDE4C9290AAC > * > ************************************************************************ > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[email protected] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
