Brendon,
  it is on Brad defined netnames! Does that mean something to you? I have
looked over the nets in question very thoroughly and cannot find anything
unique to them. I use similar netnames right across the schematic but only
these 14 are causing problems.
  P.S. these netnames don't cause any problem using the netlist load method
but I had several other problems show up using that method. Problems that
were completely different than those using the PCB Update Synchronizer.

Sincerely,
Brad Velander

-----Original Message-----
From: [EMAIL PROTECTED]
To: Protel EDA Forum
Sent: 02/10/2002 7:29 PM
Subject: Re: [PEDA] P99SE SP6 Problem with Update PCB generating duplicate
nets or ot her errors.


Brad, is this problem being exhibited on Protel generated net-names or
"Brad" defined net-names?

Regards,
Brendon



Sent: Thursday, 3 October 2002 10:51 AM
To: Protel EDA Forum List Server (E-mail)
Subject: [PEDA] P99SE SP6 Problem with Update PCB generating duplicate
nets or ot her errors.


Hi all,
             I have a layout that is a little different than our norm in
terms of
size and complexity. This seems to be causing some problems that I don't
normally see.

I have four schematic pages in a flat hierarchy. I have used nets and
ports
global, I actually don't have any ports used at all just the netnames.
             When I run the Update PCB I get errors reported for adding
nets that
already exist. If I run the update anyway I get multiple occurrences of
these nets showing up in the PCB netlist manager. The nets involved are
all
nets where I have used a netname on one sheet to tie a signal to the
intended connection on the other sheet. So yes there are duplicate
netnames
(the same netname) within the schematics but they are needed to provide
connectivity.
             What is wrong? How can I fix this?
             The first time that I ran the update, I deleted the
offending
net
duplications from the preview macros window. On that occasion I also got
an
access violation near the end of the update process. Looking in the PCB
file
I discover that the initial components have been placed by the update
function in the upper right corner as usual. However the components
appear
to run right off the page past the 100 inch limit of the database. I am
not
sure if anything might have been dropped because it ran past the 100
inches.
So I move the parts down close to my PCB outline and run update again. I
get
the same duplicated net error but I do see some net connections being
made
that obviously weren' t made during the first pass. Possibly because of
the
access violation near the end of the first update?  This is not a very
large
design compared to some you guys work on, is this common behaviour
placing
parts out past or at least to the 100 inch limit? Is there a chance that
something is screwed because of this part loading out to or near the 100
inch limit?

             I also just tried running update again for a third time. It
is
still
adding 2 more net connections to device pads! Why weren't these added in
either of the two previous updates?

             I am just so leery that something is drastically wrong at
the
moment
and that I can't trust the database. I hope someone has had similar
experiences and has an answer or advice.

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com
Norsat's Microwave Products Division has now achieved ISO 9001:2000
certification






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