He all I just wanted to conclude the last issues I mentioned on the global connectivity problems I was having with a legacy design which was 98>99SE>2004.
The warnings issues were a combination of a few things. There was some net labels and ports lurking under some connections which were connected to power ports, must have been me who moved them there when removing my power port connectivity routes off the top/child sheets. I know others worked on the project, but I did a lot of work on this one so I'll need to carry the can for it. Some ports were set to No Style and 0 width so looked like just net labels. But the others I have had to concede defeat on. I deleted the last 2 offending sheets which indicated error from the project and replaced them with ones from the previous revision which had no PCB (only value) changes. This fixed the problem. I exported both sheets as ascii and ran a compare on them, some differences were noted around the 208QFP and on the SDRAM parts, invalid characters that did not belong. I suspect that this design may have been subject to the P98 bug which could cause SCH to be corrupt when using update from cache feature, it's a posibility that this came back to bite me in the ass. I can now run the PCB update and no changes are made to the PCB and no errors introduced, so the SCH seems safe now. Thanks all who helped. John * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/[EMAIL PROTECTED] * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
