---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Tue, Jan 16, 2018 at 9:06 PM, Richard Wilbur
wrote:
>> The goal is to avoid unnecessarily impeding this return current path.
>> I'm trying to avoid making the path >~200mil and putting any major
>> obstruction (like
On Sep 20, 2017, at 13:27, Richard Wilbur wrote:
> On Wed, Sep 20, 2017 at 1:57 AM, Luke Kenneth Casson Leighton
> wrote:
>> On Tue, Sep 19, 2017 at 11:26 PM, Richard Wilbur
>> wrote:
>>> I'm interested in
>>> tracking down the power supply pins for the differential HDMI signals
>>> as that is w
=On Sat, Jan 6, 2018 at 2:28 PM, Richard Wilbur
wrote:
> On Jan 5, 2018, at 23:49, Luke Kenneth Casson Leighton wrote:
>>
>> On Sat, Jan 6, 2018 at 6:35 AM, Richard Wilbur
>> wrote:
>>> So the trick is how to choose a faster chip and integrate successfully into
>>> a system running at lower sp
On Jan 5, 2018, at 23:49, Luke Kenneth Casson Leighton wrote:
>
> On Sat, Jan 6, 2018 at 6:35 AM, Richard Wilbur
> wrote:
>> So the trick is how to choose a faster chip and integrate successfully into
>> a system running at lower speed than it is specified for?
>
> yyup. have to use the 1800
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Sat, Jan 6, 2018 at 7:12 AM, Richard Wilbur wrote:
>> yyup. have to use the 1800mhz 1.5v x8 DDR3 IC, which fortunately
>> happens to be down-compatible with 667mhz. the 1.35v DDR3L variant of
>> the same chip is *n
On Jan 5, 2018, at 23:49, Luke Kenneth Casson Leighton wrote:
>
> On Sat, Jan 6, 2018 at 6:35 AM, Richard Wilbur
> wrote:
>> So the trick is how to choose a faster chip and integrate successfully into
>> a system running at lower speed than it is specified for?
>
> yyup. have to use the 1800
On Sat, Jan 6, 2018 at 6:35 AM, Richard Wilbur wrote:
>> now the only concern is, blasted frickin apple, has sucked world-wide
>> demand not just for the entire supply of 0.1 10 and 100uF capacitors
>> but f*g DDR3 and eMMC *as well*.
>>
>> i now have to be extremely careful on selecting the
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Sat, Jan 6, 2018 at 6:45 AM, Richard Wilbur wrote:
> On Jan 5, 2018, at 22:37, Luke Kenneth Casson Leighton wrote:
>> ok gerbers sent. waiting for confirmation from mike.
>
> Cheers!
>
>> with DDR3
>> prices being i
On Jan 5, 2018, at 22:37, Luke Kenneth Casson Leighton wrote:
> ok gerbers sent. waiting for confirmation from mike.
Cheers!
> with DDR3
> prices being insane i'm not going to push hard for the PCB to be made,
> nor the assembly done in a hurry.
Not having a rush on PCB fabrication or assembly
On Jan 5, 2018, at 23:27, Luke Kenneth Casson Leighton wrote:
> On Sat, Jan 6, 2018 at 6:24 AM, Richard Wilbur
> wrote:
>> I am happy with the HDMI but I was going to ask about silkscreen on pads--I
>> saw several instances of silkscreen on areas you'll want covered in solder.
>> Sorry I didn
On Jan 5, 2018, at 21:50, Luke Kenneth Casson Leighton wrote:
>> On Fri, Jan 5, 2018 at 4:02 PM, Richard Wilbur
>> wrote:
>> On Fri, Jan 5, 2018 at 4:05 AM, Luke Kenneth Casson Leighton
>> wrote:
>>> On Fri, Jan 5, 2018 at 8:27 AM, Richard Wilbur
>>> wrote:
On Fri, Jan 5, 2018 at 1:00 AM
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Sat, Jan 6, 2018 at 6:24 AM, Richard Wilbur wrote:
> I am happy with the HDMI but I was going to ask about silkscreen on pads--I
> saw several instances of silkscreen on areas you'll want covered in solder.
> Sor
On Jan 5, 2018, at 21:28, Luke Kenneth Casson Leighton wrote:
>
> still doing these tiny little changes, it's just the way it goes:
> every time you look at the board in close zoom, it's like... "hmmm,
> yeah that could be improved" and this latest one, it's the (now pair
> of) capacitors for the
ok gerbers sent. waiting for confirmation from mike. with DDR3
prices being insane i'm not going to push hard for the PCB to be made,
nor the assembly done in a hurry.
l.
___
arm-netbook mailing list arm-netbook@lists.phcomp.co.uk
http://lists.phcomp.
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Fri, Jan 5, 2018 at 4:02 PM, Richard Wilbur wrote:
> On Fri, Jan 5, 2018 at 4:05 AM, Luke Kenneth Casson Leighton
> wrote:
>> On Fri, Jan 5, 2018 at 8:27 AM, Richard Wilbur
>> wrote:
>>> On Fri, Jan 5, 2018 at 1:00
On Fri, Jan 5, 2018 at 4:05 AM, Luke Kenneth Casson Leighton
wrote:
> On Fri, Jan 5, 2018 at 8:27 AM, Richard Wilbur
> wrote:
>> On Fri, Jan 5, 2018 at 1:00 AM, Luke Kenneth Casson Leighton
>> wrote:
>>> rectangular all-layers keepout, showing 1 and 3 here... damn layers 2
>>> and 5 have a wei
still doing these tiny little changes, it's just the way it goes:
every time you look at the board in close zoom, it's like... "hmmm,
yeah that could be improved" and this latest one, it's the (now pair
of) capacitors for the main DDR3 power stabilisation.
previously this was a single 0805 capacit
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Fri, Jan 5, 2018 at 8:27 AM, Richard Wilbur wrote:
> On Fri, Jan 5, 2018 at 1:00 AM, Luke Kenneth Casson Leighton
> wrote:
>> On Fri, Jan 5, 2018 at 7:44 AM, Luke Kenneth Casson Leighton
>> wrote:
>>
>>> there's a
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Fri, Jan 5, 2018 at 8:25 AM, Richard Wilbur wrote:
> On Fri, Jan 5, 2018 at 12:44 AM, Luke Kenneth Casson Leighton
> wrote:
>> On Fri, Jan 5, 2018 at 7:32 AM, Richard Wilbur
>> wrote:
>>> Any
>>> chance we could us
On Fri, Jan 5, 2018 at 1:00 AM, Luke Kenneth Casson Leighton
wrote:
> On Fri, Jan 5, 2018 at 7:44 AM, Luke Kenneth Casson Leighton
> wrote:
>
>> there's a few more like that back at the source diff-pair vias, i'll
>> think about whether to drop a plain square keepout in place (to
>> preserve 15m
On Fri, Jan 5, 2018 at 12:44 AM, Luke Kenneth Casson Leighton
wrote:
> On Fri, Jan 5, 2018 at 7:32 AM, Richard Wilbur
> wrote:
>> Any
>> chance we could use another trace to even up the little dimples that
>> are left in the edge facing the differential pairs?
>
> always best to screenshot / ar
On Fri, Jan 5, 2018 at 7:44 AM, Luke Kenneth Casson Leighton
wrote:
> there's a few more like that back at the source diff-pair vias, i'll
> think about whether to drop a plain square keepout in place (to
> preserve 15mil) or a straight manual track. track would cut clearance
> to around 12mil.
On Fri, Jan 5, 2018 at 7:32 AM, Richard Wilbur wrote:
> Looks like you already addressed this in the latest gerbers!
yehyeh.
> Any
> chance we could use another trace to even up the little dimples that
> are left in the edge facing the differential pairs?
always best to screenshot / arrow-ma
On Wed, Jan 3, 2018 at 10:20 PM, Richard Wilbur
wrote:
> I notice that north of the long east-west transmission line, at the
> northern keepout boundary on layer 6, there are a couple of vias that
> have almost complete ground shield between the vias and the HDMI TX2
> pair.
>
> Question: What is
On Wed, Jan 3, 2018 at 9:53 PM, Luke Kenneth Casson Leighton
wrote:
> On Thu, Jan 4, 2018 at 12:22 AM, Richard Wilbur
> wrote:
>
>> My initial feedback is it looks pretty nice. I sat down, read the
>> documentation
>> for the gerber viewer that comes with KiCAD and started getting my feet wet.
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Thu, Jan 4, 2018 at 12:22 AM, Richard Wilbur
wrote:
> My initial feedback is it looks pretty nice. I sat down, read the
> documentation
> for the gerber viewer that comes with KiCAD and started getting my feet wet.
On Jan 3, 2018, at 05:03, Luke Kenneth Casson Leighton wrote:
>
> ok i'm done with the 0805 10uF capacitors, and mostly-done messing
> about looking at the gerber files for areas where ground tracks are
> missing. currently i've added a keepout area around the DDR3 lines
> because that's what i'
ok i'm done with the 0805 10uF capacitors, and mostly-done messing
about looking at the gerber files for areas where ground tracks are
missing. currently i've added a keepout area around the DDR3 lines
because that's what i've seen done in other designs.
gotta get moving on this, richard - it'll
ok so i've passed richard the gerber files for a review, and i've done
the replacement of all 10uF 0805 capacitors with twin 4.7uF 0603.
full details outlined in a new update, which will likely be out next
year.
i'm now in to "examining gerbers closely" mode which usually takes me
2-3 days, i go o
ok so this, richard, is the point i was talking about, yellow arrow.
the purple area was formerly too far to the left, leaving a very weird
shape that i wasn't happy with.
all good. ok i'll move on to checking the ground planes and power
planes. PADS has this annoying habit of, when you join up
On Wed, Dec 27, 2017 at 8:51 PM, Richard Wilbur
wrote:
>> when i show X-ray-mode gerbers layers 1 & 2 i mark in yellow at top a
>> proposed modification, look good? you can see to pin 4 there is that
>> GND via, the shape of the hole gets really weird / sharp edges there.
>
> I'm not seeing the w
On Dec 25, 2017, at 05:52, Luke Kenneth Casson Leighton wrote:
>
> On Sun, Dec 24, 2017 at 10:29 PM, Richard Wilbur
> wrote:
>> Concerning the keepouts under the connector:
>> 1. At the north boundary I would pull the edge up a little further north
>> away from the northwestern differential pa
oh - happy christmas everyone btw :)
https://youtu.be/tiV2AXbuyyk
should be available by the time this goes out, currently uploading.
i'm using actual gerber files (gerbv) to illustrate, as it is slightly
different and in some ways easier to visually interpret. i haven't
used that up until now a
Thanks again for the pictures and the video.
Concerning the keepouts under the connector:
1. At the north boundary I would pull the edge up a little further north away
from the northwestern differential pair.
2. At the west boundary I see your point regarding layers 4 and 5. Looks like
you h
https://youtu.be/OO3qSBaKokM
ok next one :)
i updated the links, http://hands.com/~lkcl/eoma/a20/275_hdmi/ 6 layer
screenshots this time
main thing is, i thiiink... there's a way for EMI to escape through
the holes in layer 5 (under ESD) on the east end, into the west end of
the layer 4 hole (un
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Sat, Dec 23, 2017 at 4:26 AM, Richard Wilbur
wrote:
> 15mil clearance to HDMI nets and vias won't hurt anybody's feelings!
:)
> […]
>
>>> 3. The layer 2,3,4 ground keepout West edge moved with the East edge
>>> of
On Sat, Dec 23, 2017 at 4:13 AM, Richard Wilbur
wrote:
> Those ground vias I'm not so worried about as they don't look so much
> different to the proximity of neighbouring connector pins.
ok. awesome.
___
arm-netbook mailing list arm-netbook@lists.
On Dec 22, 2017, at 20:38, Luke Kenneth Casson Leighton wrote:
> On Fri, Dec 22, 2017 at 10:32 PM, Richard Wilbur
> wrote:
>> Here's another view of the connector end with some slight revisions of
>> the ground fill and keepout boundaries between the ESD and connector
>> components.
>>
>> Summar
On Dec 22, 2017, at 20:22, Luke Kenneth Casson Leighton wrote:
> On Fri, Dec 22, 2017 at 9:37 PM, Richard Wilbur
> wrote:
>>
>> The reason for dropping the ground plane under the connector pins
>> (layer 1) from layer 2 to layer 5 is that the pins are so close to each
>> other.
>
> yyeahhh but
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Fri, Dec 22, 2017 at 10:32 PM, Richard Wilbur
wrote:
> Here's another view of the connector end with some slight revisions of
> the ground fill and keepout boundaries between the ESD and connector
> components.
>
> Su
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Fri, Dec 22, 2017 at 9:37 PM, Richard Wilbur
wrote:
> On Dec 22, 2017, at 07:51, Luke Kenneth Casson Leighton wrote:
>> On Fri, Dec 22, 2017 at 8:54 AM, Luke Kenneth Casson Leighton
>> wrote:
> […]
>>> this is a pai
On Dec 22, 2017, at 07:51, Luke Kenneth Casson Leighton wrote:
> On Fri, Dec 22, 2017 at 8:54 AM, Luke Kenneth Casson Leighton
> wrote:
[…]
>> this is a pain! i might see if i can set a clearance to GND on
>> individual tracks / connections as opposed to NETs.
>
> ok that worked. just uploadin
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Fri, Dec 22, 2017 at 8:54 AM, Luke Kenneth Casson Leighton
wrote:
> http://hands.com/~lkcl/eoma/a20/275_hdmi/
>
> ok so this is four pictures, i did flood-fill, i'm going to update
> them incrementally, for example la
http://hands.com/~lkcl/eoma/a20/275_hdmi/
ok so this is four pictures, i did flood-fill, i'm going to update
them incrementally, for example layer 1 in between the 2 points where
the flood-fill keepout is too narrow to let it in (the maximum
"curve" is something like 11 mil diameter) i've expanded
On Wed, Dec 20, 2017 at 7:58 PM, Richard Wilbur
wrote:
> As soon as I sent the last message with the pictures, I realized I
> hadn't drawn the ground keepout for layers 2,3,4 under the connector.
> So here's the updated picture.
ok cool the pictures i dig :) yes i was thinking similar separatio
okaay, so this is what i've done: expanded the layer 1 keepout
(manually) to as near to 15mil as i can get. then added 2 keepouts on
layers 2 and 5. the line on the right is the board edge, so it goes
*right* out: the connector shield is there, i figure it can catch EMI.
plus there's layers 3 and
On Dec 18, 2017, at 08:27, Luke Kenneth Casson Leighton wrote:
> On Mon, Dec 18, 2017 at 2:55 PM, Richard Wilbur
> wrote:
>>
>> After sleeping on it, I'd recommend making the new, deeper ground fill
>> slightly larger (~5mil? margin) than the ground keepout on the
>> original reference plane--as
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Mon, Dec 18, 2017 at 2:55 PM, Richard Wilbur
wrote:
> On Mon, Dec 18, 2017 at 3:02 AM, Luke Kenneth Casson Leighton
> wrote:
>> On Mon, Dec 18, 2017 at 7:02 AM, Richard Wilbur
>> wrote:
>>> On Sun, Dec 17, 2017 at 1
On Mon, Dec 18, 2017 at 3:02 AM, Luke Kenneth Casson Leighton
wrote:
> On Mon, Dec 18, 2017 at 7:02 AM, Richard Wilbur
> wrote:
>> On Sun, Dec 17, 2017 at 11:34 PM, Luke Kenneth Casson Leighton
>> wrote:
>>> On Mon, Dec 18, 2017 at 6:31 AM, Richard Wilbur
>>> wrote:
1. Ground keepout unde
On Mon, Dec 18, 2017 at 7:02 AM, Richard Wilbur
wrote:
> On Sun, Dec 17, 2017 at 11:34 PM, Luke Kenneth Casson Leighton
> wrote:
>> On Mon, Dec 18, 2017 at 6:31 AM, Richard Wilbur
>> wrote:
>>> 1. Ground keepout under whole ESD component(s) on adjacent reference
>>> ground plane (layer 2 for ES
On Sun, Dec 17, 2017 at 11:34 PM, Luke Kenneth Casson Leighton
wrote:
> On Mon, Dec 18, 2017 at 6:31 AM, Richard Wilbur
> wrote:
>> 1. Ground keepout under whole ESD component(s) on adjacent reference
>> ground plane (layer 2 for ESD on layer 1, layer 5 for ESD on layer 6),
>> ground fill on dee
On Mon, Dec 18, 2017 at 6:31 AM, Richard Wilbur
wrote:
> Sorry for the misunderstanding. I wasn't very clear about delineating
> the difference between two options for dealing with the ESD component
> pads.
i was wondering which one to deploy.
> 1. Ground keepout under whole ESD component(s)
On Sun, Dec 17, 2017 at 11:20 PM, Luke Kenneth Casson Leighton
wrote:
> On Mon, Dec 18, 2017 at 6:03 AM, Richard Wilbur
> wrote:
>
>> So it might be easier to just put a ground keepout on layer 2 under
>> the ESD component on layer 1 and a corresponding ground fill on layer
>> 3. Likewise a grou
On Mon, Dec 18, 2017 at 6:03 AM, Richard Wilbur
wrote:
> So it might be easier to just put a ground keepout on layer 2 under
> the ESD component on layer 1 and a corresponding ground fill on layer
> 3. Likewise a ground keepout on layer 5 under the ESD component(s) on
> layer 6 and a correspondi
On Sun, Dec 17, 2017 at 10:28 PM, Luke Kenneth Casson Leighton
wrote:
> aw poop! i went to all the trouble of writing a parser for PADS :)
That is pretty cool. Now you have a way to algorithmically generate
traces. I'm sorry we didn't need it, yet.
>> Are there signals beneath the ESD compon
On Mon, Dec 18, 2017 at 5:45 AM, Richard Wilbur
wrote:
> Sorry for my long response times the last several weeks. I added
> choir director to my collection of hats,
:)
> 6 rehearsals, and performed 3
> carols at the Christmas program on the 9th. I performed a piano trio
> arrangement of a car
Sorry for my long response times the last several weeks. I added
choir director to my collection of hats, 6 rehearsals, and performed 3
carols at the Christmas program on the 9th. I performed a piano trio
arrangement of a carol with my daughters on the 9th (Christmas
program) and 16th (cello reci
On Mon, Dec 18, 2017 at 5:16 AM, Richard Wilbur
wrote:
> On Sun, Dec 17, 2017 at 9:05 PM, Luke Kenneth Casson Leighton
> wrote:
>> so... ah key question here... is the taper needed or not? :)
>
> The taper is a nice idea for changing the context smoothly but it
> requires enough space that
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Mon, Dec 18, 2017 at 5:23 AM, Richard Wilbur
wrote:
> On Sun, Dec 17, 2017 at 9:05 PM, Luke Kenneth Casson Leighton
> wrote:
>> should i instead be just setting 15mil clearance all round?
>
> I would suggest trying
On Sun, Dec 17, 2017 at 9:05 PM, Luke Kenneth Casson Leighton
wrote:
> should i instead be just setting 15mil clearance all round?
I would suggest trying to maintain 15mil clearance when possible. But
it is not the end of the world if it can't be maintained--especially
over short distances.
__
On Sun, Dec 17, 2017 at 9:05 PM, Luke Kenneth Casson Leighton
wrote:
> so... ah key question here... is the taper needed or not? :)
The taper is a nice idea for changing the context smoothly but it
requires enough space that we can't return to our original context
before the cable connector
On Mon, Dec 18, 2017 at 3:55 AM, Richard Wilbur
wrote:
> On Sat, Dec 16, 2017 at 10:12 PM, Luke Kenneth Casson Leighton
> wrote:
>> ... eahhh that looks better, doesn't it?
>
>
> Strong work, Luke! That does indeed look nice.
:)
>> i think that's it (oh, except the step needs adjustin
On Sat, Dec 16, 2017 at 10:12 PM, Luke Kenneth Casson Leighton
wrote:
> ... eahhh that looks better, doesn't it?
Strong work, Luke! That does indeed look nice.
> the left outer track is shuffled forward by... errr sqrt(2) / 4 * 5mil
> the one in from that (HTX2P) doesn't need shuff
On Sun, Dec 10, 2017 at 4:19 AM, Luke Kenneth Casson Leighton
wrote:
> ok i looked at using the COM interface, and... it's incomplete,
> lacking the set of required functions to do things such as "add
> track".
>
> sooOoo... i think i'll take a different approach: i'll write a parser
> for the ASC
On Sat, Dec 9, 2017 at 9:37 PM, Luke Kenneth Casson Leighton
wrote:
> On Tue, Dec 5, 2017 at 12:30 AM, Richard Wilbur
> wrote:
>
>> Good grief that took awhile! I'm now completely sold on the
>> concept of Computer-Aided Design (I've used some awkward implementations
>>before but this was done w
On Sat, Dec 9, 2017 at 12:39 PM, Luke Kenneth Casson Leighton
wrote:
> ok so just to check, are you recommending a multi-staggered approach,
> according to that table:
> 0 0 0 0 0 0
> 1 -1 1 2 3 4
[...]
> 8 -1 1 2 3 4
>
> so that would be *eight* separate bring-ins?
Yes, 8
On Tue, Dec 5, 2017 at 5:41 AM, Luke Kenneth Casson Leighton
wrote:
> On Tue, Dec 5, 2017 at 12:30 AM, Richard Wilbur
> wrote:
>
>> 3. Reflections are more troublesome the further you get from the
>> signal source. Close to the source the reflection arrives at the
>> source during the signal r
... eahhh that looks better, doesn't it?
the left outer track is shuffled forward by... errr sqrt(2) / 4 * 5mil
the one in from that (HTX2P) doesn't need shuffling as it's right next
to the green pair...
the right outer one (HTXCN) by 3x that amount
the next one in (HTXCP) by 2x that a
ok sooOo... here's where i'm at so far:
* from the horizontal separation of the big straight i "virtually"
carried them along (or back in the case of TX0 and TXC) so that they
meet TX1 (green)
* i then pushed each track starting point out by a set fixed distance
such that each pair would be EXACT
okay! so i've just done a new update which outlines a rather (vague)
summary of the taper, there's another update to go out before that,
which is nearly there: in the meantime i'm making good progress with
the program that reads the ASCII PADS format, displays the tracks (so
i can see quickly what
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Tue, Dec 12, 2017 at 2:54 PM, mike.v...@gmail.com
wrote:
> We'll I'm not convinced on the reflections in inter pair matching. But
> indeed my "linear" might not be the best and results in unequal
> impedance transiti
2017-12-12 9:33 GMT+01:00 Luke Kenneth Casson Leighton :
> On Tue, Dec 12, 2017 at 8:10 AM, mike.v...@gmail.com
>
> so by doing this series of steps the inter-pair impedance changes
> from its (appx) 110 ohms by virtue of the distance being 15mil to
> each pair and also to the keep-out area, d
On Tue, Dec 12, 2017 at 8:10 AM, mike.v...@gmail.com
wrote:
> 2017-12-11 11:53 GMT+01:00 Luke Kenneth Casson Leighton :
>> On Mon, Dec 11, 2017 at 7:25 AM, mike.v...@gmail.com
>> wrote:
>>
>>> Just a small question. Why not deviate from the 45 degree angle? So
>>> you end up with converging lines
2017-12-11 11:53 GMT+01:00 Luke Kenneth Casson Leighton :
> On Mon, Dec 11, 2017 at 7:25 AM, mike.v...@gmail.com
> wrote:
>
>> Just a small question. Why not deviate from the 45 degree angle? So
>> you end up with converging lines, instead of the stepped approach?
>
> because the steps are a clos
On Mon, Dec 11, 2017 at 7:25 AM, mike.v...@gmail.com
wrote:
> Just a small question. Why not deviate from the 45 degree angle? So
> you end up with converging lines, instead of the stepped approach?
because the steps are a close approximation to the original 1956
paper which ensures that there
2017-12-05 13:41 GMT+01:00 Luke Kenneth Casson Leighton :
> On Tue, Dec 5, 2017 at 12:30 AM, Richard Wilbur
> wrote:
>
>> 3. Reflections are more troublesome the further you get from the
>> signal source. Close to the source the reflection arrives at the
>> source during the signal rise time an
ok i looked at using the COM interface, and... it's incomplete,
lacking the set of required functions to do things such as "add
track".
sooOoo... i think i'll take a different approach: i'll write a parser
for the ASCII-exported version of the PCB file, track down the
relevant sections and replace
On Tue, Dec 5, 2017 at 12:30 AM, Richard Wilbur
wrote:
> Good grief that took awhile! I'm now completely sold on the
> concept of Computer-Aided Design (I've used some awkward implementations
>before but this was done with pencil, pen, measuring tape, and book spine
> for straight edge).
... w
hiya richard,
ok so just to check, are you recommending a multi-staggered approach,
according to that table:
0 0 0 0 0 0
1 -1 1 2 3 4
2 -1 1 2 3 4
3 -1 1 2 3 4
4 -2 2 4 6 8
5 -2 2 4 6 8
6 -1 1 2 3 4
7 -1 1 2 3 4
8 -1 1 2 3 4
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Tue, Dec 5, 2017 at 9:15 PM, Richard Wilbur wrote:
> The reason for all the detail is to try and make the changes gradual enough
> to avoid causing big reflections from the taper itself but also make the
> geometry
On Dec 5, 2017, at 05:41, Luke Kenneth Casson Leighton wrote:
>
> On Tue, Dec 5, 2017 at 12:30 AM, Richard Wilbur
> wrote:
>>
>> Deviations from path in due NorthEast direction (+ signifies change in the
>> NorthWest direction, - signifies change in the SouthEast direction, units in
>> mil)
>>
On Tue, Dec 5, 2017 at 12:30 AM, Richard Wilbur
wrote:
> 3. Reflections are more troublesome the further you get from the
> signal source. Close to the source the reflection arrives at the
> source during the signal rise time and can be overcome by the line driver.
> Deviations from path in d
On Tue, Dec 5, 2017 at 12:22 PM, Luke Kenneth Casson Leighton
wrote:
> On Tue, Dec 5, 2017 at 4:28 AM, Richard Wilbur
> wrote:
>> photo:
>> Small 29.3KB
>> Medium 86.5KB
>> Large 790KB
>> Actual 1.8MB
>>
>> I believe I selected the smallest option last time. I'll try "Medium" this
>> time.
>
>
On Tue, Dec 5, 2017 at 4:28 AM, Richard Wilbur wrote:
> photo:
> Small 29.3KB
> Medium 86.5KB
> Large 790KB
> Actual 1.8MB
>
> I believe I selected the smallest option last time. I'll try "Medium" this
> time.
yehyeh too small - medium's great. make it just the one attachment,
JPG only. or,
photo:
Small 29.3KB
Medium 86.5KB
Large 790KB
Actual 1.8MB
I believe I selected the smallest option last time. I'll try "Medium" this
time.
___
arm-netbook mailing list arm-netbook@lists.phcomp.co.uk
http://lists.phcomp.co.uk/mailman/listinfo/arm-net
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Tue, Dec 5, 2017 at 12:30 AM, Richard Wilbur
wrote:
> The goal of the taper is to minimize the reflection coefficient involved with
> changes in impedance caused by changes in transmission line geometry.
> In essence
The goal of the taper is to minimize the reflection coefficient involved with
changes in impedance caused by changes in transmission line geometry. In
essence we are trying to make the changes so gentle that we don't scare any
electrons. The scared electrons reflect at the point of abrupt chan
On Sun, Nov 26, 2017 at 5:37 PM, Richard Wilbur
wrote:
> On Nov 25, 2017, at 23:14, Luke Kenneth Casson Leighton wrote:
>>
>> ok so this is after flood-fill, remember that GND wires (blue) which
>> are within tthe GND flood-fill (grey) *are* part of the GND plane,
>> PADS just continues to highli
On Nov 25, 2017, at 23:14, Luke Kenneth Casson Leighton wrote:
>
> ok so this is after flood-fill, remember that GND wires (blue) which
> are within tthe GND flood-fill (grey) *are* part of the GND plane,
> PADS just continues to highlight their existence (unnecessarily).
>
> so this gives a cle
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Sat, Nov 25, 2017 at 4:02 PM, Richard Wilbur
wrote:
> On Nov 25, 2017, at 08:21, Luke Kenneth Casson Leighton wrote:
>> grr, about 3 (at least) got deleted. squished them back in between
>> the diffpairs.
>>
>> so,
On Nov 25, 2017, at 08:21, Luke Kenneth Casson Leighton wrote:
> grr, about 3 (at least) got deleted. squished them back in between
> the diffpairs.
>
> so, now those act as helpers for the diff-pairs _and_ also for the
> main IPSOUT power bus. that's 3 very close by the pair of capacitors,
> a
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Sat, Nov 25, 2017 at 3:13 PM, Richard Wilbur
wrote:
> Very nicely refactored capacitors! The only thing I am missing is the ground
> bypass vias close to the TX2 signal vias. I can't see them on the picture
> you
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Sat, Nov 25, 2017 at 3:05 PM, Richard Wilbur
wrote:
> On Nov 24, 2017, at 23:15, Luke Kenneth Casson Leighton wrote:
> Sorry about the demand fluctuation creating such huge price fluctuations.
maaad. also the pri
Very nicely refactored capacitors! The only thing I am missing is the ground
bypass vias close to the TX2 signal vias. I can't see them on the picture you
included in the message, at least.
___
arm-netbook mailing list arm-netbook@lists.phcomp.co.uk
On Nov 24, 2017, at 23:15, Luke Kenneth Casson Leighton wrote:
Thank you for the picture.
> ok so this shows what's going on: already those GND vias have been
> moved significantly away from the pads associated with them (the ones
> for the 5V0) and those are MAJOR power (2A) so it's really rath
On Saturday, November 25, 2017 01:15:11 AM Luke Kenneth Casson Leighton wrote:
> bottom line: if i shuffle in two 0603 4.7uF caps as a replacement for
> the 0805 10uF, it reduces the cost on the BOM based on current
> pricing, improves power stability, and also means that those VIAs in
> the middle
http://rhombus-tech.net/allwinner_a10/news/eoma68-a20-275-layers126-illustration.jpg
ok so this shows what's going on: already those GND vias have been
moved significantly away from the pads associated with them (the ones
for the 5V0) and those are MAJOR power (2A) so it's really rather
important
On Wed, Nov 22, 2017 at 6:56 PM, Richard Wilbur
wrote:
> If they are grounding power capacitors, don't move them unless you
> can do so while maintaining (or better yet shrinking) the distance
> from capacitor pad to via. Low impedance power is precious!
ok :)
>> also i just noticed that TX1N
On Nov 22, 2017, at 10:08, Luke Kenneth Casson Leighton wrote:
> they're not really optional, they're GNDing VIAs for a couple of
> capacitors on the TOP layer, associated with the PMIC area. i'll take
> a look, see what they're for: it *might* be possible to move them
> direclly south or south e
---
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
On Wed, Nov 22, 2017 at 4:55 PM, Richard Wilbur
wrote:
> Working on the high-frequency taper, a couple things have been
> bothering me--the two ground vias circled in the attached picture.
> Are they either optional or
1 - 100 of 231 matches
Mail list logo
