[casper] Setting up ROACH NFS filesystem and server

Hi all I'm just setting up my ROACH over here in Oz, and have reached a bit of a hurdle with the NFS filesystem which I was hoping to get some help with. When I 'run netboot' on the ROACH (in minicom over serial), I get this: DHCP client bound to address 192.168.0.2

Re: [casper] Setting up ROACH NFS filesystem and server

Hi All - have just made an NFS boot guide page on the wiki: http://casper.berkeley.du/wiki/ROACH_NFS_guide Please edit/amend at your leisure! Cheers Dan

[casper] ROACH Spectrometer info

Hi All, Does anyone have any further documentation for the ROACH spectrometers in the SVN, or the tut 3 spectrometer? Cheers Danny

Re: [casper] roach reference designs

Hey all To help put the 'C' in CASPER, I've made up some documentation for Jason's Workshop 2009 spectrometer tutorial, complete with bad jokes. I'll upload the word document to the tutorial directory once I have an SVN account, but as I wanted to send it out for christmas, I've put up a PDF

[casper] ADC bit toggle levels

Hi all, was hoping to get some clarification on real-world ADC bit toggle values on the 8bit-1Gsample iADC. Looking at the Atmel/e2v AT84AD001B data sheet, we found the full scale differential input voltage was 500mVpp, impedance 50 ohm, so using R=50ohm, V=500mV/(2^8-1), P = V^2/R: Pdbm =

[casper] 2 input fft

G'day all Does anyone have experience with using a 2^1 simultaneous input FFT? The fft_wideband_real block has a minimum of 4 inputs; has anyone ever modified this or built a 2 input version? The reason I ask is that we would like to make a 0-200MHz spectrometer; the initial plan was

[casper] Arista switches

G'day all, does anyone have any experience or words of advice/warning on Arista 10GbE switches (http://www.aristanetworks.com/)?

Re: [casper] iADC scaling

Hi Josh, Are you looking at the time domain data (i.e. through a adc snap block), or at the frequency domain data (i.e. final output)? If you're looking at the frequency spectrum output, the PFB visibly scallops the data coming out of that roach spectrometer tutorial - so if you're

Re: [casper] Setting up CASPER toolflow from scratch -- Windows/Linux, and version numbers

Just a word of warning: if you're installing a different version of Python on RHEL/CentOS, DON'T type sudo yum uninstall python. Very bad idea. - Danny On 15/07/2010 19:07, Mandana Amiri wrote: Hi, I recently went through the toolflow setup with RHEL5/Matlab_2008b/Xilinx 11.5/mlib10_1

[casper] Optimum PFB / FFT settings to meet timing

Hi all, I'm trying to get the tute 3 spectrometer design running at 250MHz, and am running into timing issues. The timing report suggests problems in the PFB and FFT -- does anyone have some recommended settings for the PFB and FFT (i.e. latencies etc), before I start adding delays

Re: [casper] iADC clocking woes in 11.4 toolflow

Hey Glenn, Dave, I'm reading the bram with this python code: snap_data = fpga.read(snap_id+'_bram', 4*2048) list_len = len(snap_data)/4 unpack_fmt = ''+'l'*list_len data = struct.unpack(unpack_fmt, snap_data) And yes, I'm concatenating them together. I'm guessing there's a

Re: [casper] Black Box Memo

Hi all, I've finally got around to testing out black boxing (and am very excited), but have stumbled at the final hurdle. I've gotten through the .ngc, .vhd and .m file creation/editing, and have added a pcore to my design, but when I try and compile, I get this error message:

[casper] Sensor list command

Hi all, I've noticed a sensor-list KATCP command is listed on the wiki, but is unfortunately not yet available -- is this functionality still on the roadmap? Cheers Danny

[casper] Valon 5007 on ROACH ATX power

Dear All We are the proud new owners of some Valon 5007 synthesizer modules, which we plan to use to clock our ROACHes: http://www.valontechnology.com/products.html http://casper.berkeley.edu/wiki/Inexpensive_Synthesizer_Boards It has a 5V LDO voltage regulator, so they recommend an input

[casper] AAVP SKA-low and CASPER workshops

Hello everyone We are planning a mini CASPER workshop in Perth, Western Australia on 12-14 September. This is one week after the Path to SKA-low workshop (http://www.icrar.org/news/ska-low). The workshop is intended primarily as an introduction to CASPER, but we also hope to explore how

Re: [casper] new install (2011b/ISE 13.4) issues

Hi Ben Mathworks decided to change the fileparts() function in Matlab between 2011a and 2011b: http://www.mathworks.com/help/techdoc/ref/fileparts.html There's a few lines in the casper toolflow which unpack fileparts with four arguments, but 2011b only gives three. You'll need to either

Re: [casper] Error Xilinx --- Counter .

Hi Kath I made a pretty dodgy hack to get 13.4 working with matlab2011b: https://github.com/telegraphic/mlib_devel/blob/eba605eb642602bb9cb5f3e0638f8962e6999a32/xps_library/bee_xps.m Looking at it now, I completely commented out the switch statement (line 53-74), and added: xsg = xlVersion;

Re: [casper] Error Xilinx --- Counter .

Hi Katty Looking at bee_xps.m, it seems that all that try/catch and switch/case stuff does is changes the version of ISE displayed in the GUI. Try commenting it all out, and replacing it with just set(handles.xsg_version,'String','12.1'); similar to my earlier suggestion. If that works,

Re: [casper] debugging communication with one_GbE from roach-2 's fpga

Hi Ionna, Jeff In addition to John and Mark's suggestions, I'd recommend checking: 1) If you're using SELinux, disable it as it causes all sorts of grief. 2) Check the MTU on your ethernet port is set to be larger than your packet size. 3) Make sure that you don't have a firewall up on that

Re: [casper] To disable the PAR timing check:

Hi Isaac An alternative route might be to compile at 200 MHz, and then open the design with PlanAhead. In Planahead you can then bump it up to 250 MHz, and try to compile from there, with much more fine-grain control. As a bonus, you'll also be able to see where it's failing timing. I

Re: [casper] strange problem in the FFT

Hi John I have had similar problems in the past. At the time I switched back to our 'stable' 11.x library and used that to compile. We now think it's because our cmult_dsp48 broke during an overly adventurous git merge:

Re: [casper] Problem with fi and test suite

Hi Ross I think this should do exactly what you want: % Convert complex data stored in a 36_0 Unsigned format into % actual complex data in a matlab array % Useful for converting output of casper FFT into complex array. function cplx_vec = conv36u_cplx(vec_36u) %disp('Converting 36_0 data to

Re: [casper] Invalid simulink object name error

Hi Andrew, Richard Thanks, the debugging info will be incredibly useful. I get the error message even if I start with a new, blank design. I've also tried nuking my temp, ~/.Xilinx and .matlab folders, and same error message. For now, I have switched back to our stable repo, but would still

Re: [casper] Large (N 13) biplex FFT does not compile / blackbox

HI Andrew Wow, quite an obscure error! I can confirm that the block now compiles, thank you very much. Cheers Danny Andrew Martens January 31, 2014 at 5:45 PM Hi Danny I think I have managed to fix this bu would appreciate confirmation. It seems that large distributed

Re: [casper] adc5g synchronization

Hi Weiwei You'll need a few things: * a PPS (pulse per second) signal, which can be derived from something like a GPS receiver. * a PPS splitter box, so that you can split the PPS into four signals. You then need four coax cables of the same length to connect these to your ADC boards. For

Re: [casper] Digital Filter for parallel samples.

Hi Edgardo If you're after a decimating FIR filter, then you can use the mixer and dec_fir. Here's a screenshot showing a design that selects 200 MHz bandwidth out of 400 MHz; that is, 4 parallel real-valued -- 1 complex-valued stream: https://dl.dropboxusercontent.com/u/9870263/dec-fir.png

Re: [casper] Error when calling bee_xps in matlab

Hi Mugundhan I would very very very very highly recommend using either Matlab 2012b, 2013a or 2013b with Xilinx 14.7. No Xilinx ISE supports your versions of 2014a, so you're bound to get odd errors like this. Most people are using Linux, so if you're familiar you could follow:

Re: [casper] katcp python client.

Hi Ramesh Could this be a problem with routing tables? You can check with the route tool: http://manpages.ubuntu.com/manpages/precise/man8/route.8.html You should see eth1 as the only route for the 192.168.2.0 network Cheers Danny Ramesh Karuppusamy mailto:ram...@mpifr-bonn.mpg.de July 14,

Re: [casper] Tutorial 5: Million Channel Spectrometer

Hi Raul The tutorials are updated and changed a bit each year. You can get to that old tutorial here: https://casper.berkeley.edu/wiki/Old_Tutorials#High_resolution_spectrometer Bear in mind that you will likely have library version conflicts, so it might be a little harder to get up and

Re: [casper] Decrease in Spectrometer Perfomance / planAhead

Hi Raul As Dan mentioned, planahead shouldn't make a difference to things like dynamic range. If you're using an ADC that interleaves several cores (eg 5GSPS ADC), this could be something to do with poor ADC calibration. I'd suggest looking into that as a possible cause? Regards Danny Raul

Re: [casper] 1 M Channel turorial

Hi Edguardo If I recall right, the tutorial is a 2048 point real PFB + FFT (1024 channels), a 1024x1024 corner turn, and then a 1024 point complex FFT to give 1M channels. You are right that this isn't exactly the same as a 1M point FFT. The main difference you'll see is scalloping on the

[casper] Reading ROACH2 FPGA BRAMs on PowerPC

Hi all I'd like to read data from the FPGA on the ROACH2 powerpc, then pack it into UDP and send it out over Ethernet. Is there a straightforward and reasonably efficient way to read registers/bram from the FPGA on the ROACH2 powerpc? Better yet, has anyone implemented something already that

Re: [casper] Reading ROACH2 FPGA BRAMs on PowerPC

PM, Danny Price dpr...@cfa.harvard.edu mailto:dpr...@cfa.harvard.edu wrote: Hi all I'd like to read data from the FPGA on the ROACH2 powerpc, then pack it into UDP and send it out over Ethernet. Is there a straightforward and reasonably efficient way to read registers/bram

Re: [casper] specification of computer with NIC and GPU card to do X Engine

Hi Shu Lean The short answer is: it depends, but you should probably buy a good Xeon CPU if you are not sure. How many antennas and what bandwidth will you have? The LEDA correlator (that I work with) uses xGPU for the X-engine, and PSRDADA for packet capture / shared memory buffers. Here's

Re: [casper] System Compatibility

Hi Vishwa As far as I’m aware, Vivado does not support Virtex 5 or 6, so can’t be used for ROACH1 or ROACH2 designs. The Xilinx + Matlab stack is hard enough to get working on officially sanctioned distribution, so using RHEL7 will probably just give you stability issues and installation

[casper] Reading many ADC samples from PowerPC/KATCP

Hi all Does anyone have an example ROACH2 design + readout script to buffer up a large amount of ADC samples (around 200,000 would be ideal) in BRAM/QDR, then read them out slowly via KATCP? If so, may I please get a copy? Thanks Danny

[casper] ADC16x250 SERDES calibration issues

Hi all We are seeing some errors where our ADC16x250 cards don’t seem to be completing SERDES calibration successfully when programmed (using the adc16_init.rb script).  Running the adc16_status.rb script we see errors like this: rofl1: Design built for ROACH2 rev2 with 8 ADCs (ZDOK rev2)

Re: [casper] Spectrum issues

Hi Michael I always blame the sync gen first! I’d suggest just sending out a single pulse to reset the logic, not a heartbeat, at least to begin with, to rule this out. Jack’s suggestion that it might be the addressing of the shared BRAM is definitely a possibility too. It’s very easy for

[casper] JAI special issue on DSP in radio astronomy

Dear all, Please find below a call for papers for an upcoming special issue in JAI, which may be of interest. The topic is “Digital Signal Processing (DSP)  in Radio Astronomy”, so will be relevant to most CASPERites. The submission deadline is June 15. It would be great to see CASPER 

[casper] JAI special issue on DSP: second announcement

Dear all A quick reminder that there is an upcoming JAI special issue on DSP in radio astronomy, and that the submission deadline is 15 June 2015. We encourage all CASPER-related submissions. More details can be found at http://www.worldscientific.com/page/jai/callforpapers  The details are

Re: [casper] [Tut 4] Understanding "Power" Output From the Roach

I can calculate <Ea*Eb>? Thank you > all in advance for any help you are willing to provide! > > Sincerely, > Alec > > > -- > You received this message because you are subscribed to the Google Groups " > casper@lists.berkeley.edu" group. > To unsubscribe from th

Re: [casper] ROACH2 sync_out

sper+unsubscr...@lists.berkeley.edu. > To post to this group, send email to casper@lists.berkeley.edu. > -- Danny Price | dan...@berkeley.edu | +1 617-386-3700 -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu" group. T

Re: [casper] Raspberry pi 3 b+ support for SNAP board

Hi Nivek, I had the same issue, I think the image is not compatible with RPi3. I worked around this, and got tcpborphserver running on the stock RPi3 image, try this: https://drive.google.com/open?id=19ZSioiAVmYqa1w6SHvdIwo47Wi4wGefI Let me know if this works for you too; in which case might be

Re: [casper] Raspberry pi 3 b+ support for SNAP board

with etcher and booted, install casperfpga and the SNAP board programmed successfully. It would be nice to get an official image. > > Also, out of curiosity. What is tcpborphserver? > > thanks, > > Nivek > > > On 29/08/2018 12:35, Danny Price wrote: > > Hi Nivek

Re: [casper] packets lost of a packetized correlator

Hi Homin, Could this be due to a rouge ARP process? We have seen failure modes where the ARP configuration fills itself with FF:FF:FF:FF and starts broadcasting UDP traffic. We hard-code the ARP table to stop this. I also recall reading something similar to do with anti-flood contorl on some

Re: [casper] packets lost of a packetized correlator

Hey Homin, I think that looks fine -- it's only an issue if they get changed by a rouge process afterwards. - Danny On 14 March 2018 at 2:43:43 pm, Homin Jiang (ho...@asiaa.sinica.edu.tw) wrote: Dear Danny and John: Thanks of your suggestion. I checked the ARP table as below, the unused ones

[casper] PocketVNA / TinyVNA / VNWA

HI all, we're interested in getting a USB Vector Network Analyser (VNA), and was wondering if anyone had any suggestions? I have come across three that look interesting: * VNWA: https://www.sdr-kits.net/index.php?route=web/pages_id=11_11 * PocketVNA: http://pocketvna.com/ * MiniVNA Tiny:

[casper] CASPER paper library on ADS

Hi all, As I mentioned at the CASPER workshop, I’ve put together an ADS public library papers that details CASPER instruments: https://ui.adsabs.harvard.edu/#/public-libraries/7mm5XbqlRiW5FN-Si0l7oA It would be fantastic to have a near-complete list of CASPER instrument papers; if your paper is

Re: [casper] Raspberry Pi 3 B+ Image Corrupt?

Hi Dave, I just tried downloading the Pi 3+ image from the SNAP Bringup page and was able to unzip it and mount the .img file on my macbook. Note that it is a zip file, not a tar file, so you'll want to use *unzip*, not the *tar *utility, to decompress the file on linux. I have been using

Re: [casper] Sharing papers related to CASPER

Hi Franco, I have been keeping an ADS library of CASPER instrument papers: https://ui.adsabs.harvard.edu/public-libraries/7mm5XbqlRiW5FN-Si0l7oA Happy to add your papers to it! (And anyone else reading who has a paper -- just send me an email with links to your ADS entries). Cheers, Danny On

Re: [casper] Roach 2 FPGA

Hi Jael, Short answer: No. Don't do it! For compiling, most important for ROACH2 is that you will need to use the older Xilinx ISE 14.x -- you *cannot* use Xilinx Vivado to target the Virtex 6 FPGA. You can probably get away with Ubuntu 18.04, but I doubt the newer versions of MATLAB will work

Re: [casper] Help with 10GBE network (hardware side)

Hi Cedric, I was actually looking at the casperfpga code recently, and was puzzling about the ethernet setup. It seems to me it doesn’t actually program the 10GbE core. Looking just at the tutorial, in the program script (roach2_tut_tge.py) it calls fpga.gbes.[gbe_name_here].setup(): print

[casper] Issue compiling SNAP design with reorder block

Hi all, I am having difficulty compiling a SNAP design, which I have narrowed down to a reorder block (it compiles fine without the reorder). My environment is: Ubuntu 16.04.3 Matlab 2018a Vivado 2019.1 (have tried with 2019.1.1 also).

Re: [casper] ROACH2 / katADC million channel spectrometer

Hi Molly, There is an old tutorial with a million channel spectrometer up here: https://casper.ssl.berkeley.edu/wiki/Old_Tutorials This was on the ROACH1, and used a 1024-point real FFT, a 1024x1024 transpose using QDR RAM, followed by a second 1024-point complex FFT. If you have access to a

[casper] Issue programming SNAP Microblaze golden image

Hi all, I am trying to set up a SNAP board for microblaze, following the SNAP Bringup guide https://casper.ssl.berkeley.edu/wiki/SNAP_Bringup I am programming the board using a raspberry pi with a microblaze-enabled fpg file. It receives an IP address over 10 GbE, and I am able to connect to it

Re: [casper] references to recent cross-correlator technology developments

Hi Neil, To add to Jack's post, allow me to plug some overview articles that may be of interest. The first, https://arxiv.org/abs/1702.00442, was for an introduction for a special issue of JAI on DSP in radio astronomy in 2016. Table 1 summarises some of the larger correlators: the references

RE: [casper] references to recent cross-correlator technology developments

-time correlators, or as software correlators? Many thanks, Neil *From:* Danny Price *Sent:* 20 July 2020 12:21 *To:* casper@lists.berkeley.edu *Subject:* Re: [casper] references to recent cross-correlator technology developments Hi Neil, To add to Jack's post, allow me to plug some