[gem5-dev] changeset in gem5: mem: Ensure that InvalidateReq is not forward...

changeset 4e195fb9ec4f in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=4e195fb9ec4f description: mem: Ensure that InvalidateReq is not forwarded as ReadExReq This patch fixes an issue where an InvalidationReq only traversed one level of the cache

[gem5-dev] changeset in gem5: scons: Add missing override to appease clang

changeset faf5195f6ca7 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=faf5195f6ca7 description: scons: Add missing override to appease clang Make clang happy...again. diffstat: src/arch/hsail/insts/branch.hh | 60 ++--

Re: [gem5-dev] Review Request 3337: gpu-compute: fix uninitialized value error.

, if we all agree that 'gpu-compute' is indeed the most sensible keyword we should add it to the list. Something shorted and snappier would be nice, but I guess gpgpu, apu are not favoured? - Andreas Hansson On Feb. 23, 2016, 12:39 a.m., Marc Orr wrote

[gem5-dev] build/HSAIL_X86 does not compile with clang

Hi all, Could someone from AMD take a look at this? Even after adding 10’s of missing overrides there are some more involved issues that clang is not happy with. I’ve only been testing with clang-3.6 (Ubuntu 14.04), but I suspect it’s largely the same irrespective of version. Thanks, Andreas

[gem5-dev] changeset in gem5: scons: Enable building with the gcc/clang Add...

changeset a4d19e7cd26d in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=a4d19e7cd26d description: scons: Enable building with the gcc/clang Address Sanitizer Allow the user to easily build gem5 with the Address Sanitizer, part of both gcc and clang

[gem5-dev] Failing Ruby regression

Hi all, With the push of: changeset: 11339:c45bfadcd51b user:Michael LeBeane date:Sun Feb 14 20:28:48 2016 -0500 summary: ruby: make DMASequencer inherit from RubyPort The following regression fails: *

Re: [gem5-dev] changeset in gem5: mem: Avoid using invalid iterator in cache lo...

ust to use a 'break' at the end of the if clause? > >Steve > > >On Mon, Feb 15, 2016 at 12:58 AM Andreas Hansson <andreas.hans...@arm.com> >wrote: > >> changeset dc0ed2d4da50 in /z/repo/gem5 >> details: http://repo.gem5.org/gem5?cmd=changeset;node=dc0ed2d4da50 &g

[gem5-dev] Review Request 3335: configs: Add a lat_mem_rd style test script

/dram/lat_mem_rd.py PRE-CREATION util/dram_lat_mem_rd_plot.py PRE-CREATION Diff: http://reviews.gem5.org/r/3335/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3334: scons: Enable building with the gcc/clang Address Sanitizer

://reviews.gem5.org/r/3334/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] changeset in gem5: mem: Avoid using invalid iterator in cache lo...

changeset dc0ed2d4da50 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=dc0ed2d4da50 description: mem: Avoid using invalid iterator in cache lock list traversal Fix up issue highlighted by Valgrind and the clang Address Sanitizer. diffstat:

[gem5-dev] changeset in gem5: misc: Add missing overrides to appease clang

changeset bda2c39fd9fd in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=bda2c39fd9fd description: misc: Add missing overrides to appease clang Since the last round of fixes a few new issues have snuck in. We should consider switching the regression

Re: [gem5-dev] Review Request 3313: misc: Bugfix in TLM memInhibit Command

to the CoherentXBar we should probably update this to match the code in bridge.cc. - Andreas Hansson On Feb. 3, 2016, 3:37 p.m., Abdul Mutaal Ahmad wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://review

Re: [gem5-dev] Review Request 3315: mem: [DRAFT] Make DRAMCtrl response queue finite

ctional access on all the queues here. This goes beyond this patch, but it's a good thing you caught it. The write queue needs to be updated with any write data. The fact that we ignore read responses should not cause a problem. - Andreas H

[gem5-dev] changeset in gem5: mem: Align how snoops are handled when hittin...

changeset 40bcb0e97de9 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=40bcb0e97de9 description: mem: Align how snoops are handled when hitting writebacks This patch unifies the snoop handling in case of hitting writebacks with how we handle snoops

[gem5-dev] changeset in gem5: mem: Align cache behaviour in atomic when ups...

changeset c41d552d6f2e in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=c41d552d6f2e description: mem: Align cache behaviour in atomic when upstream is responding Adopt the same flow as in timing mode, where the caches on the path to memory get to keep

[gem5-dev] changeset in gem5: stats: Update stats to reflect changes to cac...

changeset b318499f676c in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=b318499f676c description: stats: Update stats to reflect changes to cache and crossbar diffstat: tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/stats.txt | 1409

[gem5-dev] changeset in gem5: mem: Move the point of coherency to the coher...

changeset 9bd2e84abdca in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=9bd2e84abdca description: mem: Move the point of coherency to the coherent crossbar This patch introduces the ability of making the coherent crossbar the point of coherency. If so,

[gem5-dev] changeset in gem5: mem: Deduce if cache should forward snoops

changeset cd5c48db28e6 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=cd5c48db28e6 description: mem: Deduce if cache should forward snoops This patch changes how the cache determines if snoops should be forwarded from the memory side to the CPU side.

Re: [gem5-dev] Review Request 3231: dist: config file for distributed switch

> On Feb. 6, 2016, 6:23 p.m., Tony Gutierrez wrote: > > Andreas, are you ok with this being shipped now? I am planning on shipping > > the switch, and it'd be nice if this can go in as well. No objections. That said, I do think that a separate directory is more sensible, since the use of this

Re: [gem5-dev] Review Request 3281: ruby: make DMASequencer inherit from RubyPort

> On Jan. 28, 2016, 9:27 p.m., Michael LeBeane wrote: > > Does anybody have any feedback for this patch? If not, we will check it in > > next Wednesday (02/03). > > Andreas Hansson wrote: > Could someone please explain what the reason for the initial change was?

Re: [gem5-dev] Review Request 3271: mem: Move the point of coherency to the coherent crossbar

lly generated e-mail. To reply, visit: http://reviews.gem5.org/r/3271/#review7986 ----------- On Jan. 1, 2016, 2:33 p.m., Andreas Hansson wrote: > > --- > This is an aut

Re: [gem5-dev] Follow-up: Removing QueuedSlavePort from DRAMCtrl

any new requests. Then through the callback we can unblock the DRAM controller in this case. What do you think? Andreas From: Joel Hestness <jthestn...@gmail.com<mailto:jthestn...@gmail.com>> Date: Tuesday, 2 February 2016 at 00:24 To: Andreas Hansson <andreas.hans...@arm.com<m

[gem5-dev] Patches good to go

Hi all, I intend to push these patches early next week. Let me know if you have comments or need more time: http://reviews.gem5.org/r/3271/ http://reviews.gem5.org/r/3294/ Thanks, Andreas IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be

Re: [gem5-dev] Review Request 3281: ruby: make DMASequencer inherit from RubyPort

> On Jan. 28, 2016, 9:27 p.m., Michael LeBeane wrote: > > Does anybody have any feedback for this patch? If not, we will check it in > > next Wednesday (02/03). > > Andreas Hansson wrote: > Could someone please explain what the reason for the initial change was?

Re: [gem5-dev] Review Request 3281: ruby: make DMASequencer inherit from RubyPort

> On Jan. 28, 2016, 9:27 p.m., Michael LeBeane wrote: > > Does anybody have any feedback for this patch? If not, we will check it in > > next Wednesday (02/03). Could someone please explain what the reason for the initial change was? It seems odd to revert this without getting to the bottom

Re: [gem5-dev] Review Request 3260: mem: Deduce if cache should forward snoops

//reviews.gem5.org/r/3260/#review7933 --- On Dec. 28, 2015, 6:14 p.m., Andreas Hansson wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3260/ > -

Re: [gem5-dev] Review Request 3260: mem: Deduce if cache should forward snoops

/cpu.hh 9be8a40026df src/cpu/simple/atomic.hh 9be8a40026df src/cpu/minor/cpu.hh 9be8a40026df src/cpu/minor/lsq.hh 9be8a40026df configs/common/O3_ARM_v7a.py 9be8a40026df Diff: http://reviews.gem5.org/r/3260/diff/ Testing --- Thanks, Andreas Hansson

[gem5-dev] Review Request 3294: mem: Be less conservative in clearing load locks in the cache

/cache/blk.hh 9be8a40026df Diff: http://reviews.gem5.org/r/3294/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3293: configs: add command-line option to stop debug output

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3293/#review7945 --- Ship it! Ship It! - Andreas Hansson On Jan. 19, 2016, 11:58 p.m

Re: [gem5-dev] Review Request 3271: mem: Move the point of coherency to the coherent crossbar

://reviews.gem5.org/r/3294/. - Andreas Hansson On Jan. 1, 2016, 2:33 p.m., Andreas Hansson wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

> On Jan. 14, 2016, 6:26 p.m., Andreas Hansson wrote: > > configs/ruby/GPU_RfO.py, line 80 > > <http://reviews.gem5.org/r/3189/diff/3/?file=53131#file53131line80> > > > > there seems to be an awful lot of repetition of boilerplate code > > involved

Re: [gem5-dev] Review Request 3283: ruby: Make MessageBuffers actually finite sized

em5.org/r/3283/#comment6895> is there not a .size() on the map itself, or am I missunderstanding what is counted here? could you perhaps add a comment and explain how it is used? - Andreas Hansson On Jan. 17, 2016, 4:40 p.m., Joel Hestness

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

> On Jan. 14, 2016, 6:26 p.m., Andreas Hansson wrote: > > configs/ruby/GPU_RfO.py, line 80 > > <http://reviews.gem5.org/r/3189/diff/3/?file=53131#file53131line80> > > > > there seems to be an awful lot of repetition of boilerplate code > > involved

Re: [gem5-dev] Review Request 3275: mem: Expose memory bandwidth and latency for SimpleMemory

with a multi-channel memory? Lastly, the existing memory command-line options are "mem" and not "memory". - Andreas Hansson On Jan. 14, 2016, 12:01 a.m., Matthew Poremba wrote: > > --- > This is an automatically gene

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

> On Jan. 13, 2016, 10:47 p.m., Andreas Hansson wrote: > > ...and yes, please split the patch to make it reviewable (if that is a > > word). > > Brad Beckmann wrote: > Andreas, we simply do not have the time and resources to do so. We have > spent a lot of tim

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

> On Jan. 13, 2016, 10:47 p.m., Andreas Hansson wrote: > > ...and yes, please split the patch to make it reviewable (if that is a > > word). > > Brad Beckmann wrote: > Andreas, we simply do not have the time and resources to do so. We have > spent a lot of tim

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

> On Jan. 14, 2016, 6:26 p.m., Andreas Hansson wrote: > > SConstruct, line 1244 > > <http://reviews.gem5.org/r/3189/diff/3/?file=53120#file53120line1244> > > > > This makes it look like the two are not orthogonal, could you > > explain/comment? >

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

> On Jan. 14, 2016, 6:26 p.m., Andreas Hansson wrote: > > SConstruct, line 1244 > > <http://reviews.gem5.org/r/3189/diff/3/?file=53120#file53120line1244> > > > > This makes it look like the two are not orthogonal, could you > > explain/comment? >

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

> On Jan. 14, 2016, 6:26 p.m., Andreas Hansson wrote: > > SConstruct, line 1244 > > <http://reviews.gem5.org/r/3189/diff/3/?file=53120#file53120line1244> > > > > This makes it look like the two are not orthogonal, could you > > explain/comment? >

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

broken out? configs/ruby/GPU_VIPER_Baseline.py (line 126) <http://reviews.gem5.org/r/3189/#comment6858> again...there is a lot of repetition these files really need some modularity Initial pass through the first pag

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

at is it for? src/mem/ruby/system/Sequencer.py (line 81) <http://reviews.gem5.org/r/3189/#comment6862> Is this GPU related? Some more. - Andreas Hansson On Jan. 13, 2016, 9:25 p.m., Tony Gutierrez wrote: > > --- > Th

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

> On Jan. 14, 2016, 6:26 p.m., Andreas Hansson wrote: > > configs/common/GPUTLBOptions.py, line 42 > > <http://reviews.gem5.org/r/3189/diff/3/?file=53127#file53127line42> > > > > I think we need some form of prefix, apu/compute-gpu/gpgpu etc. > >

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

> On Jan. 13, 2016, 10:47 p.m., Andreas Hansson wrote: > > ...and yes, please split the patch to make it reviewable (if that is a > > word). > > Brad Beckmann wrote: > Andreas, we simply do not have the time and resources to do so. We have > spent a lot of tim

Re: [gem5-dev] Review Request 3230: dist, dev: add an ethernet switch model

> On Jan. 12, 2016, 3:19 p.m., Andreas Hansson wrote: > > src/dev/net/etherswitch.cc, line 531 > > <http://reviews.gem5.org/r/3230/diff/4/?file=53086#file53086line531> > > > > It really irks me that we schedule this every clock period, ev

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

org/r/3189/#comment6843> I thought we concluded that one fixed latency memory controller is enough? I'd suggest to use SimpleMemory - Andreas Hansson On Jan. 13, 2016, 9:25 p.m., Tony Gutierrez wrote: > > --- > This is a

Re: [gem5-dev] Review Request 3185: mem: misc flags for AMD gpu model

On Jan. 13, 2016, 10:06 p.m., Tony Gutierrez wrote: > > There seems to be a few unrelated changes here. I don't mind the getters (but please scope them in a doxygen comment block (there are already example of this in packet.hh). The minor little changes here and there I'd really like to see

Re: [gem5-dev] Review Request 3185: mem: misc flags for AMD gpu model

(line 239) <http://reviews.gem5.org/r/3185/#comment6833> This seems unrelated src/mem/ruby/system/RubyPort.cc (line 473) <http://reviews.gem5.org/r/3185/#comment6834> unrelated There seems to be a few unrelated changes here. - Andreas Hansson O

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

e patch, I noticed two things: > > - The new GPU ISA constant lives in the same header as the CPU ISA. > > Please put it in a separate header. This will make things easier down the > > line if we ever decide to reduce the set of files we need to recompile for >

Re: [gem5-dev] Review Request 3185: mem: misc flags for AMD gpu model

185/#comment6844> Looking at the APU/GPU patch, it seems these are more mutually exclusive options than flags in bitmask. Would it not make sense to rather have an enum for the segment, and one for the scope, and then use the same enum here and where the value is acted upon? - Andreas Hansson

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

(if that is a word). - Andreas Hansson On Jan. 13, 2016, 9:25 p.m., Tony Gutierrez wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem

Re: [gem5-dev] Review Request 3205: mem: support for gpu-style RMWs in ruby

> On Jan. 6, 2016, 9:39 p.m., Andreas Hansson wrote: > > I still find that the design needs a far better explanation, and at least > > one simple example. I would suggest implementing the SwapReq as an atomic > > op (as I guess it is our only example). Also, sur

Re: [gem5-dev] Review Request 3230: dist, dev: add an ethernet switch model

> On Jan. 8, 2016, 5:22 p.m., Andreas Hansson wrote: > > src/dev/etherswitch.cc, line 529 > > <http://reviews.gem5.org/r/3230/diff/1/?file=52019#file52019line529> > > > > This is not a very nice way to design things... > > > > It would

Re: [gem5-dev] Review Request 3230: dist, dev: add an ethernet switch model

230/#comment6816> It really irks me that we schedule this every clock period, even if there is nothing to do. Even if we don't make the model event based, could we at least make sure that it only ticks if there is something to do? - Andreas Hansson On Jan. 11, 2016, 5:

Re: [gem5-dev] SPARC FS emulation stopped working after rebuilding from latest sources

Hi Palle, This sounds great. Is there any chance you could create a “SPARC full-system files” bundle for http://www.gem5.org/Download and update the SPARC FS regression to use it? That way we can avoid the proprietary boot image. Thanks, Andreas On 04/01/2016, 13:36, "gem5-dev on behalf of

[gem5-dev] changeset in gem5: configs: Fix inheritance of HMCSystem and cle...

changeset 5d1d5bf9c178 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=5d1d5bf9c178 description: configs: Fix inheritance of HMCSystem and cleanup spacing Minor fix to ensure the HMCSystem can actually be instantiated (SimObject cannot be created).

[gem5-dev] changeset in gem5: scons: Enable -Wextra by default

changeset a368064a2ab5 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=a368064a2ab5 description: scons: Enable -Wextra by default Make best use of the compiler, and enable -Wextra as well as -Wall. There are a few issues that had to be resolved, but

Re: [gem5-dev] Review Request 3231: dist: config file for distributed switch

If so, where is the rest of the system? - Andreas Hansson On Nov. 19, 2015, 8:16 p.m., Mohammad Alian wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://revie

Re: [gem5-dev] Review Request 3261: scons: Enable -Wextra by default

-- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3261/#review7848 --- On Jan. 7, 2016, 4:32 p.m., Andreas Hansson wrote: > > --- > This

Re: [gem5-dev] Review Request 3231: dist: config file for distributed switch

out the license header. Is it intentionally the "extended" BSD rather than just the plain BSD? - Andreas Hansson On Nov. 19, 2015, 8:16 p.m., Mohammad Alian wrote: > > --- > This is an automatically generated e-mail. T

Re: [gem5-dev] Review Request 3230: dist, dev: add an ethernet switch model

erswitch.cc (line 529) <http://reviews.gem5.org/r/3230/#comment6782> This is not a very nice way to design things... It would be much better if this module was event based. Is there a reason why it is not? - Andreas

Re: [gem5-dev] Review Request 3262: ext: Replace gzstream with iostream3 from zlib to avoid LGPL

on. - Andreas --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3262/#review7837 --- On Dec. 28, 2015, 6:15 p.m., Andrea

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

> On Oct. 30, 2015, 10:27 p.m., Andreas Hansson wrote: > > Impressive! > > > > Should it not be src/dev/gpu rather than src/gpu? > > > > Also, could you please make it a subdirectory in the gpu dir (as from > > above). There are more GPUs i

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

e patch, I noticed two things: > > - The new GPU ISA constant lives in the same header as the CPU ISA. > > Please put it in a separate header. This will make things easier down the > > line if we ever decide to reduce the set of files we need to recompile for >

Re: [gem5-dev] Review Request 3189: gpu: AMD's baseline GPU model

> On Nov. 10, 2015, 7:51 p.m., Andreas Sandberg wrote: > > This is indeed very impressive! However, as it is, this patch is basically > > the definition of unreviewable. Could you split it into a handful of > > different patches for review purposes? ReviewBoard makes all kinds of > >

Re: [gem5-dev] Review Request 3261: scons: Enable -Wextra by default

57c340f947c7 src/dev/arm/pl011.hh 57c340f947c7 src/dev/net/ethertap.cc 57c340f947c7 src/dev/net/ns_gige_reg.h 57c340f947c7 src/dev/net/pktfifo.hh 57c340f947c7 Diff: http://reviews.gem5.org/r/3261/diff/ Testing --- Thanks, Andreas Hansson

Re: [gem5-dev] Review Request 3205: mem: support for gpu-style RMWs in ruby

> On Jan. 6, 2016, 9:39 p.m., Andreas Hansson wrote: > > I still find that the design needs a far better explanation, and at least > > one simple example. I would suggest implementing the SwapReq as an atomic > > op (as I guess it is our only example). Also, sur

Re: [gem5-dev] Review Request 3261: scons: Enable -Wextra by default

, visit: http://reviews.gem5.org/r/3261/#review7821 ----------- On Jan. 7, 2016, 4:32 p.m., Andreas Hansson wrote: > > --- > This is an automatically generat

Re: [gem5-dev] Review Request 3262: ext: Replace gzstream with iostream3 from zlib to avoid LGPL

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3262/#review7811 --- Any objections? - Andreas Hansson On Dec. 28, 2015, 6:15 p.m

Re: [gem5-dev] Review Request 3205: mem: support for gpu-style RMWs in ruby

> On Jan. 6, 2016, 9:39 p.m., Andreas Hansson wrote: > > I still find that the design needs a far better explanation, and at least > > one simple example. I would suggest implementing the SwapReq as an atomic > > op (as I guess it is our only example). Also, sur

Re: [gem5-dev] Review Request 3205: mem: support for gpu-style RMWs in ruby

having been addressed. - Andreas Hansson On Jan. 6, 2016, 9:12 p.m., Tony Gutierrez wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem

Re: [gem5-dev] Review Request 3272: mips: make compile with clang

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3272/#review7809 --- Ship it! Ship It! - Andreas Hansson On Jan. 4, 2016, midnight

Re: [gem5-dev] tinderbox? building universe?

Hi Bjoern, All architectures are built and tested on a daily basis, but unfortunately only using gcc 4.7 at this point. This is done by the util/regress script, which by default builds all architectures and Ruby protocols, and when passed “all” runs all regressions. The snipped you include

[gem5-dev] Review Request 3270: mem: Align cache behaviour in atomic when upstream is responding

the (invalidating) packet or not. Diffs - src/mem/cache/cache.cc 57c340f947c7 Diff: http://reviews.gem5.org/r/3270/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo

[gem5-dev] Review Request 3271: mem: Move the point of coherency to the coherent crossbar

, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3206: mem: write combining for ruby protocols

of the functionality needed to enable dirty bits per byte, but no write combining of uncacheable writes. The description definitely needs to be updated, and at the moment the diff also seems very incomplete. - Andreas Hansson On Nov. 12, 2015, 10:05 p.m., Tony Gutierrez wrote

Re: [gem5-dev] Review Request 2691: mem: implement x86 locked accesses in timing-mode classic cache

> On May 7, 2015, 7:55 a.m., Andreas Hansson wrote: > > src/mem/cache/cache_impl.hh, line 639 > > <http://reviews.gem5.org/r/2691/diff/3/?file=44871#file44871line639> > > > > Is it safe to call this here and ignore the return value? > > >

Re: [gem5-dev] Review Request 3266: arch: get rid of unused LargestRead typedef

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3266/#review7799 --- Ship it! Ship It! - Andreas Hansson On Dec. 31, 2015, 8 a.m., Steve

Re: [gem5-dev] Review Request 3268: o3: don't pass unnecessary data pointer to read()

t;cpu" and then get the "o3" part into the description. - Andreas Hansson On Dec. 31, 2015, 8:02 a.m., Steve Reinhardt wrote: > > --- > This is an automatically generated e-mail. To reply, visit: >

[gem5-dev] changeset in gem5: mem: Make cache terminology easier to understand

changeset b3926db25371 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=b3926db25371 description: mem: Make cache terminology easier to understand This patch changes the name of a bunch of packet flags and MSHR member functions and variables to make

[gem5-dev] changeset in gem5: mem: Do not alter cache block state on uncach...

changeset 25715951a4b8 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=25715951a4b8 description: mem: Do not alter cache block state on uncacheable snoops This patch ensures we do not respond with a Modified (dirty and writable) line if the request is

[gem5-dev] changeset in gem5: mem: Do not allocate space for packet data if...

changeset 2071db8f864b in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=2071db8f864b description: mem: Do not allocate space for packet data if not needed This patch looks at the request and response command to determine if either actually has any data

[gem5-dev] changeset in gem5: mem: Do not rely on the NeedsWritable flag fo...

changeset 0d5bbeaeb8ca in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=0d5bbeaeb8ca description: mem: Do not rely on the NeedsWritable flag for responses This patch removes the NeedsWritable flag for all responses, as it is really only the request

[gem5-dev] Review Request 3265: mem: Align how snoops are handled when hitting writebacks

- src/mem/cache/cache.cc 4cc8b312f026 Diff: http://reviews.gem5.org/r/3265/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3259: mem: Do not allocate space for packet data if not needed

/cache.cc 3fd1142adad9 src/mem/cache/mshr.cc 3fd1142adad9 Diff: http://reviews.gem5.org/r/3259/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3259: mem: Do not allocate space for packet data if not needed

/cache/mshr.cc 3fd1142adad9 src/mem/packet.hh 3fd1142adad9 Diff: http://reviews.gem5.org/r/3259/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3254: mem: Make cache terminology easier to understand

src/mem/ruby/system/RubyPort.cc 3fd1142adad9 src/mem/serial_link.cc 3fd1142adad9 src/mem/simple_mem.cc 3fd1142adad9 src/mem/snoop_filter.cc 3fd1142adad9 src/mem/tport.cc 3fd1142adad9 Diff: http://reviews.gem5.org/r/3254/diff/ Testing --- Thanks, Andreas Hansson

[gem5-dev] Review Request 3263: mem: Do not rely on the NeedsWritable flag for responses

/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3259: mem: Do not allocate space for packet data if not needed

t; given that 'respond' is only set if we have a modified copy, it seems > > unlikely... again, if not, perhaps an assert is more apporpriate? > > Andreas Hansson wrote: > Yes there is. Upgrades in particular. > > Steve Reinhardt wrote: > So how did this

Re: [gem5-dev] Review Request 3254: mem: Make cache terminology easier to understand

3fd1142adad9 src/mem/serial_link.cc 3fd1142adad9 src/mem/simple_mem.cc 3fd1142adad9 src/mem/snoop_filter.cc 3fd1142adad9 src/mem/tport.cc 3fd1142adad9 src/cpu/o3/cpu.cc 3fd1142adad9 Diff: http://reviews.gem5.org/r/3254/diff/ Testing --- Thanks, Andreas Hansson

Re: [gem5-dev] Review Request 3251: mem: Do not use sender state to track forwarded snoops in cache

reviews.gem5.org/r/3251/#review7779 --- On Dec. 24, 2015, 8:22 a.m., Andreas Hansson wrote: > > --- > This is an automatically generated e-mail. To reply, visit: >

[gem5-dev] changeset in gem5: mem: Do not use sender state to track forward...

changeset 3561d002d8c7 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=3561d002d8c7 description: mem: Do not use sender state to track forwarded snoops in cache This patch changes how the cache tracks which snoops are forwarded, and which ones are

[gem5-dev] changeset in gem5: mem: Avoid unecessary checks when creating Ha...

changeset 4f8703832608 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=4f8703832608 description: mem: Avoid unecessary checks when creating HardPFReq in cache The checks made before sending out a HardPFReq were unecessarily complex, and checked for

[gem5-dev] changeset in gem5: mem: Fix cache sender state handling and add ...

changeset fc2b0e6550ad in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=fc2b0e6550ad description: mem: Fix cache sender state handling and add clarification This patch addresses a bug in how the cache attached the MSHR as a sender state. Rather than

[gem5-dev] changeset in gem5: mem: Remove unused cache squash functionality

changeset 18411ccc4f3c in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=18411ccc4f3c description: mem: Remove unused cache squash functionality This patch removes the unused squash function from the MSHR queue, and the associated (and also unused)

[gem5-dev] Review Request 3260: mem: Deduce if cache should forward snoops

/mem/cache/base.cc 3fd1142adad9 Diff: http://reviews.gem5.org/r/3260/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3259: mem: Do not allocate space for packet data if not needed

d e-mail. To reply, visit: http://reviews.gem5.org/r/3259/#review7741 ----------- On Dec. 16, 2015, 12:40 a.m., Andreas Hansson wrote: > > --- > This is an aut

[gem5-dev] Review Request 3261: scons: Enable -Wextra by default

Diff: http://reviews.gem5.org/r/3261/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] changeset in gem5: mem: Explicitly check MSHR snoops for cases n...

changeset 3fd1142adad9 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=3fd1142adad9 description: mem: Explicitly check MSHR snoops for cases not dealt with Add a sanity check to make it explicit that we currently do not allow an I/O coherent agent to

Re: [gem5-dev] Review Request 3254: mem: Make cache terminology easier to understand

/mem/mem_checker_monitor.cc 3fd1142adad9 src/mem/noncoherent_xbar.cc 3fd1142adad9 src/mem/packet.hh 3fd1142adad9 src/cpu/o3/cpu.cc 3fd1142adad9 src/dev/dma_device.cc 3fd1142adad9 Diff: http://reviews.gem5.org/r/3254/diff/ Testing --- Thanks, Andreas Hansson

[gem5-dev] Review Request 3262: ext: Replace gzstream with iostream3 from zlib to avoid LGPL

zfstream.h PRE-CREATION ext/iostream3/zfstream.cc PRE-CREATION src/base/output.cc 3fd1142adad9 Diff: http://reviews.gem5.org/r/3262/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.o

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