Re: [gem5-dev] Review Request 3795: misc: Add Python.h header to pyevents.hh

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3795/#review9340 --- Ship it! Ship It! - Andreas Sandberg On Jan. 27, 2017, 5:32 p.m

Re: [gem5-dev] Review Request 3794: style: Force Python.h to be included before main header

.gem5.org/r/3792/diff/1/#33. > > > > If my fix does work, I think it's better to just include Python.h there > > instead of changing the style. > > Andreas Sandberg wrote: > I'd like to avoid including Python.h in any header files for dependency > reasons

Re: [gem5-dev] Review Request 3794: style: Force Python.h to be included before main header

in a a style update a while back. - Andreas --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3794/#review9331 ------- On Jan

Re: [gem5-dev] [gem5-users] gem5 build failure

On 27/01/17 12:32, Pierre-Yves Péneau wrote: On 01/27/2017 01:20 PM, Andreas Sandberg wrote: Hi Pierre, I send out an email to the dev list on the 12th of January (Header order issues) describing a similar issue we have in our CI system. I have an updated version of the style checker

[gem5-dev] Review Request 3794: style: Force Python.h to be included before main header

: Id6a4f7fc64a336a8fd26691a0ca682abeb1d1579 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> Diffs - src/python/swig/pyevent.cc be62996c95d1 src/sim/init.cc be62996c95d1 src/sim/py_interact.cc be62996c95d1 util/style/sort

[gem5-dev] changeset in gem5: python: Move native wrappers to the _m5 names...

: I2d2bc12dbc05b57b7c5a75f072e08124413d77f3 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Curtis Dunham <curtis.dun...@arm.com> Reviewed-by: Jason Lowe-Power <ja...@lowepower.com> diffstat: src/SConscript | 20 ++-- src

Re: [gem5-dev] changeset in gem5: syscall_emul: [patch 4/22] remove redundant M...

Hi Brandon, Something bad (they hang) happened with the SE-mode ALPHA and SPARC regressions the other day. A quick bisection suggest that this commit was the first bad one. Could you have a look? //Andreas On 23/01/17 21:22, Brandon Potter wrote: changeset cd7f3a1dbf55 in /z/repo/gem5

Re: [gem5-dev] [gem5-users] gem5 build failure

Hi Pierre, I send out an email to the dev list on the 12th of January (Header order issues) describing a similar issue we have in our CI system. I have an updated version of the style checker that enforces that Python.h is included first and plan to post it after lunch. I would like to avoid

Re: [gem5-dev] Ideas for sprint projects

Another small project: Unify PS/2 handling: PS2 is implemented by both the i8042 and PL050 models, but almost no code is shared. //Andreas On 23/01/17 15:57, Andreas Sandberg wrote: Hi Everyone, Thanks for organising this! See below for some of my ideas. Small projects: * Clean up

Re: [gem5-dev] Review Request 3781: riscv: Remove ECALL tests from insttest

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3781/#review9316 --- Ship it! Ship It! - Andreas Sandberg On Jan. 24, 2017, 4:33 p.m

Re: [gem5-dev] Review Request 3781: riscv: Remove ECALL tests from insttest

> On Jan. 24, 2017, 9:43 a.m., Andreas Sandberg wrote: > > Did you remove all files from the reference output directory? In that case, > > you'll need to add a an empty placeholder file called EMPTY in the > > reference directories. Some VCS systems (git being one

Re: [gem5-dev] Review Request 3781: riscv: Remove ECALL tests from insttest

? In that case, you'll need to add a an empty placeholder file called EMPTY in the reference directories. Some VCS systems (git being one of them) don't track empty directories, which would interfere with test discovery. - Andreas Sandberg On Jan. 23, 2017, 7:36 p.m., Alec Roelke wrote

Re: [gem5-dev] Review Request 3781: riscv: Remove ECALL tests from insttest

> On Jan. 23, 2017, 4:59 p.m., Andreas Hansson wrote: > > Another option is to remove the stats.txt from the stats results directory. > > This will turn the test into a functional-only test. > > > > In fact that may be there better option here as we also don't have to worry > > about

Re: [gem5-dev] Ideas for sprint projects

Hi Everyone, Thanks for organising this! See below for some of my ideas. Small projects: * Clean up serialization code for better code reuse (particularly container helpers) * Create a separate test classification for CI smoke tests (faster than quick) Medium-sized projects: * New test

[gem5-dev] Header order issues

Hi Everyone, Brandon’s recent header reorder patch (thanks Brandon!) uncovered some issues in the style guide. The style guide currently mandates that the primary header (foo.hh in the case of foo.cc) is included first, then Python.hh (if needed), then other header. This turns out to be a bit

[gem5-dev] Global event ownership weirdness

Hi Everyone, I was playing around with a patch to replace SWIG with PyBind a couple of weeks ago and found some "interesting" memory allocation issues. My understanding of event ownership is as follows: * !IsExitEvent && AutoDelete: Owned by the event queue. * !IsExitEvent && !AutoDelete:

[gem5-dev] changeset in gem5: sim: Remove redundant export_method_cxx_predecls

is automatically included. Change-Id: Ied9e84630b36960e54efe91d16f8c66fba7e0da0 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Curtis Dunham <curtis.dun...@arm.com> Reviewed-by: Joe Gross <joseph.gr...@amd.com> Reviewed-by

[gem5-dev] changeset in gem5: python: Don't use Swig to cast stats

visitors are called. Change-Id: Ic4d0b7b32e3ab9897b9a34cd22d353f4da62d738 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Sascha Bischoff <sascha.bisch...@arm.com> Reviewed-by: Curtis Dunham <curtis.dun...@arm.com> Revie

[gem5-dev] changeset in gem5: util: Add maintainer tools to create upstream...

. Kudos to Curtis Dunham and Nikos Nikoleris for reviews and usability enhancements for earlier versions of this patch. Change-Id: Ia4cd089a32834b5e046ef58c0a173ca285b77bca Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Curtis

[gem5-dev] Review Request 3770: python: Move native wrappers to the _m5 namespace

., PyBind11 or Boost::Python). This changeset moves all of such wrappers to the _m5 namespace, which is now reserved for native code. Change-Id: I2d2bc12dbc05b57b7c5a75f072e08124413d77f3 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Curtis Dunham <curtis.dun...@arm.com

[gem5-dev] Review Request 3769: python: Don't use Swig to cast stats

11769:b930c2c20e93 --- python: Don't use Swig to cast stats Call the stat visitor from the stat itself rather than casting stats in Python. This reduces the number of ways visitors are called. Change-Id: Ic4d0b7b32e3ab9897b9a34cd22d353f4da62d738 Signed-off-by: Andreas Sandberg

[gem5-dev] Review Request 3768: sim: Remove redundant export_method_cxx_predecls

/r/3768/diff/ Testing --- Thanks, Andreas Sandberg ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] changeset in gem5: dev: Include DmaDevice in NULL builds

the actual C++ implementation. Add dma_device.cc to the NULL build to the Python and C++ worlds consistent again. Change-Id: I47a57181a1f4d5a7276467678bf16fbc7f161681 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Sascha Bi

[gem5-dev] changeset in gem5: python: Fix incorrect header in the DmaDevice...

potentially lead to incorrect type cases in Swig. Change-Id: If2266d4180d1d6fd13359a81067068854c5e96fe Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Sascha Bischoff <sascha.bisch...@arm.com> diffstat: src/dev/Device.py | 2

[gem5-dev] changeset in gem5: mem: Make the BaseXBar public to not confuse ...

destructor public to avoid confusing the Python wrapper. Change-Id: If958802409c0be74e875dd6e279742abfdb3ede1 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> Reviewed-by: Curtis Dunham <curtis

[gem5-dev] changeset in gem5: python: Export periodicStatDump

helper function. This function was previously only exported in the internal name space. Export it as a normal function in m5.stat instead. Change-Id: Ic88bf1fd33042a62ab436d5944d8ed778264ac98 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.

[gem5-dev] changeset in gem5: sim: Remove redundant buildEnv import

changeset 302c6b957854 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=302c6b957854 description: sim: Remove redundant buildEnv import Change-Id: Id6bdbc0c988aa92b96e292cabc913e6b974f14bb Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.

Re: [gem5-dev] Review Request 3740: commit 8606171b2c2e65d0b9931ccb4bd2ebc533c55d60

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3740/#review9176 --- Ship it! Ship It! - Andreas Sandberg On Nov. 29, 2016, 11:54 p.m

[gem5-dev] changeset in gem5: style: Add options to select checkers and app...

: Id7597fba6b65cecfa17a88b1c87c8a4c8315af59 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Andreas Hansson <andreas.hans...@arm.com> diffstat: util/style.py | 32 ++-- 1 files changed, 26 insertions(+), 6 deletions(-) diffs (78 line

Re: [gem5-dev] Review Request 3745: scons: fix how flags are passed to the compiler when more than one sanitizer at a time is enabled

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3745/#review9171 --- Ship it! Ship It! - Andreas Sandberg On Nov. 23, 2016, 10:25 p.m

Re: [gem5-dev] Review Request 3740: commit 8606171b2c2e65d0b9931ccb4bd2ebc533c55d60

e stat class in the future. src/mem/comm_monitor.cc (line 332) <http://reviews.gem5.org/r/3740/#comment7886> See above. - Andreas Sandberg On Nov. 21, 2016, 7:03 p.m., Rahul Thakur wrote: > > --- > This is an automatic

Re: [gem5-dev] Review Request 3744: cpu: Remove branch predictor function predictInOrder

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3744/#review9169 --- Ship it! Ship It! - Andreas Sandberg On Nov. 23, 2016, 4:10 p.m

Re: [gem5-dev] Review Request 3690: x86, ext: fix buf overflow in fp80 ops; pad fp80_t in fputils

> On Nov. 18, 2016, 5:12 p.m., Andreas Sandberg wrote: > > Ship It! > > Tony Gutierrez wrote: > Would you mind pulling in the changes from fputils? I have no experience > doing things like that. Or, if you could send me a mail offline with details > about how to

Re: [gem5-dev] Review Request 3690: x86, ext: fix buf overflow in fp80 ops; pad fp80_t in fputils

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3690/#review9122 --- Ship it! Ship It! - Andreas Sandberg On Nov. 15, 2016, 7:52 p.m

Re: [gem5-dev] Review Request 3708: commit 752c67b134f4cb0b7ca68a907c39a5a482de30b3

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3708/#review9121 --- Ship it! Ship It! - Andreas Sandberg On Nov. 17, 2016, 8:02 p.m

Re: [gem5-dev] Review Request 3708: commit 752c67b134f4cb0b7ca68a907c39a5a482de30b3

rintProbe, ::statReset>(this)) ``` - Andreas Sandberg On Nov. 16, 2016, 11:02 p.m., Rahul Thakur wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http:/

Re: [gem5-dev] Review Request 3690: x86, ext: fix buf overflow in fp80 ops; pad fp80_t in fputils

ttp://reviews.gem5.org/r/3690/#comment7811> Are these changes really needed? - Andreas Sandberg On Nov. 15, 2016, 5:18 p.m., Tony Gutierrez wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://

Re: [gem5-dev] Review Request 3690: x86, ext: fix buf overflow in fp80 ops; pad fp80_t in fputils

> On Nov. 15, 2016, 3:16 p.m., Andreas Sandberg wrote: > > Thanks for fixing this. The only technical issue I have with this patch is > > that it uses bit fields, which have slightly undefined semantics. I would > > like to avoid that if possible. I think it woul

Re: [gem5-dev] Review Request 3690: x86, ext: fix buf overflow in fp80 ops; pad fp80_t in fputils

allocation of bit-fields within a unit (high-order to low-order or low-order to high-order) is implementation-defined." A better solution would probably be to add a 6 byt uint8_t pad array. - Andreas Sandberg On Nov. 1, 2016, 7:36 p.m., Tony

Re: [gem5-dev] Review Request 3493: dev: Add 'simLength' parameter in EthPacketData

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3493/#review8921 --- Ship it! Ship It! - Andreas Sandberg On Oct. 12, 2016, 4:50 p.m

Re: [gem5-dev] Review Request 3665: arm, config: Enabled MemConfig usage for the example big.LITTLE

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3665/#review8920 --- Ship it! Ship It! - Andreas Sandberg On Oct. 19, 2016, 4:41 a.m

Re: [gem5-dev] Review Request 3665: arm, config: Enabled MemConfig usage for the example big.LITTLE

of redundant imports. configs/example/arm/fs_bigLITTLE.py (lines 55 - 57) <http://reviews.gem5.org/r/3665/#comment7621> These two imports aren't needed. - Andreas Sandberg On Oct. 17, 2016, 3:19 a.m., Anastasiia Butko

Re: [gem5-dev] Review Request 3493: dev: Redefine 'length' in EthPacketData

> On Oct. 3, 2016, 5:27 p.m., Andreas Sandberg wrote: > > src/dev/net/etherpkt.cc, line 44 > > <http://reviews.gem5.org/r/3493/diff/2/?file=56881#file56881line44> > > > > I really don't like the way this is breaking checkpoints. > > &

Re: [gem5-dev] Review Request 3648: style: Add options to select checkers and apply fixes

> provide more organization so that it's easier to identify an include if you > > happen to glance up at the header sections, but that seems minor and > > probably isn't their justification. Does anyone else have thoughts on the > > topic? > > Andreas Sandberg wrote:

Re: [gem5-dev] Review Request 3650: style: remove err.h to prevent a name collision

) seems incorrect. I would argue that this particular name collision is benign since this isn't a standard API. - Andreas Sandberg On Oct. 10, 2016, 6:16 p.m., Brandon Potter wrote: > > --- > This is an automatically generat

Re: [gem5-dev] Review Request 3648: style: Add options to select checkers and apply fixes

lse have thoughts on the > > topic? With the exception of the distinction between 4 & 5, isn't this what we are doing already? - Andreas --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3648/#review8795 --

Re: [gem5-dev] Review Request 3648: style: Add options to select checkers and apply fixes

awkward newline when printing the help text. > > > > ``` > > help="Style checkers to run. Can be specified " > > "multiple times." > > ``` > > Andreas Sandberg wrote: > Argparse actually ignores this newline.

Re: [gem5-dev] Review Request 3648: style: Add options to select checkers and apply fixes

tomatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3648/#review8783 ------- On Oct. 7, 2016, 4:11 p.m., Andreas Sandberg wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http:/

Re: [gem5-dev] Review Request 3643: style: reduce include dependencies in some headers

> On Oct. 7, 2016, 10:31 a.m., Andreas Sandberg wrote: > > Thanks for doing this! This is something that has annoyed me for quite some > > time as well. > > > > Thee are quite a few files modified in patch where the header order isn't > > compliant with the s

[gem5-dev] changeset in gem5: dev, arm: Make GenericTimer param handling mo...

: I989455e666f4ea324df28124edbbadfd094b0d02 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> diffstat: src/dev/arm/RealView.py | 2 +- src/dev/arm/generic_timer.cc | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diffs (25 line

[gem5-dev] Review Request 3648: style: Add options to select checkers and apply fixes

be specified multiple times to run multiple style checkers. The option, --fix/-f, can be specified to automatically fix style violations. Change-Id: Id7597fba6b65cecfa17a88b1c87c8a4c8315af59 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Andreas Hansson <andreas.hans..

Re: [gem5-dev] Review Request 3643: style: reduce include dependencies in some headers

that header files include all of their dependencies, but I wouldn't say that's a blocker. - Andreas Sandberg On Oct. 5, 2016, 5:27 p.m., Brandon Potter wrote: > > --- > This is an automatically generated e-mail. To reply, visi

Re: [gem5-dev] Review Request 3643: style: reduce include dependencies in some headers

> On Oct. 6, 2016, 3:57 p.m., Jason Lowe-Power wrote: > > Seems reasonable to me. Could you explain in the commit message how you > > decided which headers to remove/keep/add? Without digging into these files > > it's hard to understand your thought process. > > > > Related: Do you think it

[gem5-dev] changeset in gem5: sim: Add a checkpoint function to test for en...

of an entry. Change-Id: I4b4646b03276b889fd3916efefff3bd552317dbc Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> diffstat: src/base/inifile.cc | 11 +++ src/base/inifile.hh | 6 +++

Re: [gem5-dev] Review Request 3635: misc: Adds a warning in case gdb is attached multiple times

g/r/3635/#comment7584> Could you make this a bit more descriptive before submitting it? Something like "A GDB trap event has already been scheduled, ignoring second event." No need for a second review though. - Andreas Sandberg On Oct. 3, 2016, 8:49 p.m., Alex

Re: [gem5-dev] Review Request 3635: gdb: Adds a warning in case gdb is attached multiple times

> On Oct. 3, 2016, 12:06 p.m., Andreas Sandberg wrote: > > Wouldn't it make more sense to just disallow multiple GDB clients to be > > attached at the same time? > > Alexandru Dutu wrote: > This does not make sense to me as one can run a configuration with > mu

Re: [gem5-dev] Review Request 3493: dev: Redefine 'length' in EthPacketData

o push a helper function to test for that shortly), you just unserialize the value. If not, you use a fallback such as simLength = dataLength. The other option is to provide a checkpoint updater, which is pretty tricky since you need to find all places where packets are serialized. - A

Re: [gem5-dev] Review Request 3635: gdb: Adds a warning in case gdb is attached multiple times

to be attached at the same time? - Andreas Sandberg On Oct. 3, 2016, 6:41 a.m., Alexandru Dutu wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem

Re: [gem5-dev] Stable release

+1 for #1 from me as well. Ideally, I’d like to see #3, but I don’t think we can make that work at the moment. //Andreas On 03/10/2016, 01:06, "gem5-dev on behalf of Steve Reinhardt" on behalf of

[gem5-dev] changeset in gem5: tests, arm: Reinstate accidentally removed sw...

. Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] changeset in gem5: tests: Make remaining switcheroo tests functi...

differences in them just increases the size of reference diffs. Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> diffstat: tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/config.ini | 1845 - tests/long/fs/10.linux-boot/ref/alpha/linux/t

[gem5-dev] changeset in gem5: test: Make the memtest and memcheck tests fun...

diffs less noisy in the future. Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> diffstat: tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/config.ini | 5280 -- tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/

Re: [gem5-dev] Review Request 3632: Fix: Fix the O3 CPU Drain

in some places when the draining happened after a stage got blocked, but before the notification arrived to the previous stages. Change-Id: Ib50b3b40b7f745b62c1eba2931dec76860824c71 Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com> Diffs - src/cpu/o3/decode_impl.hh 1ede1b

[gem5-dev] Review Request 3632: Fix: Fix the O3 CPU Drain

a stage got blocked, but before the notification arrived to the previous stages. Change-Id: Ib50b3b40b7f745b62c1eba2931dec76860824c71 Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com> Diffs - src/cpu/o3/decode_impl.hh 1ede1b60b318 src/cpu/o3/fetch_impl.hh 1ede1b60b318 s

[gem5-dev] changeset in gem5: tests, arm: Make switcheroo and checkpoint te...

to completion. Remove all reference output files from the switcheroo and checkopint tests to make them purely functional. Change-Id: I70b47853bd662b7a33716d9e0d2154b16077f9dc Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Curtis

[gem5-dev] changeset in gem5: tests: Add support for functional only tests

EMPTY to the list of ignored files in the test harness. This file can be used as a placeholder in otherwise empty test directories. Change-Id: I583c8c4e55479f0d48fa99d0b0d1eac9221e6652 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Re

[gem5-dev] Review Request 3625: util: git pre-commit hook to check staged files

Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com> [andreas.sandb...@arm.com: Rebased ontop of latest gem5] Diffs - util/git-pre-commit.py e92bf392bf43 util/style/verifiers.py e92bf392bf43 Diff: http://reviews.gem5.org/r/3625/diff/ Testing --- Thanks, Andreas Sa

[gem5-dev] Review Request 3626: tests: Add support for functional only tests

. Change-Id: I583c8c4e55479f0d48fa99d0b0d1eac9221e6652 Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Curtis Dunham <curtis.dun...@arm.com> Diffs - tests/testing/tests.py e92bf392bf43 Diff: http://reviews.gem5.org/r/3626/diff/ Testing --- Than

Re: [gem5-dev] Review Request 3623: arm, dev: pl011 console interactivity

a bit of a misnomer). You shouldn't need to worry about the mask (or whether the interrupt is pending) here since setInterrupts won't poke the GIC unless there is a new interrupt pending (raising a pending interrupt is effectively a no-op). - Andreas Sandberg On Sept. 5, 2016, 11:22 p.m.,

Re: [gem5-dev] Review Request 3623: arm, dev: pl011 console interactivity

/arm/pl011.cc (line 232) <http://reviews.gem5.org/r/3623/#comment7525> Do you actually need the check against maskInt() here? The necessary checks should already be inplace in dataAvailable()/raiseInterrupts(). - Andreas Sandberg On Sept. 5, 2016, 11:22 p.m., Bjoern A. Zeeb

Re: [gem5-dev] X86 RSP return address (after MemWrite) not yet updated issue?

On 26/08/2016 09:58, Bjoern A. Zeeb wrote: On 25 Aug 2016, at 22:09, Andreas Hansson wrote: Hi all, Thanks a lot for that reply. Two thoughts: 1. Does X86 + o3 + classic memory system actually work? 2. The interleaving of “real” timing accesses and the functional “debug” accesses is not

[gem5-dev] gem5 positions @ ARM in Cambridge (UK)

Fellow gem5 users/developers, First of all, apologies for the wide distribution of this slightly off-topic email. ARM is currently looking for people to work on various aspects of simulation and modelling. We currently have two positions open in Research, one internship and one permanent, where

Re: [gem5-dev] Review Request 3619: kvm: Support timing accesses for KVM cpu

> On Aug. 21, 2016, 4:29 a.m., Michael LeBeane wrote: > > Well, having played around with this solution for KVM MMIO + Ruby a bit it > > does work (with the addition of a timing_noncacheable state as Andreas S. > > noted), but not very well. If you put the system in timing mode you get > >

Re: [gem5-dev] Review Request 3619: kvm: Support timing accesses for KVM cpu

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3619/#review8669 --- Ship it! Ship It! - Andreas Sandberg On Aug. 21, 2016, 4:19 a.m

Re: [gem5-dev] Review Request 3619: kvm: Support timing accesses for KVM cpu

> On Aug. 18, 2016, 9:50 a.m., Andreas Sandberg wrote: > > src/cpu/kvm/base.cc, line 505 > > <http://reviews.gem5.org/r/3619/diff/2/?file=57574#file57574line505> > > > > I would prefer if we could keep the bypass caches check. Classic memory > > will

Re: [gem5-dev] Review Request 3580: cpu, mem, sim: Change how KVM maps memory

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3580/#review8660 --- Ship it! Ship It! - Andreas Sandberg On Aug. 18, 2016, 1:28 p.m

Re: [gem5-dev] Review Request 3619: kvm: Support timing accesses for KVM cpu

on't have a proper 4-phase handshake where we are told > when a request is accepted. If we have the "ack" for the request then it > would be clear that we must not send a second request until the first one is > accepted. That's a much bigger topic though, but just so you know the

Re: [gem5-dev] Review Request 3619: kvm: Support timing accesses for KVM cpu

ment instead of distributing them? I think that'll keep the state machine more maintainable in the future. You'll probably need to call the handler before updating the state in that case. - Andreas Sandberg On Aug. 17, 2016, 9:07 p.m., Michael L

Re: [gem5-dev] Review Request 3619: kvm: Support timing accesses for KVM cpu

> On Aug. 17, 2016, 11:05 p.m., Andreas Hansson wrote: > > src/cpu/kvm/base.cc, line 228 > > > > > > Conceptually this is not very nice, as it assumes infinite throughput. > > > > I see how we save an even this

Re: [gem5-dev] Review Request 3619: kvm: Support timing accesses for KVM cpu

em5.org/r/3619/#comment7497> Since you potentially submit multiple timing packets, you can't reuse the req without ending up in a double free situation. - Andreas Sandberg On Aug. 16, 2016, 11:28 p.m., Michael LeBeane wrote: > > ---

Re: [gem5-dev] Review Request 3590: Add a DmaCallback class to DmaDevice

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3590/#review8644 --- Ship it! Ship It! - Andreas Sandberg On Aug. 16, 2016, 11:31 p.m

[gem5-dev] changeset in gem5: dev: Revert 0a316996de76 [dev, sim: Added mis...

CLANG compilation (OSX)" which was incorrectly rebased. Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> diffstat: src/dev/storage/disk_image.hh | 6 ++ 1 files changed, 2 insertions(+), 4 deletions(-) diffs (16 lines): diff -r 985d9b9a68bf -r 7e7157941d70

[gem5-dev] changeset in gem5: cpu: Add missing override in Minor's exec con...

changeset 985d9b9a68bf in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=985d9b9a68bf description: cpu: Add missing override in Minor's exec context Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> diffstat: src/cpu/minor/exec_context.h

[gem5-dev] Review Request 3616: cpu: Support exit when any one Trace CPU completes replay

ole...@arm.com> Diffs - src/cpu/trace/TraceCPU.py 6b749761c398 src/cpu/trace/trace_cpu.hh 6b749761c398 src/cpu/trace/trace_cpu.cc 6b749761c398 Diff: http://reviews.gem5.org/r/3616/diff/ Testing --- Thanks, Andreas Sandberg ___ ge

[gem5-dev] Review Request 3615: cpu: Adjust for trace offset and fix stats

-Id: Ie0898842615def867ffd5c219948386d952af7f7 Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> Diffs - src/cpu/trace/trace_cpu.hh 6b749761c398 src/cpu/trace/trace_cpu.cc 6b749761c398 Diff: http://reviews.gem5.org/r/3615/diff/ Testing --- Thanks, Andreas Sa

[gem5-dev] Review Request 3614: cpu: Add frequency scaling to the Trace CPU

/trace/TraceCPU.py 6b749761c398 src/cpu/trace/trace_cpu.hh 6b749761c398 src/cpu/trace/trace_cpu.cc 6b749761c398 Diff: http://reviews.gem5.org/r/3614/diff/ Testing --- Thanks, Andreas Sandberg ___ gem5-dev mailing list gem5-dev@gem5.or

Re: [gem5-dev] Review Request 3565: arm, config: Fixups for the example big.LITTLE(tm) configuration

file to use a more object-oriented design. Change-Id: I44ac2d063c2b5901f385544fb6ce3f259459cb05 Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Gabor Dozsa <gabor.do...@arm.com> Diffs (updated) - configs/example/arm/devices.py 6b749761c398 configs

Re: [gem5-dev] Review Request 3580: cpu, mem, sim: Enable KVM support for Ruby

as well? We should check that flag as well when mapping memories in kvm, but that should probably be a separate commit since it's a bug fix that's orthogonal to this. Thanks for sorting this out! - Andreas Sandberg On Aug. 5, 2016, 10:37 p.m., David Hashe wrote

Re: [gem5-dev] Review Request 3580: cpu, mem, sim: Enable KVM support for Ruby

> On Aug. 12, 2016, 8:44 a.m., Andreas Hansson wrote: > > src/mem/AbstractMemory.py, line 64 > > > > > > I am still trying to wrap my head around what the table looks like with > > in_addr_map, conf_table_Reported, and now

Re: [gem5-dev] Installing a Compiled Kernel to Disk Image for ARM

Hi Yasir, You don’t need to alter your disk images to use a new kernel (in fact, you don’t even need a disk image to start the kernel). The bootstrapping process in gem5 works roughly along these lines: Before time starts (this all happens within gem5): 1. Instantiate all components in

Re: [gem5-dev] Review Request 3607: tests: remove EIO tests

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3607/#review8600 --- Ship it! Ship It! - Andreas Sandberg On Aug. 10, 2016, 6:08 p.m

Re: [gem5-dev] changeset in gem5: config: Allow SPARC FS image to be specified ...

It seems like this commit has some unforeseen interactions with the regressions system. The SPARC FS regression doesn’t seem to run at all on Zizzer anymore. When I run the 80.solaris-boot test locally (without the disk image), I get a failure with the “Don't know what default disk image to use

Re: [gem5-dev] Review Request 3590: dev: Add a DmaCallback class to DmaDevice

in DmaCallback to prevent this from happening or document this behaviour. - Andreas Sandberg On Aug. 4, 2016, 7:44 p.m., Michael LeBeane wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://revi

Re: [gem5-dev] Review Request 3588: ruby: convert atomic accesses to functional in RubyPort

> On Aug. 4, 2016, 5:52 p.m., Andreas Hansson wrote: > > This is _very_ dangerous. > > > > The "functional" accessor functions are really only for debug access, and > > any writes happening on the functional interfaces do not really have a > > well-defined consistency model with respect to

Re: [gem5-dev] Review Request 3593: sim: Refactor quiesce and remove FS asserts

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3593/#review8596 --- Ship it! Ship It! - Andreas Sandberg On Aug. 4, 2016, 5:50 p.m

Re: [gem5-dev] Review Request 3594: x86: Force strict ordering for memory mapped m5ops

the code years ago. - Andreas Sandberg On Aug. 4, 2016, 5:47 p.m., Michael LeBeane wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem

Re: [gem5-dev] Review Request 3578: ruby: Size the MI_example directory to cover all phys mem

- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3578/#review8529 --- On July 22, 2016, 4:08 p.m., Andreas Sandberg wrote: > > --- > This is an automatically generated e-mail. To repl

[gem5-dev] changeset in gem5: arm, config: Add initial support for Ruby

experimental and limited to the new VExpress_GEM5_V1 platform. Change-Id: I36baeb68b0d891e34ea46aafe17b5e55217b4bfa Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikole...@arm.com> Reviewed-by: Jason Lo

[gem5-dev] changeset in gem5: arm, config: Exit with fatal error if using Ruby

are aware of the limitations (it doesn't actually work yet!). Signed-off-by: Andreas Sandberg <andreas.sandb...@arm.com> diffstat: configs/common/FSConfig.py | 5 + 1 files changed, 5 insertions(+), 0 deletions(-) diffs (15 lines): diff -r e0ddee91eb13 -r 55bd18

[gem5-dev] changeset in gem5: ruby: Implement support for functional access...

support functional accesses to such memories since functional accesses are always assumed to go to physical memory. Add the required support for routing functional accesses to the PIO bus. Change-Id: Ia5b0fcbe87b9642bfd6ff98a55f71909d1a804e3 Signed-off-by: Andreas Sandberg

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