Re: [gem5-dev] Review Request 3451: ruby: change clock periods for requests associated with ruby port

a queued port here. - Andreas Hansson On April 21, 2016, 7:49 p.m., Brandon Potter wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://re

[gem5-dev] Builds with BUILD_GPU false failing at linking stage

Hi all (mostly AMD), It seems the GPUCoalescer appears in code that is not guarded by BUILD_GPU (e.g. in profiler/Profiler.cc). As a result, when building build/NULL/gem5.opt this ends up causing undefined references at link time. Could someone have a look and address this issue? Thanks,

[gem5-dev] changeset in gem5: mem: Include WriteLineReq in cache demand stats

changeset 067177a1b578 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=067177a1b578 description: mem: Include WriteLineReq in cache demand stats Somehow the WriteLineReq were never added to the list of commands considered demand. diffstat:

[gem5-dev] changeset in gem5: mem: Align downstream cache packet creation i...

changeset 4bc3a0c0861c in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=4bc3a0c0861c description: mem: Align downstream cache packet creation in atomic and timing This patch makes the control flow more uniform in atomic and timing, ultimately making

[gem5-dev] changeset in gem5: stats: Update stats to reflect cache changes

changeset c0fb4435b80f in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=c0fb4435b80f description: stats: Update stats to reflect cache changes Removed unused stats, now counting WriteLineReq, and changed how uncacheable writes are handled while

[gem5-dev] changeset in gem5: mem: Deallocate all write-queue entries when ...

changeset dd9763792521 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=dd9763792521 description: mem: Deallocate all write-queue entries when sent This patch removes the write-queue entry tracking previously used for uncacheable writes. The

[gem5-dev] changeset in gem5: config: Add missing point of coherency to mem...

changeset 082f25c02518 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=082f25c02518 description: config: Add missing point of coherency to memcheck script Bring in line with changes to the XBar class. diffstat: configs/example/memcheck.py | 1 + 1 files

Re: [gem5-dev] Review Request 3407: mem: Simplify cache packet handling for uncacheable writes

should > > of course be deleted. If it is still used, I'd be curious how, since I'm > > leery of both forwarding the packet down to the next level and keeping a > > copy of the pointer ourselves---makes the ownership situation ambiguous. > > Andreas Hansson wrote: > Ye

Re: [gem5-dev] Question about newfstatat() syscall

Hi all, Perhaps obvious, but why not run in full-system mode? Clearly there are trade-offs, but ultimately it opens up for more realistic workloads. Andreas On 21/04/2016, 01:11, "gem5-dev on behalf of Potter, Brandon" wrote:

Re: [gem5-dev] Review Request 3407: mem: Simplify cache packet handling for uncacheable writes

should > > of course be deleted. If it is still used, I'd be curious how, since I'm > > leery of both forwarding the packet down to the next level and keeping a > > copy of the pointer ourselves---makes the ownership situation ambiguous. > > Andreas Hansson wrote: > Ye

Re: [gem5-dev] Review Request 3407: mem: Simplify cache packet handling for uncacheable writes

should > > of course be deleted. If it is still used, I'd be curious how, since I'm > > leery of both forwarding the packet down to the next level and keeping a > > copy of the pointer ourselves---makes the ownership situation ambiguous. > > Andreas Hansson wrote: > Ye

[gem5-dev] Review Request 3452: mem: Deallocate all write-queue entries when sent

98e5204d0a52 Diff: http://reviews.gem5.org/r/3452/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3407: mem: Simplify cache packet handling for uncacheable writes

should > > of course be deleted. If it is still used, I'd be curious how, since I'm > > leery of both forwarding the packet down to the next level and keeping a > > copy of the pointer ourselves---makes the ownership situation ambiguous. > > Andreas Hansson wrote: > Ye

Re: [gem5-dev] Review Request 3407: mem: Simplify cache packet handling for uncacheable writes

should > > of course be deleted. If it is still used, I'd be curious how, since I'm > > leery of both forwarding the packet down to the next level and keeping a > > copy of the pointer ourselves---makes the ownership situation ambiguous. > > Andreas Hansson wrote: > Ye

Re: [gem5-dev] Review Request 3231: dist: config file for distributed switch

> On Feb. 6, 2016, 6:23 p.m., Tony Gutierrez wrote: > > Andreas, are you ok with this being shipped now? I am planning on shipping > > the switch, and it'd be nice if this can go in as well. > > Andreas Hansson wrote: > No objections. That said, I do think that a se

Re: [gem5-dev] Review Request 3407: mem: Simplify cache packet handling for uncacheable writes

should > > of course be deleted. If it is still used, I'd be curious how, since I'm > > leery of both forwarding the packet down to the next level and keeping a > > copy of the pointer ourselves---makes the ownership situation ambiguous. > > Andreas Hansson wrote: > Ye

Re: [gem5-dev] Review Request 3407: mem: Simplify cache packet handling for uncacheable writes

should > > of course be deleted. If it is still used, I'd be curious how, since I'm > > leery of both forwarding the packet down to the next level and keeping a > > copy of the pointer ourselves---makes the ownership situation ambiguous. > > Andreas Hansson wrote: > Ye

Re: [gem5-dev] Review Request 3407: mem: Simplify cache packet handling for uncacheable writes

, visit: http://reviews.gem5.org/r/3407/#review8240 ------- On April 9, 2016, 4:20 p.m., Andreas Hansson wrote: > > --- > This is an automatically generat

[gem5-dev] Cache refinements good to go

Hi all, The following two cache refinements are about to be pushed. There is nothing controversial in these patches, and no stats are affected. If you have comments let me know before the end-of-play tomorrow. http://reviews.gem5.org/r/3407/ http://reviews.gem5.org/r/3408/ Thanks, Andreas

Re: [gem5-dev] Review Request 3449: Add support for McVerSi memory consistency verification framework

Hi Steve, This patch review, and this conversation (until it ended up on the mailing list). 3449. My first comment. Andreas From: Steve Reinhardt <ste...@gmail.com<mailto:ste...@gmail.com>> Date: Thursday, 14 April 2016 at 18:45 To: Andreas Hansson <andreas.hans...@arm.com<m

Re: [gem5-dev] Review Request 3449: Add support for McVerSi memory consistency verification framework

Reinhardt <ste...@gmail.com<mailto:ste...@gmail.com>> Date: Thursday, 14 April 2016 at 18:32 To: gem5 Developer List <gem5-dev@gem5.org<mailto:gem5-dev@gem5.org>>, Marco Elver <marco.el...@ed.ac.uk<mailto:marco.el...@ed.ac.uk>>, Andreas Hansson <andreas.hans...

Re: [gem5-dev] Review Request 3449: Add support for McVerSi memory consistency verification framework

> On April 13, 2016, 5:49 p.m., Andreas Hansson wrote: > > Really nice to see more work along these lines. > > > > I am keen to make sure we "finish what we started", and for that reason I > > would like to understand how this relates to the existing M

Re: [gem5-dev] Review Request 3449: Add support for McVerSi memory consistency verification framework

> On April 13, 2016, 5:49 p.m., Andreas Hansson wrote: > > Really nice to see more work along these lines. > > > > I am keen to make sure we "finish what we started", and for that reason I > > would like to understand how this relates to the existing M

Re: [gem5-dev] Review Request 3449: Add support for McVerSi memory consistency verification framework

> On April 13, 2016, 5:49 p.m., Andreas Hansson wrote: > > Really nice to see more work along these lines. > > > > I am keen to make sure we "finish what we started", and for that reason I > > would like to understand how this relates to the existing M

Re: [gem5-dev] Review Request 3449: Add support for McVerSi memory consistency verification framework

we "finish what we started", and for that reason I would like to understand how this relates to the existing MemChecker. Also, I'd really like to see the MemChecker more widely deployed (which I think requires some further cleverness). Could you shed some light on this Marco? - Andre

Re: [gem5-dev] Review Request 3446: hsail, gpu-compute: fixes to appease clang++

> On April 13, 2016, 4:24 p.m., Andreas Hansson wrote: > > On the X86 side of things (but somewhat unrelated)...when compiled with > > clang-3.6 the following regression fails with a segfault: > > > > build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-t

[gem5-dev] changeset in gem5: misc: Fix issues flagged by gcc 6

changeset df24b9af42c7 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=df24b9af42c7 description: misc: Fix issues flagged by gcc 6 A few warnings (and thus errors) pop up after being added to -Wall: 1. -Wmisleading-indentation In the

Re: [gem5-dev] Review Request 3446: hsail, gpu-compute: fixes to appease clang++

with clang-3.6 the following regression fails with a segfault: build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing Not sure why, but perhaps worth a look. - Andreas Hansson On April 13, 2016, 3:09 p.m., Tony Gutierrez wrote

Re: [gem5-dev] Review Request 3378: scons: make build better on FreeBSD

042> Surely this is included by default?! SConstruct (line 880) <http://reviews.gem5.org/r/3378/#comment7043> could we not make TIMEOUT contain the command rather, and then use it in tests/SConscript? - Andreas Hansson On April 13, 2016, 2:18 p.m., Bjoern A

Re: [gem5-dev] Memory consistency verification (and some bugs)

Hi Marco, This sounds good. Regarding the external component, I certainly do not mind. I would suggest we prune the old and crufty McPat. That should free up some 45k LoC, and I there is not really any integration in place in any case. Do you also have any updates to the MemChecker? It is

Re: [gem5-dev] Review Request 3446: hsail, gpu-compute: fixes to appease clang++

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3446/#review8191 --- Ship it! Thanks! - Andreas Hansson On April 12, 2016, 5:20 p.m

[gem5-dev] changeset in gem5: misc: Appease clang...again

changeset b31738224fb0 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=b31738224fb0 description: misc: Appease clang...again Once again, clang is having issues with recently committed code. Unfortunately HSAIL_X86 is still broken. diffstat:

[gem5-dev] HSAIL_X86 not compiling with clang

Hi all, Is there someone at AMD that could have a look? It’s been broken for quite some time now. Thanks, Andreas IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender

Re: [gem5-dev] Review Request 3433: ruby: improved component mapping

> On April 6, 2016, 9:43 p.m., Andreas Hansson wrote: > > No objections, but a high-level question: Should the long-term play here be > > to use the "normal" gem5 address mapping functionality embedded in the > > AddrRange class? This class (along wit

Re: [gem5-dev] Review Request 3432: base: stats: add function for printing text to output

> On April 6, 2016, 9:39 p.m., Andreas Hansson wrote: > > Could you explain why? > > > > In general, for all of these patches, could you please add a brief > > description of the "why"? > > Brandon Potter wrote: > The diatribe that I just po

Re: [gem5-dev] Review Request 3424: ruby: add parameters to functions related to addresses

> On April 11, 2016, 9:02 p.m., Jason Lowe-Power wrote: > > src/mem/ruby/common/Address.cc, line 107 > > > > > > I think the solution to cleaning up these patches is to make these > > functions members of RubySystem

Re: [gem5-dev] Review Request 3444: mem: Add a FromCache packet attribute

//reviews.gem5.org/r/3445/ - Andreas --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3444/#review8169 --- On April 9, 2016, 4:21 p.

[gem5-dev] Review Request 3445: mem: Update mostly exclusive cache policy to cover more cases

/mem/cache/cache.hh 0edcf757b6a2 src/mem/cache/cache.cc 0edcf757b6a2 Diff: http://reviews.gem5.org/r/3445/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3444: mem: Add a FromCache packet attribute

a cache or not, and this is used by both the cache and snoop filter in follow-on patches. Diffs - src/mem/cache/cache.cc 0edcf757b6a2 src/mem/packet.hh 0edcf757b6a2 src/mem/packet.cc 0edcf757b6a2 Diff: http://reviews.gem5.org/r/3444/diff/ Testing --- Thanks, Andreas Hansson

Re: [gem5-dev] Review Request 3408: mem: Align downstream cache packet creation in atomic and timing

) - src/mem/cache/cache.hh 0edcf757b6a2 src/mem/cache/cache.cc 0edcf757b6a2 Diff: http://reviews.gem5.org/r/3408/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3407: mem: Simplify cache packet handling for uncacheable writes

://reviews.gem5.org/r/3407/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] changeset in gem5: stats: Match current behaviour

changeset 0edcf757b6a2 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=0edcf757b6a2 description: stats: Match current behaviour Small changes to the branch predictor and BTB caused stats changes throughout. diffstat:

Re: [gem5-dev] Review Request 3378: scons: make build better on FreeBSD

> On March 20, 2016, 11:42 a.m., Andreas Hansson wrote: > > SConstruct, line 798 > > <http://reviews.gem5.org/r/3378/diff/1/?file=54100#file54100line798> > > > > i am surprised to not see this change in util/regress as well > > > > shoul

Re: [gem5-dev] Review Request 3429: ruby: PerfectCache changes so that we can create with new

> On April 6, 2016, 9:47 p.m., Andreas Hansson wrote: > > Is this fixing a problem? Functional? Performance? > > Brandon Potter wrote: > This is to make this class' ENTRY conform with the changes to the other > ENTRY types in the rest of the Ruby system. The

Re: [gem5-dev] Review Request 3432: base: stats: add function for printing text to output

> On April 6, 2016, 9:39 p.m., Andreas Hansson wrote: > > Could you explain why? > > > > In general, for all of these patches, could you please add a brief > > description of the "why"? > > Brandon Potter wrote: > The diatribe that I just po

Re: [gem5-dev] Review Request 3429: ruby: PerfectCache changes so that we can create with new

> On April 6, 2016, 9:47 p.m., Andreas Hansson wrote: > > Is this fixing a problem? Functional? Performance? > > Brandon Potter wrote: > This is to make this class' ENTRY conform with the changes to the other > ENTRY types in the rest of the Ruby system. The

Re: [gem5-dev] Review Request 3428: ruby: pass in block size to ENTRY objects with block size

> On April 6, 2016, 9:46 p.m., Andreas Hansson wrote: > > For the classic memory system, all caches before the point of coherency > > have the same line size, and it is a property of the system. Is this change > > departing from this assumption for Ruby? What is th

Re: [gem5-dev] Review Request 3443: garnet: fix bug where multiple enqueues happen on same tick

> On April 6, 2016, 9:37 p.m., Andreas Hansson wrote: > > How is that logically possible? Doesn't that suggest something is > > fundamentally wrong? > > Brandon Potter wrote: > I need to reproduce this problem and reconfirm how I arrived at this > soluti

Re: [gem5-dev] Review Request 3429: ruby: PerfectCache changes so that we can create with new

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3429/#review8154 --- Is this fixing a problem? Functional? Performance? - Andreas Hansson

Re: [gem5-dev] Review Request 3428: ruby: pass in block size to ENTRY objects with block size

have the same line size, and it is a property of the system. Is this change departing from this assumption for Ruby? What is the bigger picture here? - Andreas Hansson On April 4, 2016, 11:42 p.m., Brandon Potter wrote

Re: [gem5-dev] Review Request 3433: ruby: improved component mapping

be to use the "normal" gem5 address mapping functionality embedded in the AddrRange class? This class (along with the XBar) already has support for interleaving and hashing. - Andreas Hansson On April 4, 2016, 11:43 p.m., Brandon Po

Re: [gem5-dev] Review Request 3432: base: stats: add function for printing text to output

please add a brief description of the "why"? - Andreas Hansson On April 4, 2016, 11:43 p.m., Brandon Potter wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://r

Re: [gem5-dev] Review Request 3443: garnet: fix bug where multiple enqueues happen on same tick

is fundamentally wrong? - Andreas Hansson On April 4, 2016, 11:45 p.m., Brandon Potter wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem

Re: [gem5-dev] Cron <m5test@zizzer> /z/m5/regression/do-regression quick

Hi Steve, It is all our fault, and fixes are on the way. Andreas On 06/04/2016, 18:28, "gem5-dev on behalf of Steve Reinhardt" wrote: >Just trying the first test that failed, I get: > >% sudo -u m5test build/ALPHA/gem5.opt

Re: [gem5-dev] Review Request 3373: mem: different HMC configuration

> On April 1, 2016, 2:14 p.m., Erfan Azarkhish wrote: > > Dear Abdul, > > I disagree with breaking the crossbar into 4 smaller crossbar, because I am > > quite sure that this is not how it works in the HMC. > > Maybe if you could modify the crossbar into a hierarchical-crossbar with > >

[gem5-dev] Review Request 3408: mem: Align downstream cache packet creation in atomic and timing

/cache.cc 1f92ce16e171 Diff: http://reviews.gem5.org/r/3408/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3407: mem: Simplify cache packet handling for uncacheable writes

are dealt with. By not allocating copies of the packet the code is simplified, and we avoid unecessary memory management. Diffs - src/mem/cache/cache.cc 1f92ce16e171 src/mem/cache/write_queue_entry.hh 1f92ce16e171 Diff: http://reviews.gem5.org/r/3407/diff/ Testing --- Thanks, Andreas

Re: [gem5-dev] Review Request 3403: syscall: remove mmapFlagTable

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3403/#review8130 --- Ship it! Ship It! - Andreas Hansson On March 26, 2016, 3:40 a.m

Re: [gem5-dev] Review Request 3402: syscall_emul: factor out flag tables into common file

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3402/#review8126 --- Ship it! Ship It! - Andreas Hansson On March 26, 2016, 3:40 a.m

Re: [gem5-dev] Review Request 3403: syscall: remove mmapFlagTable

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3403/#review8125 --- syscall_emul? - Andreas Hansson On March 26, 2016, 3:40 a.m., Steve

Re: [gem5-dev] Trunk does not build due to recent syscall_emul patch

? > >On Thu, Mar 24, 2016 at 2:12 PM Andreas Hansson <andreas.hans...@arm.com> >wrote: > >> Hi Steve, >> >> I suspect that is the whole list. >> >> Andreas >> >> On 24/03/2016, 13:40, "gem5-dev on behalf of Steve Reinhardt" >>

Re: [gem5-dev] Trunk does not build due to recent syscall_emul patch

f you'd be >>willing to >> put those ifdefs in. We'd really appreciate your cooperation. >> >> In case it's helpful, here's a quick xemacs macro that will wrap the >>next >> line after the cursor for you: >> (setq last-kbd-macro (read-kbd-macro >> "C-s

Re: [gem5-dev] Style checker line-length issues (RFC: new line length?)

Hi Steve, I would suggest we settle for 79 even though that is not entirely diff friendly. The main reason is that 80 char is still quite skimp (in this day and age) and optimising for editing seems like the right solution. Andreas On 16/03/2016, 09:48, "gem5-dev on behalf of Steve Reinhardt"

[gem5-dev] Trunk does not build due to recent syscall_emul patch

Hi all (and Brandon in particular), Unfortunately http://repo.gem5.org/gem5/rev/5ac090acd180 causes build issues on OSX and even certain Linux systems (with older kernels, and also specific kernel configurations). Brandon, could you either back this out, or find some alternative solution to

Re: [gem5-dev] Review Request 3313: misc: Bugfix in TLM memInhibit Command

g/r/3313/#comment6988> I'd add this for atomic as well. - Andreas Hansson On March 20, 2016, 2:57 p.m., Abdul Mutaal Ahmad wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://revie

[gem5-dev] changeset in gem5: mem: Create a separate class for the cache wr...

changeset f98df9231cdd in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=f98df9231cdd description: mem: Create a separate class for the cache write buffer This patch breaks out the cache write buffer into a separate class, without affecting any stats.

Re: [gem5-dev] Review Request 3378: scons: make build better on FreeBSD

985> i am surprised to not see this change in util/regress as well should we parametrise the name rather? SConstruct (line 964) <http://reviews.gem5.org/r/3378/#comment6986> should we just replace the check for message.h rather? - Andreas Hansson On March 15, 20

[gem5-dev] changeset in gem5: cpu: warn if TrafficGen is suppressing a larg...

changeset 48b748cc6497 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=48b748cc6497 description: cpu: warn if TrafficGen is suppressing a large numer of packets Add a basic warning for every 1 packet that is suppressed to alert the user.

Re: [gem5-dev] Review Request 3313: misc: Bugfix in TLM memInhibit Command

> On March 14, 2016, 12:48 a.m., Andreas Hansson wrote: > > util/tlm/sc_port.cc, line 187 > > <http://reviews.gem5.org/r/3313/diff/2/?file=54076#file54076line187> > > > > The transactor should also not see any clean evicts. > > Abdul Mutaal Ahmad w

Re: [gem5-dev] Style checker line-length issues (RFC: new line length?)

I am entirely behind the 79 char limit. Andreas On 16/03/2016, 09:22, "gem5-dev on behalf of Andreas Sandberg" wrote: >Hi Everyone, > >I recently noticed that the style checker forces lines to be 77 characters >or shorter and not

Re: [gem5-dev] Review Request 3313: misc: Bugfix in TLM memInhibit Command

> On March 14, 2016, 12:48 a.m., Andreas Hansson wrote: > > util/tlm/sc_port.cc, line 187 > > <http://reviews.gem5.org/r/3313/diff/2/?file=54076#file54076line187> > > > > The transactor should also not see any clean evicts. > > Abdul Mutaal Ahmad w

[gem5-dev] changeset in gem5: mem: Adjust cache queue reserve to more conse...

changeset a06a4debe272 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=a06a4debe272 description: mem: Adjust cache queue reserve to more conservative values The cache queue reserve is there as an overflow to give us enough headroom based on when we

[gem5-dev] changeset in gem5: stats: Bump stats to match cache changes

changeset a6968f06a5e0 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=a6968f06a5e0 description: stats: Bump stats to match cache changes Update stats to match current behaviour. As a result of the earlier conflict check we are seeing a few prefetch

Re: [gem5-dev] Review Request 3346: mem: Create a separate class for the cache write buffer

s you propose may seem simple, but they completely muck with the subdivision of responsibilities. - Andreas --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3346/#review8082 ---------

Re: [gem5-dev] Review Request 3313: misc: Bugfix in TLM memInhibit Command

313/#comment6970> The transactor should also not see any clean evicts. - Andreas Hansson On March 11, 2016, 6 p.m., Abdul Mutaal Ahmad wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://revie

Re: [gem5-dev] Review Request 3346: mem: Create a separate class for the cache write buffer

something different between the two cases, we should try and do that by > > defining appropriate virtual functions on QueueEntry, and perhaps (if > > necessary) creating a common base class for the Queue<> classes and > > defining some virtual functions on that. > > A

Re: [gem5-dev] Review Request 3346: mem: Create a separate class for the cache write buffer

src/mem/cache/write_queue.cc PRE-CREATION src/mem/cache/write_queue_entry.hh PRE-CREATION src/mem/cache/write_queue_entry.cc PRE-CREATION Diff: http://reviews.gem5.org/r/3346/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing

Re: [gem5-dev] Review Request 3313: misc: Bugfix in TLM memInhibit Command

> On Feb. 14, 2016, 12:24 p.m., Andreas Hansson wrote: > > After pushing the patch that moves the point of coherency to the > > CoherentXBar we should probably update this to match the code in bridge.cc. > > Abdul Mutaal Ahmad wrote: > when is that pat

Re: [gem5-dev] Review Request 3372: mem: FreeBSD does not provide MAP_NORESERVE either

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3372/#review8076 --- Ship it! Ship It! - Andreas Hansson On March 10, 2016, 2:36 p.m

Re: [gem5-dev] Review Request 3346: mem: Create a separate class for the cache write buffer

something different between the two cases, we should try and do that by > > defining appropriate virtual functions on QueueEntry, and perhaps (if > > necessary) creating a common base class for the Queue<> classes and > > defining some virtual functions on that. > > A

Re: [gem5-dev] Review Request 3347: mem: Adjust cache queue reserve to more conservative values

s (updated) - src/mem/cache/base.cc 3df33d41 src/mem/cache/queue.hh PRE-CREATION Diff: http://reviews.gem5.org/r/3347/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/lis

Re: [gem5-dev] Review Request 3346: mem: Create a separate class for the cache write buffer

something different between the two cases, we should try and do that by > > defining appropriate virtual functions on QueueEntry, and perhaps (if > > necessary) creating a common base class for the Queue<> classes and > > defining some virtual functions on that. > > A

[gem5-dev] changeset in gem5: configs: Add a lat_mem_rd style test script

E, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Author

[gem5-dev] changeset in gem5: syscall_emul: Fix erroneous use of delete

changeset f85d49a098a7 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=f85d49a098a7 description: syscall_emul: Fix erroneous use of delete clang correctly points out an erroneous use of delete. diffstat: src/sim/syscall_emul.hh | 2 +- 1 files changed, 1

Re: [gem5-dev] Review Request 3346: mem: Create a separate class for the cache write buffer

something different between the two cases, we should try and do that by > > defining appropriate virtual functions on QueueEntry, and perhaps (if > > necessary) creating a common base class for the Queue<> classes and > > defining some virtual functions on that. > > A

Re: [gem5-dev] Review Request 3346: mem: Create a separate class for the cache write buffer

something different between the two cases, we should try and do that by > > defining appropriate virtual functions on QueueEntry, and perhaps (if > > necessary) creating a common base class for the Queue<> classes and > > defining some virtual functions on that. > > A

Re: [gem5-dev] Review Request 3353: scons: fix building in non-standard locations

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3353/#review8065 --- Ship it! Ship It! - Andreas Hansson On Feb. 26, 2016, 12:56 a.m

Re: [gem5-dev] Review Request 3347: mem: Adjust cache queue reserve to more conservative values

utomatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3347/#review8056 ----------- On Feb. 24, 2016, 9:28 a.m., Andreas Hansson wrote: > > --- > This

Re: [gem5-dev] Review Request 3335: configs: Add a lat_mem_rd style test script

extend the functionality. Diffs (updated) - configs/dram/lat_mem_rd.py PRE-CREATION util/dram_lat_mem_rd_plot.py PRE-CREATION Diff: http://reviews.gem5.org/r/3335/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5

[gem5-dev] changeset in gem5: base: Fix gpu-compute output stream creation

changeset 1bd9f1b27438 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=1bd9f1b27438 description: base: Fix gpu-compute output stream creation Match changes in output stream. diffstat: src/gpu-compute/compute_unit.cc | 2 +- src/gpu-compute/gpu_tlb.cc

Re: [gem5-dev] Review Request 3335: configs: Add a lat_mem_rd style test script

p://reviews.gem5.org/r/3335/#review8055 --- On Feb. 15, 2016, 9:01 a.m., Andreas Hansson wrote: > > --- > This is an automatically generated e-mail. T

Re: [gem5-dev] Review Request 3346: mem: Create a separate class for the cache write buffer

ache/queue_entry.hh PRE-CREATION > src/mem/cache/write_queue.hh PRE-CREATION > src/mem/cache/write_queue.cc PRE-CREATION > src/mem/cache/write_queue_entry.hh PRE-CREATION > src/mem/cache/write_queue_entry.cc PRE-CREATION > > Diff: http://reviews.gem5.org/r/3346/diff/ > > > Testing > --- > > > Thanks, > > Andreas Hansson > > ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Cache patches

Hi all, I’d like to make progress on the following patches, and will proceed and push them next week if there are no objections. Let me know if you need more time. # lat_mem_rd without a CPU (i.e. very fast) http://reviews.gem5.org/r/3335/ # Cache simplification to enable future write

Re: [gem5-dev] Follow-up: Removing QueuedSlavePort from DRAMCtrl

ce is that the >DRAMCtrl now implements a SlavePort with flow control consistent with the >rest of gem5, so if there are no buffer slots available, the request is >nacked and a retry must be sent (i.e. a token is returned). > > >Please don't get rid of the Queued*Ports, as I think th

Re: [gem5-dev] Review Request 3337: gpu-compute: fix uninitialized value error.

> On Feb. 23, 2016, 8:23 a.m., Andreas Hansson wrote: > > It would be good if someone could run this with ubsan and asan. > > > > Also, if we all agree that 'gpu-compute' is indeed the most sensible > > keyword we should add it to the list. Something shorted and

[gem5-dev] Review Request 3348: mem: Adopt a more sensible cache class hierarchy

are also removed in the process. Diffs - src/mem/cache/base.hh ef6e57ac0d70 src/mem/cache/base.cc ef6e57ac0d70 src/mem/cache/cache.hh ef6e57ac0d70 src/mem/cache/cache.cc ef6e57ac0d70 Diff: http://reviews.gem5.org/r/3348/diff/ Testing --- Thanks, Andreas Hansson

[gem5-dev] Review Request 3349: mem: Remove unused cache stats

11355:0c90bc87d62e --- mem: Remove unused cache stats Prune cache stats that are never actually used. Diffs - src/mem/cache/base.hh ef6e57ac0d70 src/mem/cache/base.cc ef6e57ac0d70 Diff: http://reviews.gem5.org/r/3349/diff/ Testing --- Thanks, Andreas

[gem5-dev] Review Request 3346: mem: Create a separate class for the cache write buffer

/write_queue_entry.hh PRE-CREATION src/mem/cache/write_queue_entry.cc PRE-CREATION Diff: http://reviews.gem5.org/r/3346/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5

[gem5-dev] Review Request 3347: mem: Adjust cache queue reserve to more conservative values

Diff: http://reviews.gem5.org/r/3347/diff/ Testing --- Thanks, Andreas Hansson ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] changeset in gem5: stats: Update stats to reflect forwarding of ...

changeset 31c5786945b4 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=31c5786945b4 description: stats: Update stats to reflect forwarding of InvalidateReq diffstat: tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/stats.txt | 5256

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