Hi. For those who don't know me, I used to contribute to gem5 a few years
ago. There has been some nascent gem5 related activity at Google, and given
my background I've been asked to help send bug fixes back upstream, answer
questions, etc. You may see some activity from me in that capacity in the
If you aren't in 64 bit mode, or you are and the instruction had the
address size prefix, virtual addresses are at most 32 bits long.
Gabe
On Sat, Nov 8, 2014 at 8:58 PM, Mohammad Alian via gem5-dev
gem5-dev@gem5.org wrote:
Hello,
I found the error source. This assertion goes up when the
Do you have a small test program that demonstrates the bug? If so, please
send it to me.
Gabe
On Sat, Nov 8, 2014 at 10:00 AM, Ahmed Khawaja via gem5-dev
gem5-dev@gem5.org wrote:
Greetings,
I am trying to run an SSE-enabled program through GEM5 in SE mode
and
I get an error
Thanks. I'm pretty sure I'll be fixing my own bug which is why I
volunteered.
Gabe
On Mon, Nov 10, 2014 at 12:24 AM, Andreas Hansson via gem5-dev
gem5-dev@gem5.org wrote:
Welcome back Gabe.
Can you fix my bugs as well? :-)
On 10/11/2014 04:58, Gabe Black via gem5-dev gem5-dev@gem5.org
It might be worth thinking about the mem directory name in general as
well. A couple of the things in there are actually memory, but the
directory seems to be for a more general class of stuff. For instance,
interconnect isn't a type of memory, and it doesn't necessarily connected
to memory
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On Nov. 15, 2014, 12:20 p.m., Andreas Hansson wrote:
Double post: http://reviews.gem5.org/r/2481/ ?
Yep.
- Gabe
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Could someone reauthorize my ssh key please? It's on repo.gem5.org in my
homedir as gem5_rsa.pub.
Gabe
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We're trying to model a graphics device hooked up to VNC that has its own
framebuffer memory mapped through a PCI BAR, unlike the ARM graphics device
which uses DMA. We're also trying to use the KVM CPU model to fast forward
to a point of interest. Unfortunately, if we have the VM exit every time
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And found a bug. Update coming.
- Gabe Black
On Nov. 17, 2014, 6:44
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changeset cd107abe79dd in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=cd107abe79dd
description:
x86: Fix the CPUID Long Mode Address Size function.
The value in EAX has an 8 bit field for the linear address size and one
for
the physical address size
changeset 45204db420c0 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=45204db420c0
description:
x86: Update the stats for the x86 FS o3 boot test.
diffstat:
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini|
8 +-
changeset 9f100bac04f1 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=9f100bac04f1
description:
x86: APIC: Fix the getRegArrayBit function.
The getRegArrayBit function extracts a bit from a series of registers
which
are treated as a single large bit
changeset 7be879ff600c in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=7be879ff600c
description:
x86: APIC: Only set deliveryStatus if our IPI is going somewhere.
Otherwise the IPI which isn't sent will never arrive, and the
deliveryStatus
bit will
changeset 8fb2884b0a75 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=8fb2884b0a75
description:
x86: Fix some bugs in the real mode far jmp instruction.
The far pointer should be shifted right to get the selector value, not
left.
Also, when
changeset 049273bc03f6 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=049273bc03f6
description:
x86: Fix setting segment bases in real mode.
The data size used for actually writing the base value for the segment
was the
default size, but really it
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changeset f66948658a36 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=f66948658a36
description:
vnc: Add a conversion function for bgr888.
diffstat:
src/base/vnc/convert.cc | 31 +--
src/base/vnc/convert.hh | 7 +++
2 files
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changeset 288eb5ee4b00 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=288eb5ee4b00
description:
dev: Use fixed size member variables to describe fixed size PL111
registers.
diffstat:
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1 files changed, 12
On Nov. 18, 2014, 2:54 a.m., Ali Saidi wrote:
This will break compilation on non-linux platforms, so if we need something
like this, it will need to have two checks, one that kvm is possible, and
the other that it's enabled.
However, that alone doesn't solve the problem because the
I think there were cases where the ELF loader was used to load to actual
physical addresses in FS mode. I don't remember the specifics.
Gabe
On Tue, Nov 18, 2014 at 8:21 AM, Nilay Vaish via gem5-dev gem5-dev@gem5.org
wrote:
I checked the elf-64 draft and I think you right. But I am not able
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On Nov. 19, 2014, 4:45 p.m., Andreas Sandberg wrote:
src/dev/x86/Pc.py, line 54
http://reviews.gem5.org/r/2515/diff/1/?file=42652#file42652line54
I might be confused by the weird semantics of the gem5 configuration
scripts, but isn't this killing the fake device for port 0x80?
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details: http://repo.gem5.org/gem5?cmd=changeset;node=6317351a288c
description:
x86: Update stats for the new Linux delay port.
diffstat:
tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini|
44 ++-
changeset a4d0e8c2869c in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a4d0e8c2869c
description:
x86: pc: Put a stub IO device at port 0xed which the kernel can use for
delays.
There was already a stub device at 0x80, the port traditionally used
for an IO
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I should add a Google copyright to this...
- Gabe Black
On Nov. 22,
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On Nov. 19, 2014, 4:39 p.m., Andreas Sandberg wrote:
src/cpu/kvm/vm.hh, line 354
http://reviews.gem5.org/r/2510/diff/1/?file=42635#file42635line354
Would it make sense to rename this to mapMemSlot? In my opinion, that'd
be more descriptive.
No, I don't think so. A slot isn't
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changeset f9fb64a72259 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=f9fb64a72259
description:
config: ruby: Get rid of an eval and an exec operating on generated
code.
We can get the same result using importlib.
diffstat:
configs/ruby/Ruby.py | 13
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Per the review process documentation on the wiki, if nobody comments on
On Nov. 23, 2014, 2:28 p.m., Andreas Hansson wrote:
ISA is not a keyword at the moment (perhaps it should be), as per
http://www.gem5.org/Commit_Access
For the rest it looks good from my side.
In my defense there didn't use to be a list. I'll use arch I guess.
- Gabe
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Please take a look at 2506 as well.
- Gabe Black
On Nov. 23, 2014,
should have some minimum time on review board as well as a maximum
time.
If everyone agrees that these informal customs should be made official, I
can add them to the wiki.
Steve
On Sun, Nov 23, 2014 at 6:20 AM, Gabe Black via gem5-dev
gem5-dev@gem5.org
wrote
On Nov. 23, 2014, 7:37 p.m., Steve Reinhardt wrote:
Looks like importlib is only available in 2.7
(https://docs.python.org/2/library/importlib.html), and according to
http://gem5.org/Dependencies we still support 2.5 and 2.6 as well. Is that
accurate? In isolation, this seems
Which ISA?
Gabe
On Mon, Nov 24, 2014 at 10:58 AM, Mike Upton via gem5-dev gem5-dev@gem5.org
wrote:
I am running CPU2006 benchmarks, and hit a few unimplemented syscalls.
For example: omnetpp
Fatal: syscall unlinkat (#35) unimplemented.
@ tick 958189000
I modified the src following the
Can someone clarify why the checker CPU only handles faults in FS mode?
There are legitimate reasons for a fault to happen in SE mode too, I think,
although I can't point to a specific example off the top of my head.
Gabe
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I'm working on adding remote GDB support for x86, and I've noticed a couple
of rough edges I'd like to smooth out somehow.
First, when GDB attaches, a pollEvent will be added which will give the GDB
stub control immediately. The context being interrupted might not be on an
instruction boundary.
-step mode on the CPU model.
I can try and post those patches tomorrow (sans clean-up) if you think
they'd be helpful.
Steve
On Mon, Nov 24, 2014 at 9:51 PM, Gabe Black via gem5-dev
gem5-dev@gem5.org
wrote:
I'm working on adding remote GDB support for x86, and I've noticed a
couple
and implement a
real
single-step mode on the CPU model.
I can try and post those patches tomorrow (sans clean-up) if you think
they'd be helpful.
Steve
On Mon, Nov 24, 2014 at 9:51 PM, Gabe Black via gem5-dev
gem5-dev@gem5.org
wrote:
I'm working on adding remote GDB support for x86
Hi folks. I've seen VNC related errors a couple of times which look like
the following:
gem5.opt: build/X86/base/vnc/vncserver.cc:382: void
VncServer::checkProtocolVersion(): Assertion `len == 12' failed.
Any idea what that's from? It's not annoying enough to spend time digging
into it, but it
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Hi folks. I have a few reviews up for GDB support for x86. It should be
tested more since I touched the GDB support for all the other ISAs as well
and haven't tested them more than that they still compile. I've tested
using GDB to look around a 64 bit x86 kernel a little under the simple
atomic
On Nov. 26, 2014, 10:45 a.m., Andreas Hansson wrote:
I thought the style guide said there were supposed to be spaces around
operators and assignments, or am I missing something?
I don't think the style guide says, or at least not that I see. I may be
tending to the style we use at work.
On Nov. 26, 2014, 10:49 a.m., Andreas Hansson wrote:
src/dev/x86/i8042.cc, line 261
http://reviews.gem5.org/r/2520/diff/1/?file=42720#file42720line261
for (auto k : keys)
bufferData(k, 1)
What is this sorcery? :-) Seriously though, what's this from? Does gcc 0.1 or
On Nov. 26, 2014, 10:45 a.m., Andreas Hansson wrote:
I thought the style guide said there were supposed to be spaces around
operators and assignments, or am I missing something?
Gabe Black wrote:
I don't think the style guide says, or at least not that I see. I may be
tending to
I already fixed it. The change should be checked in, I think.
Gabe
On Nov 26, 2014 5:52 AM, Andreas Sandberg via gem5-dev gem5-dev@gem5.org
wrote:
I just ran into some issues with kvm on x86. It seems like changeset
1bd64b294fe4 (x86: add LongModeAddressSize function to cpuid) breaks
Linux
I feel like there should be a simple solution to this problem, but I
haven't had the time to really walk through your explanation and understand
it yet.
Gabe
On Fri, Nov 28, 2014 at 9:30 AM, Castillo Villar, Emilio via gem5-dev
gem5-dev@gem5.org wrote:
Hello,
The problem is that the first
.
Thank you all for your hard work on this wonderful tool!!
Best regards,
Emilio
De: gem5-dev [gem5-dev-boun...@gem5.org] en nombre de Gabe Black via
gem5-dev [gem5-dev@gem5.org]
Enviado: viernes, 28 de noviembre de 2014 21:33
Para: gem5 Developer
Hi folks. I don't know whether the opengrok thing is still up and running,
but there's still a link to it on the home page and it doesn't work.
Gabe
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to in the near term which should address the issue. For the
moment I’ve restarted tomcat and it seems to be working.
Ali
On Nov 28, 2014, at 8:50 PM, Gabe Black via gem5-dev gem5-dev@gem5.org
wrote:
Hi folks. I don't know whether the opengrok thing is still up and
running,
but there's still a link
nombre de Gabe Black via
gem5-dev [gem5-dev@gem5.org]
Enviado: viernes, 28 de noviembre de 2014 21:33
Para: gem5 Developer List
Asunto: Re: [gem5-dev] Issue with O3 and interrupts
I feel like there should be a simple solution to this problem, but I
haven't had the time to really walk through
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De: gem5-dev [gem5-dev-boun...@gem5.org] en nombre de Gabe Black via
gem5-dev [gem5-dev@gem5.org]
Enviado: viernes, 28 de noviembre de 2014 21:33
Para: gem5 Developer List
Asunto: Re: [gem5-dev] Issue with O3 and interrupts
I feel like there should be a simple solution
On Nov. 30, 2014, 6:38 p.m., Nilay Vaish wrote:
I do not see much value though, but I am fine with patch.
The ChromeOS kernel needs lots of command line arguments, both to configure the
kernel and to leave information for the system at large. This is so we don't
have to have a custom hack
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I wasn't able to test this because I couldn't get hello world to run
One of the last things I did the last time I was working on gem5 was to
merge the SE and FS builds of the simulator into one. I didn't really
finish it before I left, though, and in a lot of ways it's still more like
SE and FS glued together than one simulator that happens to do both.
The work
X86LinuxSESystem is a better name.
Gabe
On Mon, Dec 1, 2014 at 3:05 AM, Gabe Black gabebl...@google.com wrote:
One of the last things I did the last time I was working on gem5 was to
merge the SE and FS builds of the simulator into one. I didn't really
finish it before I left, though, and in
changeset 9a4a926f7fe1 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=9a4a926f7fe1
description:
dev: Support translating left and right ALT keys.
This is used primarily for VNC.
diffstat:
src/dev/ps2.cc | 7 +++
1 files changed, 7 insertions(+), 0
changeset 24abf21b548d in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=24abf21b548d
description:
ide: Accept the IDLE (0xe3) ATA command.
This command is supposed to set up a timer which will put the drive
into a
standby mode if it isn't sent a
Ah, darn it. I meant to update the tag before I pushed this. Sorry about
that.
Gabe
On Wed, Dec 3, 2014 at 2:59 AM, Gabe Black via gem5-dev gem5-dev@gem5.org
wrote:
changeset 24abf21b548d in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=24abf21b548d
description
changeset 145c436a3854 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=145c436a3854
description:
config: Get rid of some extra spaces around default arguments.
diffstat:
configs/common/FSConfig.py | 16 +++-
1 files changed, 7 insertions(+), 9
On Nov. 30, 2014, 6:38 p.m., Nilay Vaish wrote:
I do not see much value though, but I am fine with patch.
Gabe Black wrote:
The ChromeOS kernel needs lots of command line arguments, both to
configure the kernel and to leave information for the system at large. This
is so we don't
On Dec. 2, 2014, 5:47 p.m., Nilay Vaish wrote:
src/base/remote_gdb.hh, line 143
http://reviews.gem5.org/r/2538/diff/1/?file=42808#file42808line143
Should this not be divCeil() * sizeof(uint64_t)?
No. The size member reflects the size you asked for, not the size you got
which is
changeset 5962812f80fe in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=5962812f80fe
description:
sim: Make it possible to override the breakpoint length check.
The check which makes sure the length of the breakpoint being written
is the
same as a
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Ping
- Gabe Black
On Nov. 23, 2014, 2:51 p.m., Gabe Black wrote:
On Dec. 3, 2014, 11:42 a.m., Andreas Hansson wrote:
As this is quite invasive, how broadly would this be used? Also, is there
any chance of rather using devices that do not have memory of their own
(and rely on the normal system memory that is already mapped)?
The one example I'm aware
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On Dec. 2, 2014, 5:44 a.m., Steve Reinhardt wrote:
src/arch/isa_parser.py, line 1991
http://reviews.gem5.org/r/2505/diff/2/?file=42744#file42744line1991
update comment
I assume you mean just making it plural? The values do still have to be
constant or C++ will get angry.
On
changeset ad9146bb5598 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=ad9146bb5598
description:
x86: Clean up style in process.cc.
diffstat:
src/arch/x86/process.cc | 98
1 files changed, 49 insertions(+), 49
On Dec. 2, 2014, 6:26 a.m., Steve Reinhardt wrote:
It would be nice to actually test this code just to be sure nothing slipped
through, but style-wise it does look like an improvement.
I might spend some personal time (vs. work time) at some point seeing if I can
figure out what the
necessarily opposed, just
looking for more information.
Steve
On Tue, Dec 2, 2014 at 1:59 AM, Gabe Black via gem5-dev gem5-dev@gem5.org
wrote:
X86LinuxSESystem is a better name.
Gabe
On Mon, Dec 1, 2014 at 3:05 AM, Gabe Black gabebl...@google.com wrote:
One of the last things I did
to say more about it.
Steve
On Sun, Nov 23, 2014 at 6:51 AM, Gabe Black via gem5-dev
gem5-dev@gem5.org
wrote:
Hi everybody. I'd like to start a conversation about testing strategies
and
gem5. Please let me know if my understanding is out of date, but I think
the primary mechanism we use
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