Re: [gem5-dev] Mailing list archives non-public

if there are public copies otherwise. /bz On Tue, Apr 7, 2020 at 1:27 AM Bjoern A. Zeeb < bzeeb-li...@lists.zabbadoz.net> wrote: Hi, what’s the reason that mailing list archives for open source research projects are non-public? It’s really hard to reference gem5-dev discussions that way.

[gem5-dev] Mailing list archives non-public

Hi, what’s the reason that mailing list archives for open source research projects are non-public? It’s really hard to reference gem5-dev discussions that way. /bz ___ gem5-dev mailing list gem5-dev@gem5.org

Re: [gem5-dev] gem5 stable release proposal [PLEASE VOTE!]

On 16 Dec 2019, at 19:50, Jason Lowe-Power wrote: I think master should be development. I think gem5 should “”””release once per year (a release is not what you described the stable branch would be). I kept thinking ... feel free to ignore my 50 cents below: (i) I don’t want to fight

Re: [gem5-dev] name for fake linux

On 10 Dec 2019, at 17:14, Jason Lowe-Power wrote: One option is gem5Linux since it is kind of "gem5 flavored" Linux. SELinux isn't that bad. I doubt too many people will think that gem5 is implementing a secure linux ;). Other options: EmuLinux (surprisingly doesn't return anything on Google

[gem5-dev] Can X-Gerrit-MessageType be put into the subject?

Hi, following the gem5-dev emails is kind of hard by subject as you never know if a change was new and added, updated, or merged. That information is in the headers but reading those is even worse. If one splits the emails into different mail boxes doing that one loses track of the

Re: [gem5-dev] Gem5 Full System Crashes

On 3 Jun 2019, at 15:37, Stefan Waczynski wrote: I also saw an error in the terminal output when booting with AtomicSimpleCPU, but it did not seem to affect the booting process and functionality for the Atomic model: ACPI: Early table checksum verification disabled ACPI BIOS Error (bug): A

Re: [gem5-dev] Cron /z/m5/regression/do-regression --scratch all

On 27 May 2019, at 21:28, Cron Daemon wrote: * build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3: FAILED! * build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3-dual: FAILED! *

Re: [gem5-dev] separating OS initialization from the System simobjects

On 26 Aug 2017, at 20:11, Gabe Black wrote: Hi folks. Currently OS initialization in FS mode is intimately tied to the System simobjects, the objects which also act as a collection point for simobjects which belong to a particular computer/system. I'm planning to attempt to put together some

[gem5-dev] Review Request 3810: x86: adjust Walker::WalkerState::pageFault to not change mode

it for the walker. Diffs - src/arch/x86/pagetable_walker.cc 63325e5b0a9d Diff: http://reviews.gem5.org/r/3810/diff/ Testing --- The problematic code no longer triggers the panic and the OS in FS continues to boot. Thanks, Bjoern A. Zeeb

[gem5-dev] changeset in gem5: sim: fix build breakage in process.cc after b...

changeset d0586994a10e in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=d0586994a10e description: sim: fix build breakage in process.cc after brandon@11801 Seeing build breakage after brandon@11801: [ CXX] X86/sim/process.cc -> .o

[gem5-dev] changeset in gem5: dev: net/i8254xGBe add two more wakeup regist...

changeset de0de48a2d1c in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=de0de48a2d1c description: dev: net/i8254xGBe add two more wakeup registers to ignore There are drivers writing to WUFC uncondtionally of anything. In order to not panic gem5 in

[gem5-dev] changeset in gem5: arm: AArch64 report cache size correctly when...

changeset 61c625151d9a in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=61c625151d9a description: arm: AArch64 report cache size correctly when reading CTR_EL0 Trying to read MISCREG_CTR_EL0 on AArch64 returned 0 as is was not implmemented. With that

[gem5-dev] changeset in gem5: sim: Patch to fix the statfs build

changeset 30aada507f03 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=30aada507f03 description: sim: Patch to fix the statfs build See developers mailing list. Trying to unbreak statfs. Testing Done: Builds on FreeBSD now. Reviewed

[gem5-dev] changeset in gem5: scons: make build better on FreeBSD

changeset 83677ded6358 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=83677ded6358 description: scons: make build better on FreeBSD Various changes we found needed to build gem5 successfully on FreeBSD. Reviewed at

[gem5-dev] Review Request 3808: mem: fix printing of 1st cache tags line

readable: 1 dirty: 0 tag: f9a3 Diffs - src/mem/cache/cache.cc 63325e5b0a9d Diff: http://reviews.gem5.org/r/3808/diff/ Testing --- Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo

[gem5-dev] Can someone please commit these three?

Hi, getting these tiny things in and out of a tree is really helpful; could someone please commit them? http://reviews.gem5.org/r/3667/ (ARM, 3 months Ship it!) http://reviews.gem5.org/r/3791/ (e1000) http://reviews.gem5.org/r/3378/ (seems everyone is fine with it now) Thanks, Bjoern

[gem5-dev] Review Request 3804: sim: fix build breakage in process.cc after brandon@11801

.cc 63325e5b0a9d Diff: http://reviews.gem5.org/r/3804/diff/ Testing --- Compiles now on FreeBSD 10 with clang. Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Compilation error for gem5 after statfs change

On 2 Feb 2017, at 16:31, Bjoern A. Zeeb wrote: Hi, OK, I updated the diff. Can everyone please check if the diff from http://reviews.gem5.org/r/3803/ works for you now? /bz ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman

[gem5-dev] Review Request 3803: sim: Patch to fix the statfs build

mailing list. Trying to unbreak statfs. Diffs - src/sim/syscall_emul.hh 63325e5b0a9d Diff: http://reviews.gem5.org/r/3803/diff/ Testing --- Builds on FreeBSD now. Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org

Re: [gem5-dev] Review Request 3378: scons: make build better on FreeBSD

/3378/diff/ Testing --- Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Compilation error for gem5 after statfs change

see and update the patch. Am 25.01.2017 um 00:46 schrieb Bjoern A. Zeeb <bzeeb-li...@lists.zabbadoz.net>: On 24 Jan 2017, at 22:08, Jason Lowe-Power wrote: Hi Brandon, I think this is a "real" bug: http://qa.gem5.org//1905/compiling-problem-gem5-mac-os-10-11-6-scons-build-ar

Re: [gem5-dev] Compilation error for gem5 after statfs change

solution here? Cheers, Jason On Tue, Jan 24, 2017 at 5:46 PM Bjoern A. Zeeb < bzeeb-li...@lists.zabbadoz.net> wrote: On 24 Jan 2017, at 22:08, Jason Lowe-Power wrote: Hi Brandon, I think this is a "real" bug: http://qa.gem5.org//1905/compiling-problem-gem5-mac-os-10-11-6

[gem5-dev] Review Request 3791: dev: net/i8254xGBe add two more wakeup registers to ignore

Diff: http://reviews.gem5.org/r/3791/diff/ Testing --- Booted in FS with such a driver revision which would previously panic and now boots fine. Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo

Re: [gem5-dev] Compilation error for gem5 after statfs change

On 24 Jan 2017, at 22:08, Jason Lowe-Power wrote: Hi Brandon, I think this is a "real" bug: http://qa.gem5.org//1905/compiling-problem-gem5-mac-os-10-11-6-scons-build-arm-gem5-opt. I think there are a few more places that need an #ifdef NO_STATFS. Could you look into it and post a patch if

Re: [gem5-dev] changeset in gem5: syscall_emul: implement fallocate

On 15 Dec 2016, at 18:17, Brandon Potter wrote: changeset f9aa72424274 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=f9aa72424274 description: syscall_emul: implement fallocate Same problem here; you are calling fallocate() which is a linux specific function

Re: [gem5-dev] changeset in gem5: syscall_emul: add support for x86 statfs syst...

On 15 Dec 2016, at 18:17, Brandon Potter wrote: changeset deaf82fd2e7c in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=deaf82fd2e7c description: syscall_emul: add support for x86 statfs system calls Does this compile on anything but Linux? statfs.h doesn’t

Re: [gem5-dev] x86 MinorCPU Branch Prediction

On 9 Dec 2016, at 16:56, Jason Lowe-Power wrote: Hi Bjoern, It's not fully tested, and I don't think everything works perfectly. However, I've had pretty good luck running simple benchmarks with it. Ok, a first FS run wasn’t exactly happy. And now it’s possibly the time to go back to the

Re: [gem5-dev] x86 MinorCPU Branch Prediction

On 9 Dec 2016, at 16:56, Jason Lowe-Power wrote: Hi Bjoern, It's not fully tested, and I don't think everything works perfectly. Well, that’s true for more gem5 X86 things ;-) However, I've had pretty good luck running simple benchmarks with it. Great; I’ll give it a go and see. The

Re: [gem5-dev] x86 MinorCPU Branch Prediction

On 23 Nov 2016, at 4:05, Ayaz Akram wrote: Hi, I had posted a problem that I faced with x86 minor cpu regarding branch prediction on gem5 users mailing list (link of that post is given below): sorry for hijacking this; how do you get MinorCPU running on X86? I added printf during

Re: [gem5-dev] Review Request 3690: x86, ext: fix buf overflow in fp80 ops; pad fp80_t in fputils

workaround. I can say that gem5 does no longer panic when booting FreeBSD FS with this patch applied. I cannot say whether it works correctly currently. However it improves the situation :) - Bjoern A. Zeeb On Nov. 1, 2016, 7:36 p.m., Tony Gutierrez wrote

[gem5-dev] changeset in gem5: arm, dev: pl011 console interactivity

changeset 6281479f9713 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=6281479f9713 description: arm, dev: pl011 console interactivity Improve PL011 console interactivity Signed-off-by: Jason Lowe-Power diffstat:

[gem5-dev] Review Request 3667: arm: AArch64 report cache size correctly when reading CTR_EL0

9c7b55faea5d Diff: http://reviews.gem5.org/r/3667/diff/ Testing --- Checked on FreeBSD boots with extra printfs; also observed a reduction of a factor of about 10 in instruction fetches for a simple micro-test. Thanks, Bjoern A. Zeeb

Re: [gem5-dev] Review Request 3623: arm, dev: pl011 console interactivity

ld take up to 15(?) additional charatcers to get previously pasted command lines echoed and executed. I have a possible report about similar behaviour from people at ARM on Linux (uncofirmed) and I am putting the patch up so they can test. Thanks, Bjoe

Re: [gem5-dev] Review Request 3623: arm, dev: pl011 console interactivity

ew8711 --- On Sept. 5, 2016, 10:22 p.m., Bjoern A. Zeeb wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3623/ >

Re: [gem5-dev] Review Request 3623: arm, dev: pl011 console interactivity

------- On Sept. 5, 2016, 10:22 p.m., Bjoern A. Zeeb wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3623/ > ---

[gem5-dev] Review Request 3623: arm, dev: pl011 console interactivity

ut similar behaviour from people at ARM on Linux (uncofirmed) and I am putting the patch up so they can test. Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] X86 RSP return address (after MemWrite) not yet updated issue?

On 25 Aug 2016, at 22:09, Andreas Hansson wrote: Hi all, Thanks a lot for that reply. Two thoughts: 1. Does X86 + o3 + classic memory system actually work? 2. The interleaving of “real” timing accesses and the functional “debug” accesses is not well defined. In general I would encourage

Re: [gem5-dev] Fault handling issue

On 19 Aug 2016, at 17:45, Rodolfo Guilherme Wottrich wrote: Hi Rodolfo, how did you solve this (code wise). I am trying to hunt down an undelivered Page Fault on x86 FS and another problem only showing up as I add more caches (e.g., a L2) and I am just curious about all kinds of x86

[gem5-dev] X86 RSP return address (after MemWrite) not yet updated issue?

Hi, I was trying to skip FreeBSD’s DELAY() on X86_64 very much like we do on ARM for Linux (or FreeBSD for that matter) and started to implement things and found a strange behaviour: From my src/arch/x86/utility.cc void skipFunction(ThreadContext *tc) { PCState newPC = tc->pcState();

Re: [gem5-dev] changeset in gem5: x86, sim: add some syscalls to X86

On 6 Aug 2016, at 7:48, Andreas Hansson wrote: No worries. The distributed gem5 build farm strikes again. Typically building on OSX with clang serves as a good check since it more or less pareto-dominates in terms of pickiness. I guess I should submit my remaining build-on-FreeBSD changes

Re: [gem5-dev] Let's retire some ISAs

> On 06 Jun 2016, at 19:05 , Beckmann, Brad wrote: > Hi, > As others have already pointed out, there is still significant industry > support for MIPS, SPARC, and POWER. Perhaps an argument could be made > against ALPHA, but how hard is that ISA to maintain? Also

Re: [gem5-dev] Review Request 3378: scons: make build better on FreeBSD

> On April 13, 2016, 4:03 p.m., Andreas Hansson wrote: > > SConstruct, line 639 > > <http://reviews.gem5.org/r/3378/diff/2/?file=54872#file54872line639> > > > > Surely this is included by default?! > > Bjoern A. Zeeb wrote: > clang -cc1 -v /dev

Re: [gem5-dev] Review Request 3378: scons: make build better on FreeBSD

de/clang/3.4.1 /usr/include End of search list. - Bjoern A. --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3378/#review8200 --- On April 13, 2016, 2:18 p.m., Bjoern A. Zeeb wrote: > > -

[gem5-dev] changeset in gem5: config, x86: Properly space pad the X86IntelM...

changeset fc247b9c42b6 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=fc247b9c42b6 description: config, x86: Properly space pad the X86IntelMPBus Entry descriptions According to the Intel Multi Processor Specification rev 1.4 (-006) (*), section

[gem5-dev] changeset in gem5: arm, dev: PL011 UART_FR read status enhancement

changeset 2af4c6a4f3f5 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=2af4c6a4f3f5 description: arm,dev: PL011 UART_FR read status enhancement Given we do not simulate a FIFO currently there are only two states we can be in upon read: empty or full.

[gem5-dev] changeset in gem5: x86, dev: properly space the APIC registers

changeset 8b23edf06cd3 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=8b23edf06cd3 description: x86, dev: properly space the APIC registers Registers are 0x10 and not 0x8 apart. The latter leads to invalid calculations of index in array which in

[gem5-dev] changeset in gem5: dev, virtio: properly set PCI address space t...

changeset c926270c33c8 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=c926270c33c8 description: dev, virtio: properly set PCI address space to use IOREG VirtIO spec < 1.0 demands IOREG to be used on PCI and not memory mapped. Set the correct bit on

Re: [gem5-dev] Review Request 3375: arm, dev: add (dummy) ISecR support to the PL390 GIC

in that case, so no need to store additional state. > > Bjoern A. Zeeb wrote: > Well the problem seems to be that a pfr(1) returns with & 0x00f0 > being true, which is how FreeBSD (and probably everyone else) would detect > whether SecExt are present. So I assume we sh

[gem5-dev] Review Request 3466: dev, virtio: properly set PCI address space to use IOREG

ing --- Booted FreeBSD X86, armv7, and arm64 with a VirtIO disk. Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3454: misc: Appease clang-3.4.1

> On April 26, 2016, 8:54 p.m., Bjoern A. Zeeb wrote: > > This was fixed in HEAD after I noticed that we aren't spec compliant; but > > older versions indeed need the cast. > > > > I am currently using at least an #ifdef here: > > > > --- a/src/sim/ini

Re: [gem5-dev] Review Request 3454: misc: Appease clang-3.4.1

act version number should be. - Bjoern A. Zeeb On April 26, 2016, 6:02 p.m., Pierre-Yves Péneau wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.

Re: [gem5-dev] Review Request 3194: config, x86: Properly space pad the X86IntelMPBus Entry descriptions.

s.gem5.org/r/3194/diff/ Testing --- Booting FreeBSD in FS mode no longer complains about unknown busses "PCI" and "ISA". Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Does anyone care about X86 ISA simulations?

On Wed, 13 Apr 2016, Steve Reinhardt wrote: Hi, Everything else you mention sounds like a real bug though. FP support (esp. x87 rather than SSE) has never been all that solid. Are you using my locked access patch (http://reviews.gem5.org/r/2691/)? If not, atomic accesses are not truly

[gem5-dev] changeset in gem5: arm, dev: remove PMU assertion hit on reset

changeset 717172baf4dd in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=717172baf4dd description: arm,dev: remove PMU assertion hit on reset Remve the assertion that we always need to add a delta larger than zero as that does not seem to be true when

[gem5-dev] changeset in gem5: mem: FreeBSD does not provide MAP_NORESERVE e...

changeset ae6e3dd1c32c in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=ae6e3dd1c32c description: mem: FreeBSD does not provide MAP_NORESERVE either Like OS X, FreeBSD does not support MAP_NORESERVE. Handle accordingly and update comment.

Re: [gem5-dev] Review Request 2691: mem: implement x86 locked accesses in timing-mode classic cache

afterwards. - Bjoern A. Zeeb On Jan. 19, 2016, 3:46 a.m., Steve Reinhardt wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem

Re: [gem5-dev] Review Request 3378: scons: make build better on FreeBSD

9c7b55faea5d tests/SConscript 9c7b55faea5d Diff: http://reviews.gem5.org/r/3378/diff/ Testing --- Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3194: Properly space pad the X86IntelMPBus Entry descriptions.

b55faea5d Diff: http://reviews.gem5.org/r/3194/diff/ Testing --- Booting FreeBSD in FS mode no longer complains about unknown busses "PCI" and "ISA". Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3447: x86, dev: properly space the APIC registers

/x86/interrupts.cc 9c7b55faea5d Diff: http://reviews.gem5.org/r/3447/diff/ Testing --- Testing done on FreeBSD amd64 FS boot. Testing not done for Linux. Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman

Re: [gem5-dev] Review Request 3194: Properly space pad the X86IntelMPBus Entry descriptions.

ng the note about "space padded to 6 bytes". - Bjoern A. --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3194/#review7494 -----

Re: [gem5-dev] Does anyone care about X86 ISA simulations?

On Mon, 11 Apr 2016, Jason Lowe-Power wrote: Hi Jason, thanks for that quick reply. There are a number of people who use x86 with gem5. Personally, I use x86 almost exclusively. As I'm sure you know, the initial full-system support was geared towards Linux. My experience is that x86+Linux

Re: [gem5-dev] Review Request 3378: scons: make build better on FreeBSD

-------- On March 15, 2016, 5:01 p.m., Bjoern A. Zeeb wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3378/ > -

Re: [gem5-dev] Review Request 3376: arm, dev: PL011 UART_FR read status enhancement

376/#review8089 --- On March 15, 2016, 4:59 p.m., Bjoern A. Zeeb wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > htt

Re: [gem5-dev] Review Request 3377: arm, dev, config: always preent the PMU but add option to enable

. Diffs (updated) - configs/common/Options.py 2fd64ea0a7cb configs/example/fs.py 2fd64ea0a7cb src/arch/arm/ArmISA.py 2fd64ea0a7cb Diff: http://reviews.gem5.org/r/3377/diff/ Testing --- Thanks, Bjoern A. Zeeb ___ gem5-dev mailing

Re: [gem5-dev] Review Request 3375: arm, dev: add (dummy) ISecR support to the PL390 GIC

ly generated e-mail. To reply, visit: http://reviews.gem5.org/r/3375/#review8090 --- On March 15, 2016, 4:58 p.m., Bjoern A. Zeeb wrote: > > --- > Thi

Re: [gem5-dev] Review Request 3377: arm, dev, config: always preent the PMU but add option to enable

reply, visit: http://reviews.gem5.org/r/3377/#review8088 --- On March 15, 2016, 5 p.m., Bjoern A. Zeeb wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3377/ > -

[gem5-dev] Review Request 3378: scons: make build better on FreeBSD

build better on FreeBSD Various changes we found needed to build gem5 successfully on FreeBSD. Diffs - SConstruct 2fd64ea0a7cb Diff: http://reviews.gem5.org/r/3378/diff/ Testing --- Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5

[gem5-dev] Review Request 3377: arm, dev, config: always preent the PMU but add option to enable

/arch/arm/ArmISA.py 2fd64ea0a7cb Diff: http://reviews.gem5.org/r/3377/diff/ Testing --- Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3376: arm, dev: PL011 UART_FR read status enhancement

src/dev/arm/pl011.cc 2fd64ea0a7cb Diff: http://reviews.gem5.org/r/3376/diff/ Testing --- Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3375: arm, dev: add (dummy) ISecR support to the PL390 GIC

happily. Diffs - src/dev/arm/gic_pl390.hh 2fd64ea0a7cb src/dev/arm/gic_pl390.cc 2fd64ea0a7cb Diff: http://reviews.gem5.org/r/3375/diff/ Testing --- Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org

[gem5-dev] Review Request 3372: mem: FreeBSD does not provide MAP_NORESERVE either

does not provide MAP_NORESERVE either Like OS X, FreeBSD does not support MAP_NORESERVE. Handle accordingly and update comment. Diffs - src/mem/physical.cc 2fd64ea0a7cb Diff: http://reviews.gem5.org/r/3372/diff/ Testing --- Thanks, Bjoern A. Zeeb

Re: [gem5-dev] Review Request 3196: tcp_iface.cc does not compile on FreeBSD

290. - Bjoern A. --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3196/#review7498 --- On Nov. 4, 2015, 2:39 p.m., Bjoer

Re: [gem5-dev] Review Request 3248: arm: Ship Linux device trees with gem5

> On Feb. 15, 2016, 10:14 p.m., Bjoern A. Zeeb wrote: > > There are systems when you actually want to keep the pre-processed .dts > > files around; e.g. not supporting the boot loader bits I can compile the > > DT into the kernel from the DTS files. > > > >

Re: [gem5-dev] Review Request 3248: arm: Ship Linux device trees with gem5

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3248/#review8018 --- Ship it! Ship It! - Bjoern A. Zeeb On Dec. 8, 2015, 10:59 a.m

Re: [gem5-dev] Review Request 3248: arm: Ship Linux device trees with gem5

> On Feb. 15, 2016, 10:14 p.m., Bjoern A. Zeeb wrote: > > There are systems when you actually want to keep the pre-processed .dts > > files around; e.g. not supporting the boot loader bits I can compile the > > DT into the kernel from the DTS files. > > > >

Re: [gem5-dev] Review Request 3248: arm: Ship Linux device trees with gem5

ss_gem5_v1.dtsi $(call GEN_DTS,vexpress_gem5_v1.dtsi,$*) + cp -p $@ . %.dtb: .gen/%.dts $(DTC) -I dts -O dtb -o $@ $< @@ -60,4 +62,4 @@ all: $(TARGETS) clean: $(RM) -r .gen - $(RM) *.dtb + $(RM) *.dtb armv?_gem5_v1_*.dts - Bjoern A. Zeeb On Dec. 8, 20

Re: [gem5-dev] tinderbox? building universe?

Hi, private reply. > On 03 Jan 2016, at 10:50 , Andreas Hansson wrote: > > Hi Bjoern, > > All architectures are built and tested on a daily basis, but unfortunately > only using gcc 4.7 at this point. This is done by the util/regress script, > which by default builds

[gem5-dev] tinderbox? building universe?

Hi, trying to build MIPS I noticed that certain architectures are simply ignored? # grep takeOverFrom src/arch/*/tlb.hh src/arch/alpha/tlb.hh:void takeOverFrom(BaseTLB *otlb) override {} src/arch/arm/tlb.hh:void takeOverFrom(BaseTLB *otlb) override; src/arch/arm/tlb.hh: * port

[gem5-dev] changeset in gem5: util: term: drop CC from Makefile

changeset 8b3c0bd14c01 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=8b3c0bd14c01 description: util: term: drop CC from Makefile With clang there are systems without gcc being installed anymore and we should not rely on that. This patch drops CC

Re: [gem5-dev] Review Request 3195: gcc is not cc

you can just drop the line. Seems fine. - Bjoern A. --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3195/#review7537 -------

[gem5-dev] changeset in gem5: x86: cpuid: add family to warn() message

changeset b29d5816936f in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=b29d5816936f description: x86: cpuid: add family to warn() message doCpuid() has to identical warn messages about unimplemented functions. Add the family to the log message to

[gem5-dev] changeset in gem5: x86: pagetable walker: fix typo in comment

changeset 80e82ce1978d in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=80e82ce1978d description: x86: pagetable walker: fix typo in comment diffstat: src/arch/x86/pagetable_walker.cc | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diffs (12 lines): diff

Re: [gem5-dev] Review Request 3198: x86/cpuid.cc add "family" to warn() message to make them more useful

Description --- doCpuid() has to identical warn messages about unimplemented functions. Add the family to the log message to make them distinguishable. Diffs - src/arch/x86/cpuid.cc 2d1d51615e0e Diff: http://reviews.gem5.org/r/3198/diff/ Testing --- Thanks, Bjoern A. Zeeb

[gem5-dev] Review Request 3196: tcp_iface.cc does not compile on FreeBSD

tcp_iface.cc on FreeBSD we also need to include netinet/in.h. Do so conditinally for FreeBSD. Diffs - src/dev/tcp_iface.cc 2d1d51615e0e Diff: http://reviews.gem5.org/r/3196/diff/ Testing --- Compiles now. Thanks, Bjoern A. Zeeb

Re: [gem5-dev] Review Request 3196: tcp_iface.cc does not compile on FreeBSD

Description --- To compile tcp_iface.cc on FreeBSD we also need to include netinet/in.h. Do so conditinally for FreeBSD. Diffs - src/dev/tcp_iface.cc 2d1d51615e0e Diff: http://reviews.gem5.org/r/3196/diff/ Testing --- Compiles now. Thanks, Bjoern A. Zeeb

[gem5-dev] Review Request 3195: gcc is not cc

there are systems without "gcc" being installed anymore and we should not rely on that. Use "cc" instead and make it compile on these systems. Diffs - util/term/Makefile 2d1d51615e0e Diff: http://reviews.gem5.org/r/3195/diff/ Testing --- Tha

[gem5-dev] Review Request 3197: Fix typo

know .. Diffs - src/arch/x86/pagetable_walker.cc 2d1d51615e0e Diff: http://reviews.gem5.org/r/3197/diff/ Testing --- Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

Re: [gem5-dev] Review Request 3194: Properly space pad the X86IntelMPBus Entry descriptions.

de no longer complains about unknown busses "PCI" and "ISA". Thanks, Bjoern A. Zeeb ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3198: x86/cpuid.cc add "family" to warn() message to make them more useful

to identical warn messages about unimplemented functions. Add the family to the log message to make them distinguishable. Diffs - src/arch/x86/cpuid.cc 2d1d51615e0e Diff: http://reviews.gem5.org/r/3198/diff/ Testing --- Thanks, Bjoern A. Zeeb