Rudolf same trap that i had i few weeks ago ? you did a new installation of
protel ? and now when you place the layer stack legend you dont get the
layer informations ?
the solution is simple just right after the first left click while drawing
the layerstackup legend, press TAB and get the optio
fun with W2K and P99SE it ist much faster and more stable
Michael Schmitt
Michael,
It's 100% ok !
Effectively, after reinstalling P99 with a new OS,
i don't check the options for the Stack Legend !!
Thank you very much for your help !
Have a nice day,
Rudolf
R&D Engineer
Ph
Hey Folks ...
One uppon a time there was a Protel Eda Users Forum that was a goof adress
for Protel related questions and answers where tip and tricks were
discussed. But This Forum gets more and more a CHAT about OS related Stuff
(Linux vs M$), sometimes a kind of a war (like the Protel bug disc
We want to write an external converter from our Hf microstrip design tools
to import layout informations into Protel 99SE, by using the PCB 2.8 ASCII
File Format as temporary data exchange file.
Therefore we need to know how the Protel 2.8 ASCII File Format is structured
and how such PCB componen
Now to something completly different ...
I use Protel 99SE SP6 and i want to create / modify my design rules so that
there will be no drc errors if a pad and / or a track is touching the keep
out.
Imagine a pad placed inside the pcb-outline and keepout's but the outter
diameter of that pad is no
Tanks for the Infos that no one has a solution for that, so i guess protel
cannot handle this
Like Dennis already said, we also have mech1 for the real board outline and
the keepout just to make the router happy and control some stuff the way it
is layouted.
> -Original Message-
>
I cant believe what i have seen today ... after the PCB manufactor has
reported errors in gerber files
Protel 99SE SP6
Image a track surrounded by a polygon. The track has a 45 degree corner. on
the outter side protel(as seen in draft mode) places a short ARC at the
corner, but in GERBER (as se
> "I am Situs of Borg. Routing is futile. Your nets will be meandered".
No need to say anything more :-)
Michael
* Tracking #: 056C2ECE57509844BA603E4D43E2096A38AF92EA
*
A couple of years ago, when we switched from Eagle to Protel V3 we received
a tool called WINBRD20 that was delivered to us from Hoschar the Protel
distributor at that time (and now again?) with the complete Protel package.
With this tool we were able to convert ALL Eagle files to Protel files, b
Alt Gr means "Alternate Grafics" or in other words alternate
charakters/symbols.
Regards
Dipl.-Ing. (FH) Michael Schmitt
Baumer Ident GmbH
Entwicklung / Development Department
Hertzstr. 10
D-69469 Weinheim
Deutschland / Germany
Tel. +49 (0) 6201 9957 - 30
Fax. +49 (0) 6201 9957 - 99
E-Mai
Getting the SI tools running is still the same mess as getting the PLD Stuff
running. The documentation from Protel is more than bad. we gave up getting
PLD running and now use external Software.
Both PLD and SI look to me as they were nothing more than quick-hacks for
only one reason, "we must
After a big crash a had to reinstall my whole system from scratch (fdisk
...).
running Win98SE & P99SE Sp6 i did a reinstall of the P99SE install cd
including SP2 and installed SP6 directly. now when i try to use in pcb mode
under Tools -> LayerStackUpLegend i can draw the outline, but all that w
michael
> -Ursprüngliche Nachricht-
> Von: Considered Solutions [mailto:[EMAIL PROTECTED]]
> Gesendet: Montag, 8. April 2002 11:22
> An: Protel EDA Forum
> Betreff: Re: [PEDA] P99SE LayerStackUpAnalyzer does not work afetr
> reinstall
>
>
> On 10:12 AM 8/04/2002 +0
My current design has the following rule
clearance (Board) to (Board) Different Nets Gap 7mil
but for manufacturing purpose i need an additional rule
clearance (Smd Pad) to (Smd Pad, Via) Any Net Gap 10mil
both rules are marked as Rule Followed by Router in P99SE SP6 but in fact
the router ign
Protel99SE SP6 & Win98SE
open a ddb and open a project that is hierarchical.
now Menue -> Tools -> Database Links and perform an update of the schematics
from an DB4 file. A report BOM shows that the partfields have been updated
(they were empty before the Update)
so now close the sch files by
Hello Ian,
i had just looked into your server and it looks like that what i was
searching but i cannot use it as it is.
the reason ist simple. as far as i understand your server it does only check
ONE object in the schemtic with ONE object in the excel spreadsheet.
but i need to check :
1. is t
Thanks for your quick response ...
> How many matches would suffice?
as said before 2 would recomend 2. because a part is described with the
footprint and the type. in some cases the partname says everything, but in
the case it is a resistor / capacitor f.e. you need 2 informations to get
the ri
> > as protel has a problem with the µ character
>
> What sort of problem do you see? I use that char all over, in
> Protel as well
> as other apps, and have only seen a problem during an
> attempted matchup with
It is okay as long as i use it in the SCH. but if it is used in PCB Mode
(rega
has anybody a PCB LIB containing an ISA Connector 16-Bit ? and the SCH
symbol ready ? I thought this is included in the Protel Libs / Wizard but i
cannot find it.
Thanks a Lot.
Dipl.-Ing. (FH) Michael Schmitt
Baumer Ident GmbH
Entwicklung / Development Department
Hertzstr. 10
D-69469 Weinhe
i had similar problems and the only solution i had was to open the database
on a different pc and try it there save close and reopen it on the first
system. this has helped me in this case and in lost of different case where
protel always crashed.
Dipl.-Ing. (FH) Michael Schmitt
Baumer Ident Gmb
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