> Anyhow, what I think would be fun is to try out a variety of designs
> and compare them.  Different approaches will take different numbers of
> clock cycles, require different amounts of logic area, and have
> different maximum clock rates.  A wide exploration of this space could
> be of academic interest.  Perhaps a journal would be interested in a
> submission on this.  Or perhaps we're repeating work already done,

I've been wondering about this.  A multiplier isn't exactly unusual,
I would think that someone figured out the optimum logic decades ago?
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