It's important to realize that CAD programs may be thoroughly checked for 
bugs, but when they hit the real world, they may be fed data that was not 
anticipated and therefore the behavior of the program has not been tested.

Further, whenever we attempt to do something non-standard, we are not only 
entering an area which may not have been anticipated in testing or explored 
even in beta-test, but we may also have expectations regarding the behavior 
of the program that are personal and not necessary what everyone would expect.

In this case, remember that surface pads were conceived as surfaces for 
mounting SMT components. Conceptually, they don't have holes, period. 
Probably the dialog box should suppress the hole attribute when the pad is 
assigned to top or bottom. In my opinion, that is the real oversight, that 
such holes are allowed at all.

Otherwise, if a pad has a hole, it is a through hole: i.e., it's a hole 
through the board. That's exactly what multilayer pads are, if they have holes.

If one wants to put a via in a surface pad, then put a via or free pad in a 
surface pad!

Some of us want the program to have more flexibility and some of us want 
the program to be more secure, foolproof. I don't think that both criteria 
are easy to maximize at the same time.

It is probably more often an error than not that a hole exists in a surface 
pad. It's easy to do: one is making a footprint, and places a pad, and 
because the last pad placed was a through pad, one changes the layer to the 
surface and forgets to remove the hole. Depending on display settings, this 
may not be obvious.

Since everything desireable about surface pads with holes can be attained 
with padstacks (or alternatively with pad combinations), I'd vote for 
locking out holes in surface pads. Existing designs would still allow such 
primitives, that's necessary for legacy designs, but it would become 
impossible to create them through the normal interface. (If a pad already 
had a hole, it should still be possible to edit the hole size. There would 
thus be a workaround if someone really finds a necessity for surface pads 
with holes in their center.)

(Note that we'd love to put vias in pads for bypass capacitors, so that the 
loop area would be minimized. But the ideal location for such a via would 
not be the pad center, but would be shifted toward the cap centroid. In 
fact, the ideal location might not be in the pad at all, but underneath the 
part even farther toward the centroid. Note that this is not a license for 
via-in-pad, which can create serious assembly problems!)
[EMAIL PROTECTED]
Abdulrahman Lomax
P.O. Box 690
El Verano, CA 95433

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