On 06:50 PM 28/07/2003, Chris Lowe said:

I *hate* reading schematics where D0 on one page may be something else on an another and worse, D0 on one page may *not* be D0 on another.
So I will go a long way before accepting this.

I understand what you are getting at but I would say that the worst situation is where the schematics give you no help as to how many sheets have D0 on them. Letting the CAD program just connect up all instances of a net name has certainly cause me grief in the past when you have to explicitly sort through 14 schematic sheets to find every instance of a given net (and still you miss one). WHat using ports properly allows you to do is ensure the schematics lead you from sheet to sheet when tracking down a given net.

Personally I always rename nets to unique names but still I find that the full hierarchical design lead to much easier schematics for the test and fault finding guys to use because they now that if a net is not brought onto a sheet via an entry then it isn't on the sheet.


I should possibly have been more explicit. I agree with you. I almost always have a design which is layed up in a fully hierarchical manner (top level project sheet with wires and busses interconnecting sheet entries, matching ports on the lower sheets etc). I agree with you on this I think - fully unique nets, no net-renaming at different levels, but with a fully hierarchical design. I will usually do an ERC (compile in DXP) with each of the possible net scopes as sometimes you can get advice about possibly unintended conditions by doing so.

In my case *every* named net is labelled at each level of the hierarchy (that it appears) and all ports and sheet entries on the net have the same name as the net. Possibly overkill but my intention is always clear with little chance of confusion (unique nets) and a schematic that is easy (I hope) to follow (full hierarchical design). The cost is a moderate amount of my time. Design reviews, so essential for us meeting our minimum-PCB-turn policy, are easier, we think, if we stay away from any sort of net renaming. (Did I mention that I *hate* net aliases as I think supported in OrCad? I can refer people to an example of terrible use of net aliases in a Zilog app note.)

My comments were intended to really only comment on how I perceive and have experienced design re-use, not what sort of Sch I finally finish with. Others will, I am sure have plenty of differing experience, and I am certainly not suggesting that I am right, just that this works well for us. And is understood by all, which is important to ensure consistency, IMO.

Bye for now,

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