Re: [gem5-dev] Review Request 3838: ext: Update DRAMPower

> On Feb. 25, 2017, 2:34 p.m., Jason Lowe-Power wrote: > > Going forward, I think we should reconsider how we link other projects in > > the ext folder. Especially since we're moving to git, I wonder if we could > > use something like sub repos to get a similar effect without having to pull >

Re: [gem5-dev] Review Request 3838: ext: Update DRAMPower

> On Feb. 26, 2017, 9:52 a.m., Andreas Hansson wrote: > > Great. Thanks Matthias! > > > > How can we best make sure the functionality is matched by the DRAMCtrl? Is > > there anyone that already played around with bank-wise refresh? I've got a patch that matches DRAMCtrl to the new DRAMPower

[gem5-dev] changeset in gem5: cpu: Support exit when any one Trace CPU comp...

changeset 40c951e58c2b in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=40c951e58c2b description: cpu: Support exit when any one Trace CPU completes replay This change adds a Trace CPU param to exit simulation early, i.e. when the first (any one) trace

[gem5-dev] changeset in gem5: cpu: Adjust for trace offset and fix stats

changeset a96d6787b385 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=a96d6787b385 description: cpu: Adjust for trace offset and fix stats This change subtracts the time offset present in the trace from all the event times when nodes and request are

[gem5-dev] changeset in gem5: cpu: Add frequency scaling to the Trace CPU

changeset 6d147afa8fc6 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=6d147afa8fc6 description: cpu: Add frequency scaling to the Trace CPU This change adds a simple feature to scale the frequency of the Trace CPU. The compute delays in the

Re: [gem5-dev] Review Request 3373: mem: different HMC configuration

. But I think a few more people should review it too. configs/common/HMC.py (lines 110 - 121) <http://reviews.gem5.org/r/3373/#comment7314> Change the arch option names. - Radhika Jagtap On June 20, 2016, 6:26 p.m., Abdul Mutaal Ahmad

Re: [gem5-dev] Review Request 3373: mem: different HMC configuration

> On June 20, 2016, 10:47 a.m., Radhika Jagtap wrote: > > configs/common/HMC.py, line 406 > > <http://reviews.gem5.org/r/3373/diff/5/?file=56288#file56288line406> > > > > space around operator > > Abdul Mutaal Ahmad wrote: > on every operat

Re: [gem5-dev] Review Request 3502: cache: Split the hit latency into tag lookup latency and RAM access latency

; Indentation is is off. - Radhika Jagtap On June 16, 2016, 6:55 p.m., Sophiane SENNI wrote: > > --- > This is an automatically generated e-mail. To reply, visit: >

Re: [gem5-dev] Review Request 3502: cache: Split the hit latency into tag lookup latency and RAM access latency

> On June 17, 2016, 7:57 a.m., Pierre-Yves Péneau wrote: > > I don't like the variable names, I think it's confusing especially in the > > Python part which is the user part. "lookup_latency" does not clearly > > refer to the tag lookup action , and "ram_latency" is also not very clear. > >

Re: [gem5-dev] Review Request 3373: mem: different HMC configuration

But do retain the comment currently there for the None statement. - Radhika Jagtap On June 19, 2016, 10:34 p.m., Abdul Mutaal Ahmad wrote: > > --- > This is an automatically generated e-mail. To r

Re: [gem5-dev] Review Request 3374: mem : tester for new HMC configuration

gt; Can you make the mem ranges more readable and in a loop (e.g. 256 * 1024 * 1024)? configs/example/hmctest.py (lines 129 - 142) <http://reviews.gem5.org/r/3374/#comment7296> Same here, can you make the mem ranges more readable? - Radhika Jagtap On June 19, 2016, 10:37

Re: [gem5-dev] Review Request 3477: misc: SystemC Elastic Trace Player Example

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3477/#review8399 --- Ship it! Ship It! - Radhika Jagtap On May 28, 2016, 7:18 p.m

Re: [gem5-dev] Review Request 3477: misc: SystemC Elastic Trace Player Example

> On May 26, 2016, 10 a.m., Radhika Jagtap wrote: > > util/tlm/tlm_elastic.py, lines 141-142 > > <http://reviews.gem5.org/r/3477/diff/1/?file=8#file8line141> > > > > CPU should be connected to L1 caches instead of membus. I th

Re: [gem5-dev] Review Request 3479: misc: fixes deprecated sc_time function for SystemC 2.3.1

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3479/#review8345 --- Ship it! Ship It! - Radhika Jagtap On May 25, 2016, 11:03 p.m

Re: [gem5-dev] Review Request 3478: misc: Updates for READMEs of /util/cxx_config, /util/systemc, /util/tlm

> On May 26, 2016, 10:06 a.m., Radhika Jagtap wrote: > > Please change the summary to be more high level (the 3 file paths could go away) and mention the reason, ie. something like 'required to setup evnironment to compile'.

Re: [gem5-dev] Review Request 3478: misc: Updates for READMEs of /util/cxx_config, /util/systemc, /util/tlm

--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3478/#review8343 --- Ship it! - Radhika Jagtap On May 25, 2016, 10:32 p.m., Matthias Jung

Re: [gem5-dev] Review Request 3477: misc: SystemC Elastic Trace Player Example

into the systemC 'world' :) Please address the few comments I have. - Radhika Jagtap On May 25, 2016, 10:08 p.m., Matthias Jung wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem

Re: [gem5-dev] Review Request 3477: misc: SystemC Elastic Trace Player Example

it would be best to call the CacheConfig.config_caches(options, system) here to incorporate all common options related to caches. - Radhika Jagtap On May 25, 2016, 10:08 p.m., Matthias Jung wrote: > > --- > This is an aut

[gem5-dev] changeset in gem5: mem: Add instruction sequence number to request

changeset f6db1e80a878 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=f6db1e80a878 description: mem: Add instruction sequence number to request This patch adds the instruction sequence number to the request and provides a request constructor that

[gem5-dev] changeset in gem5: cpu: Add TraceCPU to playback elastic traces

NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Radhika Jagtap +# Andreas Hansson +# Thomas Grass + +from m5.params import * +from BaseCPU import BaseCPU + +class TraceCPU(BaseCPU): +&q

[gem5-dev] changeset in gem5: util: Add decode and encode scripts for elast...

ARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Radhika Jagtap +# + +# This script is used to dump protobuf traces of the instruction dependency +# graph to ASCII format. +# +# The ASCII trace format uses one line per instruction with the format +# instruction sequence number, (opt

[gem5-dev] changeset in gem5: config: Enable elastic trace capture and repl...

ITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCURE

[gem5-dev] changeset in gem5: cpu: Create record type enum for elastic traces

changeset 18bb597fc40c in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=18bb597fc40c description: cpu: Create record type enum for elastic traces This patch replaces the booleans that specified the elastic trace record type with an enum type. The

[gem5-dev] changeset in gem5: probe: Add probe in Fetch, IEW, Rename and Co...

changeset 93d2a1526103 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=93d2a1526103 description: probe: Add probe in Fetch, IEW, Rename and Commit This patch adds probe points in Fetch, IEW, Rename and Commit stages as follows. A probe point is

[gem5-dev] changeset in gem5: proto, probe: Add elastic trace probe to o3 cpu

NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Radhika Jagtap +# Andreas Hansson +# Thomas Grass + +from Probe import * + +class ElasticTrace(ProbeListenerObject): +type = 'El

Re: [gem5-dev] Review Request 3027: proto, probe: Add elastic trace probe to o3 cpu

tionTick . Secondly, the assert should be comparing the unsigned > > values as we discussed in another thread. > > Radhika Jagtap wrote: > Changing to assert per your suggestion. This is correct because the > completion_tick corresponds to inst A while execution_tick co

Re: [gem5-dev] Review Request 3027: proto, probe: Add elastic trace probe to o3 cpu

> On Dec. 1, 2015, 5:31 p.m., Nilay Vaish wrote: > > src/cpu/o3/probe/elastic_trace.cc, lines 72-75 > > > > > > I think these checks are needless. Two reasons. First, since the > > python params do not have default values,

Re: [gem5-dev] Review Request 3090: cpu: Support virtual addr in elastic traces

> On Dec. 1, 2015, 5:58 p.m., Nilay Vaish wrote: > > src/cpu/o3/probe/elastic_trace.hh, lines 357-359 > > > > > > Do we really need this? I would rather always trace the virtual > > address as well. I don't think there

Re: [gem5-dev] Review Request 3089: cpu: Create record type enum for elastic traces

> On Dec. 1, 2015, 6:21 p.m., Nilay Vaish wrote: > > src/cpu/o3/probe/elastic_trace.cc, lines 917-922 > > > > > > I am not completely sure, but for safety sake, are you allowed to > > return a reference here? What's the

Re: [gem5-dev] Review Request 3031: config: Enable elastic trace capture and replay in se/fs

has. Why not just move these to se.py? > > Radhika Jagtap wrote: > There were a few code blocks where cpu or workload was being configured > for se and fs. That code did not apply for a trace-based cpu. So, in the > previous version of this patch I had inserted a check a

Re: [gem5-dev] Review Request 3031: config: Enable elastic trace capture and replay in se/fs

> On Nov. 6, 2015, 7:50 a.m., Nilay Vaish wrote: > > src/cpu/trace/trace_cpu.cc, lines 91-107 > > > > > > Merge with patch on trace cpu. Yes, merging the trace_cpu.cc changes into the patch that adds the Trace CPU. -

Re: [gem5-dev] Review Request 3031: config: Enable elastic trace capture and replay in se/fs

> On Nov. 6, 2015, 7:50 a.m., Nilay Vaish wrote: > > src/cpu/trace/trace_cpu.hh, lines 183-190 > > <http://reviews.gem5.org/r/3031/diff/2/?file=51466#file51466line183> > > > > Merge with patch on trace cpu. > > Radhika Jagtap wrote: > The plan

Re: [gem5-dev] Review Request 3028: mem: Add instruction sequence number to request

> On Dec. 1, 2015, 5:35 p.m., Nilay Vaish wrote: > > Ship It! Thanks, I am making the reqInstSeqNum const in this patch (blocking out what #3090 intends to do). The patch will be refreshed soon anyways. - Radhika --- This is an

Re: [gem5-dev] Review Request 3029: cpu: Add TraceCPU to playback elastic traces

ote: > Radhika, maybe add a comment that nextExecute() will update currElement? > > Nilay Vaish wrote: > delta >= 0 && currElement.tick < last_tick is possible. > I think the code should be: > assert(currElement.tick >= last_tick); > delta

Re: [gem5-dev] Review Request 3029: cpu: Add TraceCPU to playback elastic traces

> Nilay Vaish wrote: > If I was writing this code, I would probably measure the time with > vector, list, map and heap on some long running trace and see which one works > the best. Just from the complexity analysis, I would probably go for a heap. > > Radhika Jagtap wrote

Re: [gem5-dev] Review Request 3029: cpu: Add TraceCPU to playback elastic traces

> On Nov. 6, 2015, 10:14 a.m., Stephan Diestelhorst wrote: > > src/cpu/trace/trace_cpu.cc, line 168 > > > > > > space around / Done. > On Nov. 6, 2015, 10:14 a.m., Stephan Diestelhorst wrote: > >

Re: [gem5-dev] Review Request 3027: proto, probe: Add elastic trace probe to o3 cpu

> On Nov. 6, 2015, 6:45 a.m., Nilay Vaish wrote: > > src/cpu/o3/probe/elastic_trace.hh, line 88 > > > > > > Brace on next line. Fixed. > On Nov. 6, 2015, 6:45 a.m., Nilay Vaish wrote: > >

Re: [gem5-dev] Review Request 3029: cpu: Add TraceCPU to playback elastic traces

> On Sept. 18, 2015, 3:25 p.m., Nilay Vaish wrote: > > src/cpu/trace/trace_cpu.hh, line 159 > > > > > > I would either return 0 or a -ve value. The patch will be updated soon, just adding the comments now. Fixed this. >

Re: [gem5-dev] Review Request 3028: mem: Add instruction sequence number to request

> On Sept. 16, 2015, 4:39 p.m., Nilay Vaish wrote: > > src/mem/request.hh, lines 309-311 > > > > > > Seems like the only way to set this variable is through the > > constructor. Why not mark as const? In

Re: [gem5-dev] Review Request 3027: proto, probe: Add elastic trace probe to o3 cpu

> On Sept. 17, 2015, 3:24 p.m., Nilay Vaish wrote: > > src/cpu/o3/probe/elastic_trace.hh, line 304 > > > > > > Use a vector here. Ultimately delete everything in one go instead of > > deleting them one by one as you do

Re: [gem5-dev] Review Request 3029: cpu: Add TraceCPU to playback elastic traces

> On Sept. 20, 2015, 6:06 p.m., Nilay Vaish wrote: > > src/cpu/trace/trace_cpu.cc, lines 741-795 > > > > > > Would it make sense to use either a heap or an orderded map? Assuming > > that you only do insertions and

Re: [gem5-dev] Review Request 3027: proto, probe: Add elastic trace probe to o3 cpu

> On Sept. 16, 2015, 4:36 p.m., Nilay Vaish wrote: > > src/cpu/o3/probe/elastic_trace.hh, line 112 > > > > > > flushTraces()? Fixed. > On Sept. 16, 2015, 4:36 p.m., Nilay Vaish wrote: > >

Re: [gem5-dev] Review Request 3031: config: Enable elastic trace capture and replay in se/fs

> On Sept. 21, 2015, 3:09 p.m., Nilay Vaish wrote: > > configs/common/CacheConfig.py, line 56 > > > > > > Why do we need this? Yep, not needed - you won't see this in the updated patch. > On Sept. 21, 2015, 3:09 p.m.,

Re: [gem5-dev] Review Request 3030: util: Add decode and encode scripts for elastic traces

> On Sept. 21, 2015, 2:57 p.m., Nilay Vaish wrote: > > util/decode_inst_dep_trace.py, lines 73-87 > > > > > > I read the code. I think there is some inconsistency in the decoding > > and the encoding procedures.

[gem5-dev] changeset in gem5: util: Add DVFS perfLevel to checkpoint upgrad...

changeset 9f5e9bdc2f27 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=9f5e9bdc2f27 description: util: Add DVFS perfLevel to checkpoint upgrade script This patch updates the checkpoint upgrader script. It adds the _perfLevel variable in the clock

[gem5-dev] changeset in gem5: mem: Edit proto Packet and enhance the python...

changeset 524afa92d940 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=524afa92d940 description: mem: Edit proto Packet and enhance the python script This patch changes the decode script to output the optional fields of the proto message Packet,