[gem5-dev] Change in gem5/gem5[master]: arch-riscv: set MaxMiscDestRegs to 2

-Owner: Alec Roelke Gerrit-Reviewer: Alec Roelke Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: set MaxMiscDestRegs to 2

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[gem5-dev] Change in gem5/gem5[master]: arch-riscv: fix GDB register cache

/gem5-review.googlesource.com/c/public/gem5/+/20028 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ie35ea89a45870fb634e6c68236261bde27c86e41 Gerrit-Change-Number: 20028 G

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: fix GDB register cache

-PatchSet: 3 Gerrit-Owner: Alec Roelke Gerrit-Reviewer: Alec Roelke Gerrit-Reviewer: Alec Roelke Gerrit-Reviewer: kokoro Gerrit-CC: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: fix GDB register cache

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[gem5-dev] Change in gem5/gem5[master]: arch-riscv: fix GDB register cache

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[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Implement MHARTID CSR

: Alec Roelke Gerrit-Reviewer: Alec Roelke Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Implement MHARTID CSR

-Number: 16988 Gerrit-PatchSet: 2 Gerrit-Owner: Alec Roelke Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Implement MHARTID CSR

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[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add interrupt handling

break; default: xc->setMiscReg(CSRData.at(csr).physIndex, data); break; -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/14377 To unsubscribe, or for help writing mail filters, visit

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Fix reset function and style

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[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Fix reset function and style

it-Change-Id: I81bdf7a88b08874e3c3d5fc6c7f3ca2d796496b8 Gerrit-Change-Number: 14376 Gerrit-PatchSet: 2 Gerrit-Owner: Alec Roelke Gerrit-Reviewer: Alec Roelke Gerrit-Reviewer: Alec Roelke Gerrit-Reviewer: Robert Scheffel Gerrit-Reviewer: Tuan Ta Gerrit-CC: Jason Lowe-Power Gerrit-MessageType:

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add interrupt handling

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[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Fix reset function and style

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[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add interrupt handling

;; +fault = make_shared(error, + machInst); +} +break; default: xc->setMiscRe

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add xret instructions

+BitUnion64(INTERRUPT) +Bitfield<11> mei; +Bitfield<9> sei; +Bitfield<8> uei; +Bitfield<7> mti; +Bitfield<5> sti; +Bitfield<4> uti; +Bitfield<3> msi; +Bitfield<1> ssi; +Bitfield<0> usi; +EndBitUnion(INTERRUPT) + c

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add support for trap value register

data = 0; } break; @@ -252,7 +252,7 @@ if (bits(csr, 11, 10) == 0x3) { std::string error = csprintf("CSR %s is read-only\n", CSRData.at(csr).name); -

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add support for fault handling

el of the // caller -SyscallFault() : RiscvFault("System call", ECALL_USER, SOFTWARE) - {} - - void -invoke_se(ThreadContext *tc, const StaticInstPtr ); + SyscallFault() : RiscvFault("System call", false, ECALL_USER) {} +void invokeSE(ThreadContext *tc, co

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add support for trap value register

: master Gerrit-Change-Id: I3004bd7b907e7dc75e5f1a8452a1d74796a7a551 Gerrit-Change-Number: 11135 Gerrit-PatchSet: 4 Gerrit-Owner: Alec Roelke Gerrit-Reviewer: Alec Roelke Gerrit-Reviewer: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add xret instructions

: 11136 Gerrit-PatchSet: 4 Gerrit-Owner: Alec Roelke Gerrit-Reviewer: Alec Roelke Gerrit-Reviewer: Robert Scheffel Gerrit-CC: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add xret instructions

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[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add support for trap value register

-Change-Number: 11135 Gerrit-PatchSet: 3 Gerrit-Owner: Alec Roelke Gerrit-Reviewer: Alec Roelke Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add support for fault handling

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[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add support for trap value register

-Change-Number: 11135 Gerrit-PatchSet: 2 Gerrit-Owner: Alec Roelke Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add support for fault handling

filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ie9c0f29719620c20783540d3bdb2db44f6114fc9 Gerrit-Change-Number: 9161 Gerrit-PatchSet: 6 Gerrit-Owner: Alec Roelke Gerrit-Reviewer: Alec Roelke Gerrit-Reviewer: Alec

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add support for trap value register

= 0x3) { std::string error = csprintf("CSR %s is read-only\n", CSRData.at(csr).name); -fault = make_shared(error); +fault = make_shared(error, machInst); } else { DPRINTF(RiscvMisc, "Writing %#x to CSR %s.\n", data, CSRData.at(csr).name); -- To view, visit https://gem5-review.googlesource.com/11135 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I3004bd7b907e7dc75e5f1a8452a1d74796a7a551 Gerrit-Change-Number: 11135 Gerrit-PatchSet: 1 Gerrit-Owner: Alec Roelke Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add xret instructions

Bitfield<1> ssi; +Bitfield<0> usi; +EndBitUnion(INTERRUPT) + const off_t MXL_OFFSET = (sizeof(MiscReg) * 8 - 2); const off_t SXL_OFFSET = 34; const off_t UXL_OFFSET = 32; -- To view, visit https://gem5-review.googlesource.com/11136 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I6125c31cb2fdcc3f83eca86910519e81ffbbbfc9 Gerrit-Change-Number: 11136 Gerrit-PatchSet: 1 Gerrit-Owner: Alec Roelke Gerrit-MessageType: newchange ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add support for fault handling

filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ie9c0f29719620c20783540d3bdb2db44f6114fc9 Gerrit-Change-Number: 9161 Gerrit-PatchSet: 5 Gerrit-Owner: Alec Roelke Gerrit-Reviewer: Alec Roelke Gerrit-Reviewer: Alec

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Add support for fault handling

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[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Update CSR implementations

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/7441 ) Change subject: arch-riscv: Update CSR implementations .. arch-riscv: Update CSR implementations This patch updates the

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Update CSR implementations

Hello Gabe Black, Tuan Ta, Robert Scheffel, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/7441 to look at the new patch set (#9). Change subject: arch-riscv: Update CSR implementations

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Update CSR implementations

Hello Gabe Black, Tuan Ta, Robert Scheffel, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/7441 to look at the new patch set (#8). Change subject: arch-riscv: Update CSR implementations

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Update CSR implementations

Hello Gabe Black, Tuan Ta, Robert Scheffel, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/7441 to look at the new patch set (#7). Change subject: arch-riscv: Update CSR implementations

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Update CSR implementations

Hello Gabe Black, Tuan Ta, Robert Scheffel, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/7441 to look at the new patch set (#6). Change subject: arch-riscv: Update CSR implementations

[gem5-dev] Change in gem5/gem5[master]: arch-riscv: Update CSR implementations

Hello Tuan Ta, Robert Scheffel, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/7441 to look at the new patch set (#5). Change subject: arch-riscv: Update CSR implementations ..

[gem5-dev] Change in public/gem5[master]: arch-riscv: Add support for fault handling

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/9161 Change subject: arch-riscv: Add support for fault handling .. arch-riscv: Add support for fault handling This patch adds support

[gem5-dev] Change in public/gem5[master]: arch-riscv: Update CSR implementations

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/7441 Change subject: arch-riscv: Update CSR implementations .. arch-riscv: Update CSR implementations This patch updates the CSRs to

[gem5-dev] Change in public/gem5[master]: arch-riscv: Fix floating-poing op classes

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6521 ) Change subject: arch-riscv: Fix floating-poing op classes .. arch-riscv: Fix floating-poing op classes This patch applies

[gem5-dev] Change in public/gem5[master]: arch-riscv: Fix floating-point conversion bugs

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6402 ) Change subject: arch-riscv: Fix floating-point conversion bugs .. arch-riscv: Fix floating-point conversion bugs Using

[gem5-dev] Change in public/gem5[master]: arch-riscv: Fix floating-poing op classes

Hello Tuan Ta, Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/6521 to look at the new patch set (#3). Change subject: arch-riscv: Fix floating-poing op classes ..

[gem5-dev] Change in public/gem5[master]: arch-riscv: Don't crash when printing unknown CSRs

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/7321 ) Change subject: arch-riscv: Don't crash when printing unknown CSRs .. arch-riscv: Don't crash when printing unknown CSRs

[gem5-dev] Change in public/gem5[master]: arch-riscv: Don't crash when printing unknown CSRs

Alec Roelke has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/7321 ) Change subject: arch-riscv: Don't crash when printing unknown CSRs .. arch-riscv: Don't crash when printing unknown CSRs This patch

[gem5-dev] Change in public/gem5[master]: arch-riscv: Don't crash when printing unknown CSRs

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/7321 Change subject: arch-riscv: Don't crash when printing unknown CSRs .. arch-riscv: Don't crash when printing unknown CSRs This

[gem5-dev] Change in public/gem5[master]: arch-riscv: Change AMO request flags

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/7181 Change subject: arch-riscv: Change AMO request flags .. arch-riscv: Change AMO request flags This patch adds the LOCKED_RMW flag

[gem5-dev] Change in public/gem5[master]: arch-riscv: Fix floating-point op classes

Alec Roelke has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/6521 ) Change subject: arch-riscv: Fix floating-point op classes .. arch-riscv: Fix floating-point op classes This patch applies correct

[gem5-dev] Change in public/gem5[master]: arch-riscv: Correct syscall argument reg count

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/7081 ) Change subject: arch-riscv: Correct syscall argument reg count .. arch-riscv: Correct syscall argument reg count As per

[gem5-dev] Change in public/gem5[master]: arch-riscv: Correct syscall argument reg count

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/7081 Change subject: arch-riscv: Correct syscall argument reg count .. arch-riscv: Correct syscall argument reg count As per the

[gem5-dev] Change in public/gem5[master]: arch-riscv: Remove "magic" syscall number constant

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/7061 ) Change subject: arch-riscv: Remove "magic" syscall number constant .. arch-riscv: Remove "magic" syscall number constant

[gem5-dev] Change in public/gem5[master]: arch-riscv: Remove "magic" syscall number constant

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/7061 Change subject: arch-riscv: Remove "magic" syscall number constant .. arch-riscv: Remove "magic" syscall number constant

[gem5-dev] Change in public/gem5[master]: arch-riscv: Define AT_RANDOM properly

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6681 ) Change subject: arch-riscv: Define AT_RANDOM properly .. arch-riscv: Define AT_RANDOM properly According to the

[gem5-dev] Change in public/gem5[master]: arch-riscv: Define AT_RANDOM properly

Alec Roelke has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/6681 ) Change subject: arch-riscv: Define AT_RANDOM properly .. arch-riscv: Define AT_RANDOM properly According to the getauxval(3) man

[gem5-dev] Change in public/gem5[master]: arch-riscv: Define AT_RANDOM properly

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6681 Change subject: arch-riscv: Define AT_RANDOM properly .. arch-riscv: Define AT_RANDOM properly According to the getauxval(3) man

[gem5-dev] Change in public/gem5[master]: arch-riscv: Increase maximum stack size

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6661 ) Change subject: arch-riscv: Increase maximum stack size .. arch-riscv: Increase maximum stack size This patch increases

[gem5-dev] Change in public/gem5[master]: arch-riscv: Increase maximum stack size

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6661 Change subject: arch-riscv: Increase maximum stack size .. arch-riscv: Increase maximum stack size This patch increases the

[gem5-dev] Change in public/gem5[master]: arch-riscv: Fix floating-poing op classes

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6521 Change subject: arch-riscv: Fix floating-poing op classes .. arch-riscv: Fix floating-poing op classes This patch applies correct

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move compressed ops out of ISA

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6026 ) Change subject: arch-riscv: Move compressed ops out of ISA .. arch-riscv: Move compressed ops out of ISA This patch moves

[gem5-dev] Change in public/gem5[master]: arch-riscv: Make use of ImmOp's polymorphism

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6401 Change subject: arch-riscv: Make use of ImmOp's polymorphism .. arch-riscv: Make use of ImmOp's polymorphism This patch makes use

[gem5-dev] Change in public/gem5[master]: arch-riscv: Fix floating-point conversion bugs

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6402 Change subject: arch-riscv: Fix floating-point conversion bugs .. arch-riscv: Fix floating-point conversion bugs Using the

[gem5-dev] Change in public/gem5[master]: arch-riscv: use sext rather than manual masks

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6182 ) Change subject: arch-riscv: use sext rather than manual masks .. arch-riscv: use sext rather than manual masks Replace

[gem5-dev] Change in public/gem5[master]: arch-riscv: use sext rather than manual masks

Hello Gabe Black, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/6182 to look at the new patch set (#2). Change subject: arch-riscv: use sext rather than manual masks .. arch-riscv:

[gem5-dev] Change in public/gem5[master]: arch-riscv: Remove spaces around ea_code

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6181 ) Change subject: arch-riscv: Remove spaces around ea_code .. arch-riscv: Remove spaces around ea_code This patch makes

[gem5-dev] Change in public/gem5[master]: arch-riscv: Add missing license paragraphs

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6183 ) Change subject: arch-riscv: Add missing license paragraphs .. arch-riscv: Add missing license paragraphs Some of the

[gem5-dev] Change in public/gem5[master]: arch-riscv: Add missing license paragraphs

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6183 Change subject: arch-riscv: Add missing license paragraphs .. arch-riscv: Add missing license paragraphs Some of the files in

[gem5-dev] Change in public/gem5[master]: arch-riscv: use sext rather than manual masks

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6182 Change subject: arch-riscv: use sext rather than manual masks .. arch-riscv: use sext rather than manual masks Replace manual

[gem5-dev] Change in public/gem5[master]: arch-riscv: Remove spaces around ea_code

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6181 Change subject: arch-riscv: Remove spaces around ea_code .. arch-riscv: Remove spaces around ea_code This patch makes mem.isa

[gem5-dev] Change in public/gem5[master]: arch-riscv: Remove static parts of AMOs out of ISA

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6025 ) Change subject: arch-riscv: Remove static parts of AMOs out of ISA .. arch-riscv: Remove static parts of AMOs out of ISA

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move parts of mem insts out of ISA

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6024 ) Change subject: arch-riscv: Move parts of mem insts out of ISA .. arch-riscv: Move parts of mem insts out of ISA This

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move unknown out of ISA description

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6023 ) Change subject: arch-riscv: Move unknown out of ISA description .. arch-riscv: Move unknown out of ISA description This

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move standard ops out of ISA

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6022 ) Change subject: arch-riscv: Move standard ops out of ISA .. arch-riscv: Move standard ops out of ISA This patch removes

[gem5-dev] Change in public/gem5[master]: arch-riscv: Remove static parts of AMOs out of ISA

Hello Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/6025 to look at the new patch set (#4). Change subject: arch-riscv: Remove static parts of AMOs out of ISA ..

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move compressed ops out of ISA

Hello Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/6026 to look at the new patch set (#4). Change subject: arch-riscv: Move compressed ops out of ISA ..

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move unknown out of ISA description

Hello Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/6023 to look at the new patch set (#4). Change subject: arch-riscv: Move unknown out of ISA description ..

[gem5-dev] Change in public/gem5[master]: arch-riscv: Remove static parts of AMOs out of ISA

Hello Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/6025 to look at the new patch set (#3). Change subject: arch-riscv: Remove static parts of AMOs out of ISA ..

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move parts of mem insts out of ISA

Hello Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/6024 to look at the new patch set (#3). Change subject: arch-riscv: Move parts of mem insts out of ISA ..

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move standard ops out of ISA

Alec Roelke has uploaded a new patch set (#3). ( https://gem5-review.googlesource.com/6022 ) Change subject: arch-riscv: Move standard ops out of ISA .. arch-riscv: Move standard ops out of ISA This patch removes static

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move compressed ops out of ISA

Hello Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/6026 to look at the new patch set (#3). Change subject: arch-riscv: Move compressed ops out of ISA ..

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move unknown out of ISA description

Hello Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/6023 to look at the new patch set (#3). Change subject: arch-riscv: Move unknown out of ISA description ..

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move compressed ops out of ISA

Alec Roelke has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/6026 ) Change subject: arch-riscv: Move compressed ops out of ISA .. arch-riscv: Move compressed ops out of ISA This patch moves static

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move parts of mem insts out of ISA

Alec Roelke has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/6024 ) Change subject: arch-riscv: Move parts of mem insts out of ISA .. arch-riscv: Move parts of mem insts out of ISA This patch moves

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move standard ops out of ISA

Alec Roelke has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/6022 ) Change subject: arch-riscv: Move standard ops out of ISA .. arch-riscv: Move standard ops out of ISA This patch removes static

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move unknown out of ISA description

Alec Roelke has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/6023 ) Change subject: arch-riscv: Move unknown out of ISA description .. arch-riscv: Move unknown out of ISA description This patch

[gem5-dev] Change in public/gem5[master]: arch-riscv: Remove static parts of AMOs out of ISA

Alec Roelke has uploaded a new patch set (#2). ( https://gem5-review.googlesource.com/6025 ) Change subject: arch-riscv: Remove static parts of AMOs out of ISA .. arch-riscv: Remove static parts of AMOs out of ISA This patch

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move static_inst into a directory

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6021 ) Change subject: arch-riscv: Move static_inst into a directory .. arch-riscv: Move static_inst into a directory This patch

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move compressed ops out of ISA

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6026 Change subject: arch-riscv: Move compressed ops out of ISA .. arch-riscv: Move compressed ops out of ISA This patch moves static

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move static_inst into a directory

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6021 Change subject: arch-riscv: Move static_inst into a directory .. arch-riscv: Move static_inst into a directory This patch creates

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move unknown out of ISA description

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6023 Change subject: arch-riscv: Move unknown out of ISA description .. arch-riscv: Move unknown out of ISA description This patch

[gem5-dev] Change in public/gem5[master]: arch-riscv: Remove static parts of AMOs out of ISA

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6025 Change subject: arch-riscv: Remove static parts of AMOs out of ISA .. arch-riscv: Remove static parts of AMOs out of ISA This

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move standard ops out of ISA

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6022 Change subject: arch-riscv: Move standard ops out of ISA .. arch-riscv: Move standard ops out of ISA This patch removes static

[gem5-dev] Change in public/gem5[master]: arch-riscv: Move parts of mem insts out of ISA

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/6024 Change subject: arch-riscv: Move parts of mem insts out of ISA .. arch-riscv: Move parts of mem insts out of ISA This patch moves

[gem5-dev] Change in public/gem5[master]: arch-riscv: Add missing system calls

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/5322 ) Change subject: arch-riscv: Add missing system calls .. arch-riscv: Add missing system calls This patch adds all system

[gem5-dev] Change in public/gem5[master]: sim-se: Add default to SyscallDesc constructor

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/5501 ) Change subject: sim-se: Add default to SyscallDesc constructor .. sim-se: Add default to SyscallDesc constructor This

[gem5-dev] Change in public/gem5[master]: arch-riscv: Add missing system calls

Hello Brandon Potter, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/5322 to look at the new patch set (#4). Change subject: arch-riscv: Add missing system calls .. arch-riscv: Add

[gem5-dev] Change in public/gem5[master]: sim-se: Add default to SyscallDesc constructor

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/5501 Change subject: sim-se: Add default to SyscallDesc constructor .. sim-se: Add default to SyscallDesc constructor This patch adds a

[gem5-dev] Change in public/gem5[master]: sim-se: Add prlimit system call

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/5321 ) Change subject: sim-se: Add prlimit system call .. sim-se: Add prlimit system call Some ISAs (namely RISC-V) implement

[gem5-dev] Change in public/gem5[master]: arch-riscv: Add missing system calls

Hello Brandon Potter, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/5322 to look at the new patch set (#3). Change subject: arch-riscv: Add missing system calls .. arch-riscv: Add

[gem5-dev] Change in public/gem5[master]: arch-riscv: Add missing system calls

Hello Brandon Potter, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/5322 to look at the new patch set (#2). Change subject: arch-riscv: Add missing system calls .. arch-riscv: Add

[gem5-dev] Change in public/gem5[master]: riscv: Define register index constants using literals

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4080 ) Change subject: riscv: Define register index constants using literals .. riscv: Define register index constants using

[gem5-dev] Change in public/gem5[master]: riscv: Define register index constants using literals

Alec Roelke has uploaded this change for review. ( https://gem5-review.googlesource.com/4080 Change subject: riscv: Define register index constants using literals .. riscv: Define register index constants using literals To

[gem5-dev] Change in public/gem5[master]: tests: Upate RISC-V binaries and results

Alec Roelke has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4042 ) Change subject: tests: Upate RISC-V binaries and results .. tests: Upate RISC-V binaries and results This patch updates

[gem5-dev] Change in public/gem5[master]: tests: Upate RISC-V binaries and results

Hello Jason Lowe-Power, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/4042 to look at the new patch set (#3). Change subject: tests: Upate RISC-V binaries and results .. tests:

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