Re: [gem5-dev] Review Request: Ruby: Add support for functional accesses

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/611/#review1330 --- This patch has all the functionality we need. Also I really like the in

Re: [gem5-dev] Review Request: Ruby: Correctly set access permissions for directory entries

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/684/#review1301 --- Ship it! This looks fine to me. I assume that if a controller doesn't i

Re: [gem5-dev] Review Request: Ruby: Convert to M5 Stats

06:16) > > > Review request for Default, Nathan Binkert, Korey Sewell, and Brad Beckmann. > > > Summary > --- > > This patch contains changes to convert Ruby's stat handling to the M5-style > Stat class. The ultimate goal is to remove Profiler entirely, th

Re: [gem5-dev] Review Request: orion: bug fix in link power, and some reorg

request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, Nathan > Binkert, and Brad Beckmann. > > > Summary > --- > > orion: bug fix in link power, and some reorg > > > Diffs > - > > src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetw

Re: [gem5-dev] Review Request: garnet: add network ptr to links

request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, Nathan > Binkert, and Brad Beckmann. > > > Summary > --- > > garnet: added network ptr to links to be used by orion > > > Diffs > - > > src/mem/ruby/network/garnet/fixed-pipeline/G

Re: [m5-dev] Review Request: garnet: rename and rearrange config parameters

views.m5sim.org/r/688/ > --- > > (Updated 2011-05-08 23:08:23) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, Nathan > Binkert, and Brad Beckmann. > > > Summary > --- &

Re: [m5-dev] Review Request: slicc: added vnet_type field to identify response vnets from others

; --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/686/ > --- > > (Updated 2011-05-08 21:09:50) > > > Review

Re: [m5-dev] Review Request: ruby-stats: support for dump_stats instruction

> On 2011-05-03 17:45:41, Brad Beckmann wrote: > > Can we change the name of Time in base/time.hh instead of Time in Ruby? > > Right now this patch touches 50+ Ruby files and a bunch of lines within > > those files just to change Time to RTime. It seems that far fewer

Re: [m5-dev] Review Request: ruby: use RubyMemory flag & remove setDebug() functionality

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/676/#review1204 --- Ship it! I'm surprised this wasn't fixed earlier. Thanks for do this Ko

Re: [m5-dev] Review Request: ruby-stats: support for dump_stats instruction

> On 2011-05-03 17:45:41, Brad Beckmann wrote: > > Can we change the name of Time in base/time.hh instead of Time in Ruby? > > Right now this patch touches 50+ Ruby files and a bunch of lines within > > those files just to change Time to RTime. It seems that far fewer

Re: [m5-dev] Review Request: ruby-stats: support for dump_stats instruction

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/675/#review1195 --- Can we change the name of Time in base/time.hh instead of Time in Ruby?

Re: [m5-dev] Review Request: NetworkTest: added sim_cycles parameter to the network tester.

-- On 2011-04-25 16:18:04, Tushar Krishna wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/660/ > --- > > (Updated 2011-04-25 16:18:

Re: [m5-dev] Review Request: network: added Torus and Pt2Pt topologies

/reviews.m5sim.org/r/667/ > --- > > (Updated 2011-04-29 15:58:51) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, Nathan > Binkert, and Brad Beckmann. > > > Summary > --- > > network: added Torus and Pt2Pt topologies > >

[m5-dev] changeset in m5: regress: updates after changing ruby network ba...

changeset dba41dbef071 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=dba41dbef071 description: regress: updates after changing ruby network bandwidth diffstat: tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini |76 +- tests

[m5-dev] changeset in m5: garnet: removed flit_width from Routers

changeset 89d0e7c17d1e in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=89d0e7c17d1e description: garnet: removed flit_width from Routers diffstat: src/mem/ruby/network/garnet/fixed-pipeline/GarnetRouter_d.py | 1 - src/mem/ruby/network/garnet/fixed-pipeline/Router_d.

[m5-dev] changeset in m5: network: set the ExtLink bw to 16 bytes

changeset 8743998edfd3 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=8743998edfd3 description: network: set the ExtLink bw to 16 bytes Therefore all links by default are 16 bytes wide and thus work with Garnet's uniform link bandwidth assumption. diff

[m5-dev] changeset in m5: network: adjusted default endpoint bandwidth

changeset 39e42ccddd63 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=39e42ccddd63 description: network: adjusted default endpoint bandwidth The simple network's endpoint bandwidth value is used to adjust the overall bandwidth of the network. Specifica

[m5-dev] changeset in m5: network: moved network config params

changeset 36987780169e in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=36987780169e description: network: moved network config params Moved the buffer_size, endpoint_bandwidth, and adaptive_routing params out of the top-level parent network object and to

[m5-dev] changeset in m5: network: removed the unused network-wide latenc...

changeset f113f73dd494 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=f113f73dd494 description: network: removed the unused network-wide latency param diffstat: src/mem/ruby/network/Network.cc | 1 - src/mem/ruby/network/Network.hh | 2 -- src/mem/ruby/network/Netwo

[m5-dev] changeset in m5: network: basic link bw for garnet and simple ne...

changeset 7c377f5162f8 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=7c377f5162f8 description: network: basic link bw for garnet and simple networks This patch ensures that both Garnet and the simple networks use the bw value specified in the topology.

[m5-dev] changeset in m5: network: convert links & switches to first clas...

changeset 7226aebb77b4 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=7226aebb77b4 description: network: convert links & switches to first class C++ SimObjects This patch converts links and switches from second class simobjects that were virtually ignor

[m5-dev] changeset in m5: ruby: moved topology to the top network directory

changeset 73089f793a0a in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=73089f793a0a description: ruby: moved topology to the top network directory Moved the Topology class to the top network directory because it is shared by both the simple and Garnet ne

[m5-dev] changeset in m5: garnet: cleaned up flexible network header file

changeset 2284cec55ef4 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=2284cec55ef4 description: garnet: cleaned up flexible network header file diffstat: src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc | 2 -- 1 files changed, 0 insertions(+), 2 deleti

[m5-dev] changeset in m5: ruby: removed dated comment in SimpleNetwork

changeset 779d775abc11 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=779d775abc11 description: ruby: removed dated comment in SimpleNetwork diffstat: src/mem/ruby/network/simple/SimpleNetwork.hh | 34 1 files changed, 0 insertions(+), 34

Re: [m5-dev] Review Request: network: generalized bw for basic links

ork. > > Perhaps we should set flit_size equal to bandwidth_factor there? > > "link_bandwidth" is a clearer term but I understand that is not true > > for simple network where the endpoint bandwidth comes into play... > > Brad Beckmann wrote: >

Re: [m5-dev] Review Request: NetworkTest: added sim_cycles parameter to the network tester.

automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/660/ > --- > > (Updated 2011-04-25 16:18:04) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, Nathan > Binke

Re: [m5-dev] Review Request: network: generalized bw for basic links

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/661/#review1161 --- On 2011-04-27 10:38:47, Brad Beckmann wrote: > > --- > This is an automatically generated e-mail. To repl

[m5-dev] Review Request: network: adjusted default endponit bandwidth

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/664/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binke

[m5-dev] Review Request: network: removed the unused network-wide latency param

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/663/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binke

[m5-dev] Review Request: network: moved network config params

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/662/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binke

[m5-dev] Review Request: network: generalized bw for basic links

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/661/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binke

Re: [m5-dev] Review Request: network: convert links & switches to first class C++ SimObjects

: http://reviews.m5sim.org/r/653/#review1158 --- On 2011-04-27 10:32:08, Brad Beckmann wrote: > > --- > This is an automatically generated e-mail. To reply

Re: [m5-dev] Review Request: network: convert links & switches to first class C++ SimObjects

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/653/ --- (Updated 2011-04-27 10:32:08.616217) Review request for Default, Ali Saidi, Gabe Bl

Re: [m5-dev] Review Request: network: convert links & switches to first class C++ SimObjects

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/653/ --- (Updated 2011-04-25 15:43:08.923680) Review request for Default, Ali Saidi, Gabe Bl

Re: [m5-dev] Review Request: network: convert links & switches to first class C++ SimObjects

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/653/ --- (Updated 2011-04-25 15:40:47.284324) Review request for Default, Ali Saidi, Gabe Bl

Re: [m5-dev] Review Request: network: convert links & switches to first class C++ SimObjects

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/653/ --- (Updated 2011-04-25 15:36:00.076799) Review request for Default, Ali Saidi, Gabe Bl

Re: [m5-dev] Review Request: network: convert links & switches to first class C++ SimObjects

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/653/ --- (Updated 2011-04-25 15:30:56.730543) Review request for Default, Ali Saidi, Gabe Bl

Re: [m5-dev] Review Request: network: convert links & switches to first class C++ SimObjects

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/653/ --- (Updated 2011-04-25 11:54:17.874303) Review request for Default, Ali Saidi, Gabe Bl

Re: [m5-dev] Review Request: network: convert links & switches to first class C++ SimObjects

ecause it just seemed too complicated. Your comment does point out that I do probably need to improve the comment i n Topology.cc. - Brad --- This is an automatically generated e-mail. To reply, visit:

Re: [m5-dev] Review Request: network: convert links & switches to first class C++ SimObjects

vert over to a single style. - Brad --- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/653/#review1149 --- On 201

Re: [m5-dev] Review Request: ruby: moved topology to the top network directory

o reply, visit: http://reviews.m5sim.org/r/651/#review1147 --- On 2011-04-22 15:16:44, Brad Beckmann wrote: > > --- > This is an automatically generated e-mail. To reply, visit: >

[m5-dev] Review Request: network: convert links & switches to first class C++ SimObjects

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/653/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binke

[m5-dev] Review Request: garnet: cleaned up flexible netwok header file

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/652/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binke

[m5-dev] Review Request: ruby: moved topology to the top network directory

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/651/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binke

[m5-dev] Review Request: ruby: removed dated comment in SimpleNetwork

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/650/ --- Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binke

Re: [m5-dev] Review Request: Ruby: Add support for functional accesses

> On 2011-04-13 10:28:08, Brad Beckmann wrote: > > src/mem/protocol/MESI_CMP_directory-L1cache.sm, line 141 > > <http://reviews.m5sim.org/r/611/diff/6/?file=11548#file11548line141> > > > > Why are you adding this function? SLICC already generates a sim

Re: [m5-dev] Review Request: ruby: dbg: use system ticks instead of cycles

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/635/#review1129 --- Ship it! Just a few minor alignment requests. Other than that, it looks

Re: [m5-dev] Review Request: Ruby: Add support for functional accesses

> On 2011-04-13 10:28:08, Brad Beckmann wrote: > > src/mem/protocol/MESI_CMP_directory-L1cache.sm, line 141 > > <http://reviews.m5sim.org/r/611/diff/6/?file=11548#file11548line141> > > > > Why are you adding this function? SLICC already generates a sim

Re: [m5-dev] Review Request: Ruby: Add support for functional accesses

> On 2011-04-13 10:28:08, Brad Beckmann wrote: > > src/mem/protocol/MESI_CMP_directory-L1cache.sm, line 141 > > <http://reviews.m5sim.org/r/611/diff/6/?file=11548#file11548line141> > > > > Why are you adding this function? SLICC already generates a sim

Re: [m5-dev] Review Request: Ruby: Add support for functional accesses

> On 2011-04-13 10:28:08, Brad Beckmann wrote: > > configs/example/ruby_mem_test.py, line 97 > > <http://reviews.m5sim.org/r/611/diff/6/?file=11542#file11542line97> > > > > It seems that the following three parameters should not be hardcoded, > > but i

Re: [m5-dev] Review Request: Ruby: Add support for functional accesses

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/611/#review --- Hi Nilay, This patch is getting close. Comments below. There is one

Re: [m5-dev] Review Request: Cache warmup: fixed compile errors in Brad's cache warmup patches

ly generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/637/ > --- > > (Updated 2011-04-11 12:06:10) > > > Review request for Default and Brad Beckmann. > > > Summary > --- > > Cache w

Re: [m5-dev] Review Request: ruby: dbg: use system ticks instead of cycles

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/635/#review1104 --- Overall, this seems pretty straightforward. However I'm confused by the

[m5-dev] changeset in m5: ruby: fixes to support more types of RubyRequests

changeset 02cb69e5cfeb in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=02cb69e5cfeb description: ruby: fixes to support more types of RubyRequests diffstat: src/mem/ruby/system/Sequencer.cc | 9 +++-- 1 files changed, 7 insertions(+), 2 deletions(-) diffs (40 lin

Re: [m5-dev] Review Request: Ruby: Add support for functional accesses

> On 2011-03-31 22:08:21, Brad Beckmann wrote: > > This looks great, I just have a few minor suggestions below. > > > > It seems like the next step is to figure out how to deal with functional > > accesses not succeeding in the CPUs and devices. > > Nilay Vais

Re: [m5-dev] Review Request: Ruby: Add support for functional accesses

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/611/#review1090 --- src/mem/ruby/system/DirectoryMemory.py

[m5-dev] changeset in m5: hammer: fixed dma uniproc error

changeset aeec9e157d06 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=aeec9e157d06 description: hammer: fixed dma uniproc error Fixed an error reguarding DMA for uninprocessor systems. Basically removed an overly agressive optimization that lead to inc

Re: [m5-dev] Review Request: Ruby: Add support for functional accesses

> On 2011-03-31 11:11:03, Brad Beckmann wrote: > > src/mem/ruby/system/RubyPort.cc, line 321 > > <http://reviews.m5sim.org/r/611/diff/2/?file=11382#file11382line321> > > > > This loop is probably the most complicated and important part of this > > patc

Re: [m5-dev] Review Request: Ruby: Add support for functional accesses

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/611/#review1085 --- Hi Nilay, Comments below. I might be missing something, but the changes

Re: [m5-dev] Review Request: Ruby: Add support for functional accesses

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/611/#review1082 --- This looks great, I just have a few minor suggestions below. It seems li

Re: [m5-dev] Review Request: Ruby: Add support for functional accesses

> On 2011-03-31 11:11:03, Brad Beckmann wrote: > > src/mem/ruby/system/RubyPort.cc, line 321 > > <http://reviews.m5sim.org/r/611/diff/2/?file=11382#file11382line321> > > > > This loop is probably the most complicated and important part of this > > patc

Re: [m5-dev] Review Request: CacheMemory: add allocateVoid() that is == allocate() but no return value.

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/629/#review1077 --- This is more of a question, then a suggestion. Is there a way to use al

Re: [m5-dev] Review Request: Ruby: Simplify SLICC and Entry/TBE handling.

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/630/#review1074 --- Ship it! - Brad On 2011-03-31 14:26:33, Lisa Hsu wrote: > > -

Re: [m5-dev] Review Request: Ruby: Add new object called WireBuffer to mimic a Wire.

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/627/#review1072 --- Ship it! Other than Nilay's comments, this looks good to me. - Brad O

Re: [m5-dev] Review Request: Ruby: have the rubytester pass contextId to Ruby.

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/625/#review1070 --- Ship it! - Brad On 2011-03-31 12:20:59, Lisa Hsu wrote: > > -

Re: [m5-dev] Review Request: Ruby: enable multiple sequencers in one controller.

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/624/#review1069 --- src/mem/slicc/symbols/StateMachine.py

Re: [m5-dev] Review Request: Ruby: pass Packet->Req->contextId() to Ruby.

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/623/#review1068 --- Ship it! - Brad On 2011-03-31 12:16:27, Lisa Hsu wrote: > > -

Re: [m5-dev] Review Request: Ruby: Add support for functional accesses

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/611/#review1054 --- Hi Nilay, First, thanks for your patience. Sorry I wasn't able to provi

[m5-dev] changeset in m5: ruby: fixed cache index setting

changeset d8587c913ccf in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=d8587c913ccf description: ruby: fixed cache index setting diffstat: configs/ruby/MESI_CMP_directory.py | 17 +++-- configs/ruby/MI_example.py | 4 +++- configs/ruby/MOESI_CM

Re: [m5-dev] Review Request: my initial implementation of cache flushing

automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/552/ > --- > > (Updated 2011-03-24 17:17:59) > > > Review request for Default and Brad Beckmann. > > > Summary > --- >

Re: [m5-dev] Review Request: my initial implementation of cache flushing

> On 2011-03-24 08:58:15, Brad Beckmann wrote: > > src/mem/ruby/system/Sequencer.cc, line 541 > > <http://reviews.m5sim.org/r/552/diff/6/?file=11209#file11209line541> > > > > I thought we concluded that Flush requests can callback the RubyPort? > > A

Re: [m5-dev] Review Request: my initial implementation of cache flushing

rated e-mail. To reply, visit: > http://reviews.m5sim.org/r/552/ > --- > > (Updated 2011-03-23 22:28:01) > > > Review request for Default and Brad Beckmann. > > > Summary > --- > > my initial implementation of cache flushing > > &g

Re: [m5-dev] Review Request: my initial implementation of cache flushing

ttp://reviews.m5sim.org/r/552/ > --- > > (Updated 2011-03-22 19:33:58) > > > Review request for Default and Brad Beckmann. > > > Summary > --- > > my initial implementation of cache flushing > > > Diffs > - >

Re: [m5-dev] Review Request: Ruby: Remove CacheMsg class from SLICC

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/327/#review1004 --- Ship it! - Brad On 2011-03-20 10:53:10, Nilay Vaish wrote: > > --

Re: [m5-dev] Review Request: Network Tester Patch

request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, Nathan > Binkert, and Brad Beckmann. > > > Summary > --- > > This patch adds the network tester for simple and garnet networks. > The tester code is in testers/networktest. > The tester can be invoked by

[m5-dev] changeset in m5: Ruby: dma retry fix

changeset 5f69f1b0039e in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=5f69f1b0039e description: Ruby: dma retry fix This patch fixes the problem where Ruby would fail to call sendRetry on ports after it nacked the port. This patch is particularly helpf

[m5-dev] changeset in m5: MOESI_hammer: minor fixes to full-bit dir

changeset 19a654839a04 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=19a654839a04 description: MOESI_hammer: minor fixes to full-bit dir diffstat: src/mem/protocol/MOESI_hammer-dir.sm | 8 +--- 1 files changed, 5 insertions(+), 3 deletions(-) diffs (39 lines):

[m5-dev] changeset in m5: RubyPort: minor fixes to trace flag and dprintfs

changeset ebb373fcb206 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=ebb373fcb206 description: RubyPort: minor fixes to trace flag and dprintfs diffstat: src/mem/SConscript | 4 ++-- src/mem/ruby/system/RubyPort.cc | 30 +++---

[m5-dev] changeset in m5: ruby: added useful dma progress dprintf

changeset 0b3252d3b400 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=0b3252d3b400 description: ruby: added useful dma progress dprintf diffstat: src/mem/ruby/system/DMASequencer.cc | 5 - 1 files changed, 4 insertions(+), 1 deletions(-) diffs (15 lines): diff

[m5-dev] changeset in m5: slicc: improved invalid transition message

changeset de9e34de70ff in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=de9e34de70ff description: slicc: improved invalid transition message diffstat: src/mem/slicc/symbols/StateMachine.py | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diffs (14 lines): d

[m5-dev] changeset in m5: MOESI_hammer: fixed dma bug with shared data

changeset 519fba665871 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=519fba665871 description: MOESI_hammer: fixed dma bug with shared data diffstat: src/mem/protocol/MOESI_hammer-cache.sm | 35 + src/mem/protocol/MOESI_hammer-dir.sm

[m5-dev] changeset in m5: MOESI_CMP_directory: significant dma bug fixes

changeset d2cf4b19e8ad in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=d2cf4b19e8ad description: MOESI_CMP_directory: significant dma bug fixes diffstat: src/mem/protocol/MOESI_CMP_directory-L1cache.sm | 67 - src/mem/protocol/MOESI_CMP_directory-L2cache.sm |

Re: [m5-dev] Review Request: Ruby: Convert AccessModeType to RubyAccessMode

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/601/#review996 --- Ship it! - Brad On 2011-03-18 21:55:08, Nilay Vaish wrote: > > ---

Re: [m5-dev] Review Request: Ruby: Convert CacheRequestType to RubyRequestType

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/602/#review995 --- Ship it! - Brad On 2011-03-18 21:55:58, Nilay Vaish wrote: > > ---

Re: [m5-dev] Review Request: base: disable FastAlloc in debug builds by default

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/586/#review966 --- Ship it! - Brad On 2011-03-16 10:58:50, Steve Reinhardt wrote: > > ---

Re: [m5-dev] Review Request: This patch makes garnet use the info about active and inactive vnets during allocation and power estimations etc

request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, Nathan > Binkert, and Brad Beckmann. > > > Summary > --- > > This patch makes garnet use the info about active and inactive vnets during > allocation and power estimations etc > > >

Re: [m5-dev] Review Request: fix garnet flexible pipeline

request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, Nathan > Binkert, and Brad Beckmann. > > > Summary > --- > > Minor fixes to garnet flexible pipeline + some more stats. > > > Diffs > - > > src/mem/ruby/network/garnet/flexible-pipeline/Ga

Re: [m5-dev] Review Request: Network Tester Patch

gt; > Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, Nathan > Binkert, and Brad Beckmann. > > > Summary > --- > > This patch adds the network tester for simple and garnet networks. > The tester code is in testers/networktest. > The teste

Re: [m5-dev] Review Request: my initial implementation of cache flushing

-- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/552/ > --- > > (Updated 2011-03-13 19:50:32) > > > Review request for Default and Brad Beckmann. > > > Sum

Re: [m5-dev] Review Request: Network Tester Patch

--- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/561/ > --- > > (Updated 2011-03-11 09:33:50) > > > Review request for Default, Ali Saidi, Gabe Black, Steve Reinha

Re: [m5-dev] Review Request: MOESI_hammer: adding cache flushing

80 chars - Brad On 2011-03-06 16:11:12, Somayeh Sardashti wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.m5sim.org/r/552/ > --- > > (Updated 2011-03-06 16:11:12) > > > Revie

Re: [m5-dev] Review Request: Ruby: Add stall and wait to MESI CMP directory

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/330/#review928 --- Do you have to always call wakeUpAllDependents? Initially it atleast was

Re: [m5-dev] Review Request: Ruby: Fix DPRINTF bugs in PerfectSwitch and MessageBuffer

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/505/#review921 --- Ship it! - Brad On 2011-03-01 13:31:45, Nilay Vaish wrote: > > ---

Re: [m5-dev] Review Request: Ruby: Make DataBlock.hh independent of RubySystem

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/503/#review903 --- Ship it! - Brad On 2011-02-25 10:51:51, Nilay Vaish wrote: > > ---

Re: [m5-dev] Review Request: Ruby: Make Address.hh independent of RubySystem

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/504/#review902 --- Ship it! - Brad On 2011-02-25 10:51:09, Nilay Vaish wrote: > > ---

Re: [m5-dev] Review Request: Ruby: Remove libruby

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/439/#review901 --- Ship it! - Brad On 2011-02-25 08:32:18, Nilay Vaish wrote: > > ---

Re: [m5-dev] Review Request: Ruby: Remove store buffer

--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/507/#review900 --- Ship it! - Brad On 2011-02-25 08:33:43, Nilay Vaish wrote: > > ---

[m5-dev] changeset in m5: regress: MOESI_hammer memtest updates

changeset 3be28ebdb07f in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=3be28ebdb07f description: regress: MOESI_hammer memtest updates diffstat: tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats | 990 +- tests/quick/50.memtest/ref/a

[m5-dev] changeset in m5: ruby: automate permission setting

changeset bf0335d98250 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=bf0335d98250 description: ruby: automate permission setting This patch integrates permissions with cache and memory states, and then automates the setting of permissions within the gen

[m5-dev] changeset in m5: MOESI_hammer: cache probe address clean up

changeset d1eb504fd302 in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=d1eb504fd302 description: MOESI_hammer: cache probe address clean up diffstat: src/mem/protocol/MOESI_hammer-cache.sm | 46 +++-- src/mem/slicc/ast/LocalVariableAST.py

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