In the schematic editor load net list with single pin nets included. This will assign a net name you won't get the drc violation.
Jerry Fisher Assoc. Engineer Pelco 10 Corporate Dr. Orangeburg NY 10962 (845) 398-8700 [EMAIL PROTECTED] -----Original Message----- From: Michael Biggs [mailto:[EMAIL PROTECTED]] Sent: Thursday, April 25, 2002 6:47 PM To: '[EMAIL PROTECTED]' Subject: [PEDA] FBGA fan outs with no net name I am working with a design that has a large FBGA and each pad on this part has a via fanout from it. Not all the pads are assigned a net name on this FBGA. The pins that are not used have no net name and therefore the pad has no net name but I am still giving it a fan out with a small connection to it, incase I ever need to use it. The problem is the design rules flags all these. My question is there any way around this or a design rule I can set up that will not show these no net name fanouts/connections as a violation? Thanks for anyones comments, Michael Biggs * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
