Hello Michael,
Try placing a net label on the unused pin in the schematic. For instance
FPGA_NC001, FPGA_NC002 etc. If I recall it correct this wil result in a
netname for the unused pin. Test it before you fill the schematic with a lot
of labels. At the moment I am not in the situation to check it for you.
Good-Luck
> I am working with a design that has a large FBGA and each pad on this part
> has a via fanout from it. Not all the pads are assigned a net name on this
> FBGA. The pins that are not used have no net name and therefore the pad
has
> no net name but I am still giving it a fan out with a small connection to
> it, incase I ever need to use it. The problem is the design rules flags
all
> these. My question is there any way around this or a design rule I can set
> up that will not show these no net name fanouts/connections as a
violation?
> Thanks for anyones comments,
> Michael Biggs
Aalt Lokhorst (e-mail [EMAIL PROTECTED])
address:
Schut Geometrische Meettechniek bv
Duinkerkenstraat 21
9723 BN Groningen, The Netherlands
tel. +31 50-5877877
fax. +31 50-5877899
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