Dan,
        have you found some certain condition where the Short circuit
constraint works? Previously most of us have thought it was broke (a bug),
because we could not get it to do anything correctly in the circumstances
that we tried.

Sincerely,
Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010
email: [EMAIL PROTECTED]
http://www.norsat.com

Visit us at Booth 2G2-09 at CommunicAsia 2002 in Singapore June 18-21.


> -----Original Message-----
> From: Dan Beaudoin [mailto:[EMAIL PROTECTED]]
> Sent: Thursday, April 25, 2002 4:09 PM
> To: Protel EDA Forum
> Subject: Re: [PEDA] FBGA fan outs with no net name
> 
> 
> Yes.  In Design Rules go to Other tab and select Short 
> Circuit Constraint.
> When you pull it up, change both of the Objects Filtered 
> boxes to say Net
> Class rather than Whole Board and select All Nets.  That will 
> get rid of the
> error.  However, I would wait until the rest of the DRC is 
> clean, because if
> some net gets tied to a free primative (tooling hole or such) 
> that has no
> net, it will not report it as an error, and you could end up 
> with an open on
> the final project.  Of course, if everything on the board is 
> a component, it
> should not be a problem.
> 
> Dan B.
> 

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