Hi John,
        well your test DDB should work because you seem to have all the ports wired 
between the sheets. What I tried to do was as follows.

        I normally work in a flat hierarchy. I use a top sheet that simple has sheet 
symbols to tie the project sheets together as a project. There are no sheet entries, 
no port symbols in the sheets and I use global nets to tie between sheets and when 
designing the schematics I usually try to put the intersheet connections near the left 
or right sheet edges and label them according to which sheets the continue on.

        In this one sheet that was quite packed with components, we removed a 
purchased bandpass filter that was represented as a schematic symbol block with a few 
pins, it was in the middle of the packed schematic sheet. In it's place I stuck a 
small sheet symbol to replace the bought component with a sheet containing a discrete 
filter design. There was no room to add the schematic components on the main sheet and 
I figured the sheet symbol would fit within the space formerly occupied by the 
bandpass filter symbol. The sheet symbol had two ports, "in" and "out", I did the 
lower sheet with two port symbols "in" and "out" then added the discrete bandpass 
filter design.

        So what I was doing was trying to connect the circuit through the two ports, 
maintain my global power nets (not hidden) and I did this twice for two filters. I set 
my connectivity to Net Labels and Ports Global. One would expect this to work, I was 
using global nets (works all the time for me) and I was using wired sheet entries and 
port symbols (note I wasn't relying on ports being global or anything of the sort, 
just straight wired connections).

        Well according to my experience and Craig's comments it doesn't work. This was 
my recollection as well but wanted to refresh my memory amongst the gang. It baffles 
me because I had the ports wired, so why didn't they work? They weren't relying on the 
global connectivity. Another Protel programming genius at work? Ports Global means 
don't connect ports?

        If you want, I can prep my Schematic (take out the juicy proprietary stuff) to 
show the issue and email it to you later ( I am a bit busy trying to get these jobs 
out the door at the moment and One of the DDBs is showing signs of some sort of 
corruption. You know the zooming out into never-never land when you zoom all. Tried 
all the usual tricks for that problem, none have worked thus far. Going into ASCII 
search mode next.)

Brad Velander.

Lead PCB Designer
Norsat International Inc.
Microwave Products
Tel   (604) 292-9089 (direct line)
Fax  (604) 292-9010

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> -----Original Message-----
> From: John A. Ross [Design] [mailto:[EMAIL PROTECTED]
> Sent: Wednesday, July 23, 2003 6:41 AM
> To: Protel EDA Forum
> Subject: Re: [PEDA] P99SE Sheet Symbol & Port connectivity across
> sheets.
> Brad
> You should expect to see a 'snap' to the sheet port at either end, or
> sheet symbol entry port, as you say. 
> I have a test .ddb I made a while ago and I have updated it to see the
> problem you describe, but cannot replicate it, with Ports/Nets set to
> global, it synchs fine. 
> You can download the ddb from http://www.proteluser.com/download it is
> in the /testddb folder. At least you can see a 'working' 
> example of what
> you need.
> Your theory of the grid I think is on the right track, but I thought
> that the snap range should have been enough for the wire to connect,
> only seen grid errors when taking P99SE SH into DXP, so grid issues
> exist, but usually not within 99SE itself.
> Hope this helps
> Best Regards
> John A. Ross
> RSD Communications ltd
> WWW    http://www.rsd.tv
> ==================================  

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