Re: [time-nuts] 5950 Crystal impedance meter manual

[Gerhard Hoffmann]

The DG8SAQ vector network analyzer has a built-in routine to 
characterize crystals.


It may not be "correct" to simply plug them on port 1, but the results 
are quite


reasonable. The right thing to sort out a bag of NOS crystals and 
finding the good ones


or to get a somewhat realistic simulation model.

regards, Gerhard


Am 24.05.2018 um 08:07 schrieb Magnus Danielson:

Hi Bernd,

On 05/24/2018 07:40 AM, Bernd Neubig wrote:


(good stuff snipped)
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Re: [time-nuts] Some thoughts about Crystal Oscillators

[Gerhard Hoffmann]

Am 15.04.2018 um 20:27 schrieb Ulrich Rohde via time-nuts:

Before I forget it, Bernd Neubig seems to build the worlds best Colpitts 
circuit 100 MHz oscillator and uses my published thought to use the crystal 
filter as the noise filter to the next stage. I was never able to get the 
Driscoll oscillator spurious free. Bernd  Neubig can offer more details .



We had a space-proof USO of his, nice. I don't know what's inside.

When it goes below ~ 140dBc / 100MHz / 100 Hz we found that only 10% of 
the crystals were really
good, no matter of Q and extra-extra lapping. I got the idea to build a 
notch array from the
other 90 %. That could be done even at elevated carrier levels that a 
passband crystal filter would
never survive. One just would have to be sure not to tune the oscillator 
over the notches by accident.

I mean, the crystals are there, paid for already and gathering dust.

Their phase noise properties are completely secondary, what matters is 
only series resistance and that

they stay on their frequency.

And 6 dB better is a lot there,  even over a limited range around the 
carrier.

For example, 6 dB less averaging time in an analyzer for the same result.

73, Gerhard


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Re: [time-nuts] Some thoughts about Crystal Oscillators

[Gerhard Hoffmann]

Am 17.03.2018 um 00:57 schrieb Ulrich Rohde via time-nuts:
  
https://synergymwave.com/articles/2013/04/full_article.pdf
  
This may be still of interest... happy weekend, 73  de Ulrich, N1UL





Since the weather did not look so nice this weekend, I canceled a
2-day motorcycle tour and tried the much applauded Colpitts
instead.

I think it is not possible to make it closer to the published circuit.
OK, I dismissed the 0.5fF C0 modifier which is probably only a
placeholder for simulation experiments. I had no 200nH parts, so I took
220nH, 150 nH did not make a difference other than less output voltage.
I did not test the buffer stage because the BFG540 is obsolete
and I could not find anything that fits its weird pinout.

From the Altium Designer to .pdf, to Laser printout on foil as a
photo mask and the contact copy to the unpopulated pcb can be
done in a good hour, so it's a nice weekender.

Circuit:   < 
https://www.flickr.com/photos/137684711@N07/41468657011/in/album-72157662535945536/ 
   >
Layout:  < 
https://www.flickr.com/photos/137684711@N07/40754928234/in/album-72157662535945536/ 
  >
Hardware: < 
https://www.flickr.com/photos/137684711@N07/41427204622/in/album-72157662535945536/ 
  >


It turned out that the circuit, as it is,  leaves the choice of the 
overtone to the crystal.
From a collection of 100...120MHz crystals not one worked at the 
intended overtone.

There were results from 20 to 70 MHz.
The test point is where the BFG540 emitter would be.

< 
https://www.flickr.com/photos/137684711@N07/40754932194/in/album-72157662535945536/ 
  >
< 
https://www.flickr.com/photos/137684711@N07/41468662151/in/album-72157662535945536/ 
  >
< 
https://www.flickr.com/photos/137684711@N07/40754931924/in/album-72157662535945536/ 
  >


I forwent measuring the phase noise.

Call me amateurish again, but I'll stay with the Driscoll. It has the 
tank circuit to enforce
the correct overtone and I can adjust the delay so that 0 degrees around 
the loop
coincides with maximum dp/df. Maximum Q helps nothing when it does not 
happen on the

oscillation frequency.

When I'm asked in a design review how I have made sure that the 
frequency of a single point
of failure VCXO is not off by 30 to 80 percent, then I like to have an 
answer.




And WRT vastly changing transistor parameters: They don't need to. If 
one looks into the emitter
of a BJT at 10 or 20 mA bias, one sees 1 or 2 Ohms.  That depends only 
on Ic, K, T, q and some

minor parasitics such as RE.
The emitter is fed by the crystal in Driscoll's case with 50 to 70 Ohms 
on resonance, which takes
nice care of the transistor's shot noise. Off frequency it gets even 
better, esp. with C0 compensation.


The base is fed with a huge step down ratio, so the base voltage is 
stiff. The cascode isolates from the
effects of the tank circuit and it can easily be bootstrapped. If one 
dislikes Schottky limiting, one can
duplicate the cascode transistor and divert some of the RF current to 
nirvana and not to the transformer,

whenever the AGC voltage wants that.
So the environment of the crystal and the sustaining amplifier can be 
very, very time-invariant.
The whole thing is just a current conveyor belt with the crystal 
enforcing the current trough the

whole cascode to the tank/load. The output IS the resonator current.

That is the very same structure as the proposals to extract to output 
"directly from the resonator,

where it has the best SNR".
Given the little bit of power that we can steal from the resonator: must 
we really split it between
extraction amplifier and sustaining amplifier right at the location 
where the signal is weakest?


When we can build an extraction amplifier that adds less noise than the 
sustaining amplifier, why don't
we take the feedback also from there and cut out the sust.amp. and the 
signal power it requires?

The Driscoll does that.



regards,
Gerhard, DK4XP

(the loyal heretic :-)









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[time-nuts] Wavecrest DTS2075

[Gerhard Hoffmann]

I have been offered a DTS2075. Is this generally regarded as a step

forward if you already have a SR620 or is it more or less the same

league? Are there any hidden pearls or caveats?


TIA and best regards,

Gerhard



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Re: [time-nuts] Cheap jitter measurements

[Gerhard Hoffmann]

Am 10.04.2018 um 01:03 schrieb Gary E. Miller:

Yo Hal!

On Mon, 09 Apr 2018 13:53:21 -0700
Hal Murray  wrote:


The API  for the kernel clock can be read to a ns.  I don't see ntpd
having much use for finer grain than that.  I should look at the
source to see what the internal details look like.

Yeah, but the granularity is much worse.



And with the new generation of attacks against the prefetch queue /
instruction decoder latency that probably will be blurred even more.

I don't expect my computers' clock to be more precise than needed
for makefiles. Anything more precise is better taken care of by hardware.

regards, Gerhard



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Re: [time-nuts] TV Signals as a frequency reference

[Gerhard Hoffmann]

Am 31.03.2018 um 00:13 schrieb Hal Murray:

fgr...@otiengineering.com said:

   Now that analog TV has gone away, so
   have these signals.

What do the local TV stations use for a frequency reference?

Are there low cost receivers that also produce a good reference frequency?


The German channel ZDF was known to have their line frequency
derived from a Rubidium, when received from the air.
But already on cable, there might have been elastic buffers.

Now with sat and terrestrial TV gone digital, there is no such
thing as a line frequency in the MPEG data stream.
You are 30 years too late  ;-)

But you can find the pseudo noise of the satellite's own
navigation loops abt. 20 dB below the MPEG.
If you know the polynomial, you are back in time nuts land.

The 20 dB are enough that there is no interference. I wonder
how many secret services are parasites on the commercial
TV transponders. The power required for 1 Kbit/sec of
stealth transfer should be much, much lower. Even less when
you just want to disseminate a new key, with the mass transfers
done somewhere else.  Nobody would notice that. Just use
your own polynomial. With a dish on  every house that already
points to the right direction, you just need a modded feed unit.
If that is not tempting!


regards, Gerhard


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Re: [time-nuts] ULN regulator with more current capability than LT3042?

[Gerhard Hoffmann]

Am 20.03.2018 um 10:09 schrieb Attila Kinali:

Hoi Gerhard,

On Sun, 18 Mar 2018 21:41:28 +0100
Gerhard Hoffmann <dk...@arcor.de> wrote:


Use the LT3042 with an external power transistor, such as D44VH10G:

<
https://www.flickr.com/photos/137684711@N07/29197476530/in/album-72157662535945536/
  >

Performance is about the same as the LT3042 alone. That is exactly the
circuit from the data sheet

Have you measured it's dynamic performance?
I did some spice simulations some time ago and noticed that there are
some load conditions where this circuit is very close to oscillation
(ie load changes lead to heavy ringing)of course, this is under
the assumption that the spice model of the LT3042 is accurate in that
regard.

No, I didn't. My oscillators are quite boring loads for a regulator.

regards, Gerhard

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Re: [time-nuts] Use the LT3042 for retrofit?

[Gerhard Hoffmann]

Am 21.03.2018 um 23:03 schrieb Hal Murray:

kb...@n1k.org said:
[context is EFC control voltage]

Generally, the biggest factor is the voltage drop from the oven current
getting into the EFC “loop�. Its actually pretty hard to keep them separate.

Is there a fundamental problem, or is it just that everybody uses historical
footprints that don't have separate ground pins?


The HP 10811 has separate pins for oscillator and oven, for
power and gnd, and 2 of them for each of the four.

regards, Gerhard
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Re: [time-nuts] ULN regulator with more current capability than LT3042?

[Gerhard Hoffmann]

Am 18.03.2018 um 21:13 schrieb John Ackermann N8UR:
Reviving the conversation about superb voltage regulators, I am 
looking for one to run the analog and PLL bits of a high performance 
frequency synthesizer chip.


The current drain looks to be about 160-180 mA at 1.8 V, which is 
uncomfortably close to the limit for the LT3042 (200 mA).  The 
manufacturer's evaluation board uses a MAX8869, which appears to be 
nowhere in the LT3042's league, but will source 1 A.


Any recommendations for a 1.8 V regulator a little beefier than the 
LT3042, but with similar noise performance?





Use the LT3042 with an external power transistor, such as D44VH10G:

< 
https://www.flickr.com/photos/137684711@N07/29197476530/in/album-72157662535945536/ 
>


Performance is about the same as the LT3042 alone. That is exactly the 
circuit from the data sheet.


< 
https://www.flickr.com/photos/137684711@N07/29452163806/in/album-72157662535945536/ 
>


The layout for Altium Designer is available.

The LT3045 is not so much bigger that it makes a real progress. The 
currents are valid only

for tiny voltage drops anyway.

regards,
Gerhard

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Re: [time-nuts] ?==?utf-8?q? Suggest time-and-tech related locations in Switzerland

[Gerhard Hoffmann]

Am 15.03.2018 um 19:07 schrieb Henk Peek:

Hi Dave,

I, you and more time-nuts (?) go to the Hamradio meeting Friedrichshafen June 1 
- 3. Is there interest in an informal be together?

I also plan to go to Friedrichshafen.

WRT Switzerland, I'll leave that to Attila.  It's his home turf, after 
all. :-)


regards,

Gerhard, DK4XP
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Re: [time-nuts] Frequency deviations in Europe affect clocks

[Gerhard Hoffmann]

Am 07.03.2018 um 22:09 schrieb Poul-Henning Kamp:



This explains why my oven clock and the time/temperature display
on the building outside my apartment in Switzerland are six minutes
slow since January. It was a great mystery to me.

Can you get a picture of this ?  It would be wonderful to have for future 
discussions...


Does that help?

< 
https://www.flickr.com/photos/137684711@N07/38870750440/in/album-72157662535945536/ 
        >


Input to the counter is just an AC wall wart with a voltage divider to 4Vpp.
Now, the frequency has risen to above 50.02 Hz constantly. It is in the 
middle of the night after all.

They have to catch up.

BTW I have decided to build an analog phase noise tester of my own. This 
weekend

I did most of the mechanical things, but it is still in a kit state.

The pictures are to the left of the 49 Hz-Pic.
The 1-to-6 coax relays are part of the switchable lambda/4 delay line, 
so I can enforce

quadrature everywhere above 5 MHz, including unknown amplifiers etc.
Still looking for 2 more 1:6 relays.

The mixers and dividers are in stereo, so I can do cross correlation in 
the 89441A.
One of the mixer/preamp units is open, the ref oscillators will be 
MTI-260s on

my oscillator carrier board.

Have a good night,
Gerhard

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Re: [time-nuts] Need a Watch Recommendation

[Gerhard Hoffmann]

Am 05.03.2018 um 14:01 schrieb Bob kb8tq:

If you want to stick with WWV, the Citizen “Ecco Drive” (solar) WWVB

ECO-Drive

watches are a pretty good option. Until I caved in to the wonders of
a cell phone on my wrist, I used them for many years. Nothing to fuss
with. No battery to die on you. Always keeps the right time. Available
in titanium. The only drawback is the limited number of styles they
make it in. You may or may not see one you like the looks of.



I second that. In Europe, it synchronizes to DCF77 and in
Japan to Fukushima, if that should be operational again.

I wonder how they make it, that it lives from just a few
photons now & then, year after year.

Gerhard

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Re: [time-nuts] Microsemi up for sale?

[Gerhard Hoffmann]

Am 04.03.2018 um 04:04 schrieb Richard (Rick) Karlquist:

When I was working on fiber optic communication test,
I remember hearing about lasers that were "tuned" with
variable Peltier coolers.  Power consumption is critical in
a cesium standard that can run on batteries.  Maybe
the power consumption of the coolers is a deal breaker.

I have seen that stunt at SHF Design in Berlin, don't dare to
calculate how long ago..

There were 2 lasers mixed with a 60 GHz beat frequency.
Playing with one of the Peltiers moved that to 50 GHz.
Easy to see the carrier creep on the spectrum analyzer.

Cheers, Gerhard


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Re: [time-nuts] 50 ohm drivers

[Gerhard Hoffmann]

Am 04.03.2018 um 03:17 schrieb David C. Partridge:

Brice said:


. Some fast CMOS devices (esp clock drivers) have an output R close to 50

ohms as they are intended to drive 50 ohm source terminated transmission
lines.

Any in particular that you'd recommend?   I need to drive a 50ohm line and a
single gate inverter doesn't have the grunt to do so ...

Back in 80386 times, when AMD still cared about MSI, there were DRAM 
drivers with symmetrical output impedance for the Hi and Lo states. 
Today that is done by the PC chip set, with different levels.


Not very much later, I had a bus fight between a 74AS244 (saying LO!) 
and a prehistoric
Xilinx XC3020 FPGA (saying Hi!) . The AS244 was specc'ed at > 64 mA, 
used to be the
king of the hill. But the XC3020 _enforced_ a _valid HI_ . These CMOS 
thingies CAN drive

if you let them.

In my 10 MHz mod for the Lucent KS24361 I used 2 CMOS single gates with 
100 Ohms

each in series,
< 
https://www.flickr.com/photos/137684711@N07/32245910240/in/album-72157662535945536/lightbox/ 
   >


the falling edge looks like that:
< 
https://www.flickr.com/photos/137684711@N07/31781694064/in/album-72157662535945536/lightbox/ 
>


For the rising edge follow the arrow to the right.

Remember, when you terminate at the load with 50 Ohms, too, you get only
half the voltage. A 5V driver will deliver only 2.5V, nice for 2V5 CMOS, 
74HCT,

TTL and friends; quite OK for 3V3 CMOS.
I do like coax cable that is terminated in 50 Ohms.  On both sides.

Fairchild has a 74LVC family that features 7V abs max ratings; at 6.4V
that should produce picture book 3V3 levels.

Now I use 3 gates with 150 Ohms each; whatever the gate's output 
impedance is,

it doesn't matter any more against the 150 Ohm. Watch out that a gate with
elevated Vcc may need a higher HI level itself.

At 6V it rises/falls even somewhat faster.

The 3 single gates do not occupy more space than a SO-14, including their
termination resistors.

regards, Gerhard


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Re: [time-nuts] Allan variance by sine-wave fitting

[Gerhard Hoffmann]

Am 26.02.2018 um 20:20 schrieb Tom Van Baak:

Fun fact -- there's a wide spur at ~2 Hz on the 5065A phase noise plot. What do 
you think that is? On a hunch I opened the front panel and reset the blinking 
amber battery alarm lamp, and voila, that noise went away. Makes sense when you 
think of the power variations associated with a blinking incandescent lamp.


There was a Tektronix sampler that had a few ps sampling jitter to the tune
of a blinking LED on the mainframe  :-)

Cheers, Gerhard
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Re: [time-nuts] Replacement A9 boards for the HP 5065A

[Gerhard Hoffmann]

Am 25.02.2018 um 13:46 schrieb Azelio Boriani:

The part number BFC234421475, on 
seems to be a Philips product, 2500 available, for 49.28 UAH
(Ukrainian Hryvnia, that is 1.77 USD). A mysterious capacitor...

Why not go to Mouser or DK, as usual?

Or to the source itself:
<  https://www.wima.de/en/  >

(Abt. an hour of driving from where I'm now).

BTW last time I bought some at DK/Mouser, there was
a pricing artefact, in that 5% was cheaper than 10%

:-)  Gerhard


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Re: [time-nuts] Replacement A9 boards for the HP 5065A

[Gerhard Hoffmann]

Am 25.02.2018 um 00:45 schrieb cdel...@juno.com:

Hi,

I'm working to make some replacement A9 boards for the HP 5065A to the
new style schematic.

Will share the Gerber file when done.

The integrator capacitor is a 1986 vintage TRW 5.0ufd 50V 10% .42"DX1.0"L
axial.

Of course it has an HP part number and no manufactures #.

Any guess as to what type it is?

Polycarbonate, polypropylene, ???

Just wanting to find a good modern replacement for its use. (Integrator
with a 50ms time constant.)


50 ms integration time and 5uF+-20% does not sound like a
leakage current problem. Polypropylene seems good enough.
Teflon would be a joke. I might even go with WIMA MKS4
(Polyester) if I had them in the drawer. Dielectric absorption
is also not a problem at these impedance levels and time constants.

When I recapped the electrolytics in my 4274A RLC bridge, it was
hard to find capacitors that fit the board footprint of the old ones.
Usually I had to choose 2 or 3 times the voltage so that they would
fit the board.  But that is a luxury problem. :-)


< 
https://www.digikey.de/products/de/capacitors/film-capacitors/62?k===e340004%2Ce340007%2Ce340055%2C1f14%2Cmu4.7%C2%B5F%7C2049%2Cmu5.1%C2%B5F%7C2049%2Cmu5%C2%B5F%7C2049%2Cffe0003e=0=0=1=1=25 
  >


Mouser.com  should have just as much.

regards, Gerhard


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Re: [time-nuts] power supply design Re: Slightly OT: interest in a four-output, > ultra-low jitter, synthesizer block?

[Gerhard Hoffmann]

Am 26.01.2018 um 05:26 schrieb Mark Goldberg:

On Thu, Jan 25, 2018 at 8:51 PM, jimlux  wrote:


What we've done is switcher from wide range bus (9-24V) to 8V, 60 dB
ultimate attenuation low pass, switcher 8V to 5V(e.g.), 60 db low pass,
linear with great HF rejection (i.e. the LT3042) to 3V


If it is any help to someone, I did some research on low noise regulators
to drive a low phase noise oscillator. You will have to look at this in a
fixed width font. LT3042 is indeed a spectacular part with way less noise
than the baseline LT3009. Hopefully no mistakes below. Pricing is about 2
years old.


Yes, the LT3042 is in a completely different league than the ordinary
LM317, LM350, LM2940, 7805. It has simply 40 dB less noise than the rest.

Don't overdo it with the output capacitor, 4.7u is ideal. 22u produces
a noise peak at 15KHz.

< 
https://www.flickr.com/photos/137684711@N07/24070698809/in/album-72157662535945536/ 
  >


The high current version with the external NPN is also fine.
< 
https://www.flickr.com/photos/137684711@N07/29452163806/in/album-72157662535945536/ 
>


The test circuit is quite small, 1:1 from the data sheet.
< 
https://www.flickr.com/photos/137684711@N07/29197476530/in/album-72157662535945536/ 
>


The steep rise below 100 Hz is an artefact of the too small coupling 
capacitor

of my preamp and the 1/f behavior of the 89441A that I used as FFT analyzer.

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Re: [time-nuts] minimalist sine to square

[Gerhard Hoffmann]

Am 19.01.2018 um 20:31 schrieb Tom Van Baak:

John's TADD-2-mini [1] uses the Wenzel sine-to-square converter. It performs 
very well but requires +10 V.

I'm looking for a solution that works at 5 V (e.g., USB powered) and also uses 
fewer parts. Wenzel also mentions using a differential line receiver [2]. That 
would be an ideal single-chip 5 V solution for me but the two parts he 
mentions, MC1489 [3] and SN55182 [4], don't appear fast enough for a 10 MHz 
input.

Can any of you circuit experts suggest some line receivers that would work? 
Maybe DS9637 [5]? This isn't for cesium work so it doesn't have to be quite as 
good as the TADD-2.

< http://cds.linear.com/docs/en/datasheet/6957fb.pdf >
< http://cds.linear.com/docs/en/design-note/dn514f.pdf >

I have used it, found no problems. It is somewhat small :-)

regards, Gerhard



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Re: [time-nuts] Down-conversion to IF and sampling

[Gerhard Hoffmann]

Am 11.01.2018 um 10:57 schrieb Stephan Sandenbergh:

I plotted the result for a few oscillator drift rate values. It seems that
the 'extra' error introduced by the imperfect ADC time base would be
negligible for many applications for OCXO drift rates or better. This is
likely the reason why it is often ignored.

There is no reason to assume that an ADC time base should be more
imperfect than a down converter time base.


On Mon, Dec 25, 2017 at 3:11 AM Attila Kinali  wrote:



As Tim Shoppa mentioned, you do not want to have a ratio with small
integers
between the LO frequency and the sampling frequency, as any feedthrough of
the LO and its harmonics will lead to a DC offset and spurs. The amplitude
of both will depend on the exact phase relation between the LO frequency
and the sampling frequency, which is usually stable, but not time-nuts
stable.



No, what I really want is having no LO frequency at all. I'd like to 
start with a Pascall
class 100 MHz osc, maybe locked to the house reference. Multiply up to 
800, 1200 or
2400 MHz using barndoor-wide filters that have a constant delay on the 
center frequency.

The spurii are 100 MHz far away or multiples thereof at the later stages.

The ADC would be an Analog Devices AD9680, AD9208 or similar from TI. 
These are
dual ADCs already, with 2 of them we could play most of the tricks of 
the Timepod,

just sampling directly in L-band included.

Use the built-in DDS and down converters with small integers that 
produce no birdies.
Filter and decimate like hell. Here we get the phase noise performance 
back that we
have lost in  multiplication. This down conversion/filtering/decimation 
is available twice

in each ADC chip, no need for DIY.

When we have long words at a comfortably slow sample rate, we can 
transfer them
via the JESD204B links to a mid size ZYNC system on chip, for further 
processing in
its FPGA and/or CPUs, with Linux, network access and all the comfort we 
are used to.


There are also interpolating/up sampling DACs for the transmitter if 
needed. The

G5 phone system gives us nice building blocks to play with.
That all would fit on a 3*5 inch board, like some Red Pitaya on steroids.

<  http://www.analog.com/en/search.html?q=ad9680   >
<  https://www.redpitaya.com/c96/stemsuplabsup-125-14   >


cheers, Gerhard




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Re: [time-nuts] AM vs PM noise of signal sources

[Gerhard Hoffmann]

Am 07.01.2018 um 17:05 schrieb Arnold Tibus:


but I see quite often mentioned the 'Wein bridge'. (Wein in german is 
'vino' or 'wine' ;-)
Not of real technical importance, but shouldn't this not be correctly 
called a 'Wien bridge'?

As I know that this tricky circuit was developed by Max Wien in 1891.
Max Karl Werner Wien was a German physicist and the director of the 
Institute of Physics at the University of Jena at that time.

 (sorry, I am a nut ;-)  )



He shares that fate with a certain Mr. Seimens and the famous Oscar 
Meyer Weiner.
That must be a German->American sound shift, some kind of extension to 
Grimm's law.


There also was a Mr. Hamming, but there never was a Mr. Hanning, at 
least not

in the business of weighting contents of time series.

That guy with the window function was one Mr. Julius von Hann, an
Austrian Meteorologist. It is therefore the Hann window.

<    https://en.wikipedia.org/wiki/Julius_von_Hann    >

cheers, Gerhard


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Re: [time-nuts] Determining Allan Deviation From Interpolated Peak Frequency Readings

[Gerhard Hoffmann]

Am 16.12.2017 um 11:57 schrieb Attila Kinali:



[1] "Oscillator metrology with software defined radio",
by Sherman and Jördens, 2016
https://arxiv.org/abs/1605.03505


I have seen this paper before. Unfortunately, it is a lot more work to
implement than what I have already done. I am really a hardware engineer,
with decades old education in control systems that has not been used in a
long time. It would take getting my brain back in gear and re-studying, not
a bad thing actually!

The other issue is the Perseus drivers have issues under Windows 10 that
may or may not be solved. I was able to get it to work with Spectrum Lab,
but it does not work with many other tools that would be able to implement
this algorithm.

That said, I may look into it further in the future.

Apparently the Perseus is supported by GnuRadio[1]. Which means you can
just click your control system together (similar to LabView). According
to [2] the driver uses libusb and works on windows as well.

If you want to use GnuRadio, I suggest you go to one of the many Hackfests[3]
they have and let them jump-start you (I started this way years ago).


I'm about to buy a RedPitaya Stemlab 125-14. Cost is just €310 in .de,
seems to have respectable performance, can emulate the
GnuRadio hardware boards more or less right out of the box,
Win  & Linux.

And it is a nice stepping stone to what I really want: a bigger ZYNC
with JESD204B support, AD9680/ADC32RF45 ADCs & AD9142 or
similar DACs for direct L-band digitizing. No more
phase-shifting preselector or IF filters.
There seem to appear better ADC/DAC chips every month for Gen5.

That could be a Timepod++  :-)

regards, Gerhard

<  https://www.redpitaya.com/c96/stemsuplabsup-125-14   >
< http://pavel-demin.github.io/red-pitaya-notes/sdr-transceiver-hpsdr/ >




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Re: [time-nuts] Recommendation for cheap GBIP adapter for Linux

[Gerhard Hoffmann]

I have bought a Prologix GPIB/USB controller. There is a LAN version also.

The German distributor is stantronic.de.

You can get mine for a limited time to see if it fits. I was able to solve

my own problem via LAN w/o adapter.

regards, Gerhard




Am 18.11.2017 um 20:04 schrieb Attila Kinali:

Hi,

I have a need for a GBIP adapter that I can use with Linux.
It shouldn't be too expensive, but I rather spend a few bucks
more for ease of use. Where "ease of use" means I don't have
problems with weird drivers on Linux (Windows doesn't matter at all).
I do not mind writing my own read-out software (that's quickly and
easily done). What would people here recommend?


Attila Kinali


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Re: [time-nuts] Lucent RFTG-u REF0-REF1 cable

[Gerhard Hoffmann]

Am 15.11.2017 um 05:06 schrieb Jerry Hancock:

problem solved.  I also have to get the 10Mhz out of the REF1 but that looks 
easy.
It is best to just double the 5 MHz that comes straight from the MTI-260 
oven.


<  http://www.hoffmann-hochfrequenz.de/downloads/DoubDist.pdf >

regards, Gerhard



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Re: [time-nuts] Spice simulation of PSRR and phase noise

[Gerhard Hoffmann]

Am 22.10.2017 um 22:58 schrieb Bruce Griffiths:

Hoi Attila

Since close in phase noise can result from up conversion of supply noise etc 
via circuit non linearities, using an AC analysis won't work.

Only transient simulation or perhaps analytical modelling of the various non 
linearities will provide accurate estimates of upconverted PN. If you use 
transient simulation techniques increasing the level of the various noise 
sources above the actual levels encountered in real circuits and then 
correcting the resultant PN back to the level that would be encountered in the 
actual circuit (using the results of analytical modelling) may be a useful way 
to reduce simulation time or at least overcome some of the challenges 
associated with accurately determining low level PN from a simulation.

There are some in the LTSpice Yahoo group attempting this but they seem way out 
of touch with the amount of simulation data required. I've provided them with 
the appropriate formulae to extract PN from the the amplitude spectra. At the 
moment they appear bogged down with some somewhat trivial peripheral issues.


In a previous life, when I was an EE student, we had to write all the
relevant algorithms ourselves, like building the conductance matrix,
finding the operating point, linearizing nonlinear devices around the
OP, doing the integration over time, companion models etc, b4 we were
given the Spice 2G4 sources...

(Attila, that was a few 100 meters from where you seem to work right
now. There was a beautiful TR440!)

Given that we often enough see convergence problems in integration over
time to the point that the simulator gives up altogether, especially
when there are high Q resonances or nonlinearities around, and that
these errors look like phase noise, I would never ever trust a FFT
result at, say, the -140 dBc level. And there it just starts to be
interesting.

As much as I like to use LTspice, it's easy availability blocks any fast
progress in the public spices like adding HB, s-params by diverting
people to experiment with add-ons instead of solving the fundamental
issues. X/Ngspice and QUCS are nice but understaffed for sure.

regards, Gerhard.

(who was designing a chopper amplifier in the 140 pV/rt Hz league this
rainy weekend and did not even try to simulate its noise. The
interesting part of it would never make it through the pot core
transformer.)



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Re: [time-nuts] Fast Rise/Fall Time Pulser

[Gerhard Hoffmann]

Am 10.10.2017 um 22:25 schrieb Magnus Danielson:

This one, if you read what is written there:

http://www.analog.com/en/products/linear-products/comparators/adcmp572.html#product-overview 





I have used a ADCMP580 comparator on a home etched board

with semi rigid for the outputs. This is what I got from it:


< 
https://www.flickr.com/photos/137684711@N07/33305853110/in/album-72157662535945536/ 
>


I have also experimented with BAT15 Schottky limiters to get less rise 
time at the cost of less amplitude.


That has been replaced by a 54754A differential TDR in the mean time :-)

The scope knows its own risetimes and can calculate them away, at least 
somewhat.


BNC and 40 ps rise time don't go together well.


Cheers, Gerhard






On 10/10/2017 10:20 PM, Bruce Griffiths wrote:

It appears to be merely an ECL comparator;
https://www.eevblog.com/forum/projects/yet-another-fast-edge-pulse-generator/ 



Bruce
On 11 October 2017 at 09:14 Magnus Danielson 
 wrote:



Hi,

On 10/10/2017 09:42 PM, Brooke Clarke wrote:

Hi Larry:

How does it work.
When I was working with microwave semis it was either a tunnel 
diode or

a Step Recovery Diode.



Looking at the pictures, it seems like the surface mounted chip marked
AJK AAA is the driver-chip that connects through a capacitor over to 
the

centerlead of the BNC output.

Some form of driver, and setup such that amplitude scale can be 
controlled.


Cheers,
Magnus
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Re: [time-nuts] 5071A Reference Oscillator ?

[Gerhard Hoffmann]

It was a 10811 that I modified to get more tuning range by replacing
the stock varactor with a hyperabrupt type, probably my favorite
MV209, but I can't remember for sure.

Just yesterday, I designed a phase modulator using an MV209.



Joined the club of obsolescence.
Digikey: No Stock, no price.

Just like the BF862, my favorite FET and BFG31, the last RF PNP
that could stand a little power.  :-(
There were lots of them in my distribution amplifier.

Not recommended for new designs: NXP.

Gerhard, DK4XP
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Re: [time-nuts] sine to square wave circuits - performance data?

[Gerhard Hoffmann]

Am 05.10.2017 um 00:33 schrieb Bob kb8tq:

Hi

The other issue could be that no diode ever operates instantaneously ….

Bottom line is indeed that clipping in protection diodes is not a good idea. 
External
diodes …. who knows ….


And when it clips, it provides a low impedance connection
between the input and the power supply. Nobody knows
the recovery time.

Gerhard
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Re: [time-nuts] TAPR TICC boxed (input protection)

[Gerhard Hoffmann]

Am 08.04.2017 um 17:52 schrieb David:


If they are not being tested, then where is the maximum specified
leakage number coming from?  For a small signal bipolar transistor it
will typically be 25nA, 50nA, or 100nA, but the InterFET datasheet (1)
shows 10pA maximum and 1pA maximum for the A versions.

The large print giveth and the small print taketh away.

Usually there are footnotes and weasel words like "sample tested",
"by characterisation" or "not production tested".
The time such a small device sits on the wafer tester costs much more
than the silicon. For 100 msec.
At 1 pA it takes an eternity until the capacitances in the setup
are charged. Just the waiting time makes such a diode or FET
a premium part.


When this discussion of low leakage input protection started, I did a
quick search for inexpensive alternatives to the 4117/4118/4119 JFETs
and came up with nothing; all of the inexpensive JFETs are much worse
until you get to premium devices.

(1) I only picked the InterFET datasheet because it was the most
readily available of the ones you mentioned.  The current Fairchild
and Linear Systems datasheets show the same thing.

Ouch, Interfet and data sheet in one sentence!  But then they could
condense it further and just give the abs.max. ratings. I have
checked out my first 7 pairs of IF3602. Some have > 100 mA
at Vgs=-0.5V, others don't have any drain current at all. I wanted
to parallel 4 pairs for noise reasons, found just 2 pairs that are
reasonably similar. At €50 a pop finding another matching 2 will cost
a pretty penny probably.

The noise spec also seems "optimistic" and there was troubling gate
current with the 2 pairs, even at Vdd=2V. The 1/f corner seems to be
OK at 30 Hz.

Back to input protection:

Someone in the sci.electronics.design group mentioned these
< https://www.digikey.de/products/de?keywords=cmpd6001s >
but, as usual, typical values, and watch the plot with the temperature
as parameter. At least they are cheap.

Also interesting, while not exactly low leakage diodes, are these
USB3 lightning arrestors:
< https://www.digikey.de/products/de?keywords=296-25509-1-nd >
Looks like they don't spoil the timing.

regards, Gerhard






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Re: [time-nuts] Single ended or differential input to TDC chip

[Gerhard Hoffmann]

Hi, Attila!

Somewhere you'll have to produce sharp differential edges and this
semi-analogue stuff is probably hard on a chip shared with thousands of
other gates and a digital process. Going differentially into the chip will
reduce the effects of ground bounce etc a lot.

This is what you can expect from an ADCMP580 on a homebrew
board and soldered-in semi rigid cable:
< 
https://www.flickr.com/photos/137684711@N07/33305853110/in/album-72157662535945536/ 
>


Some will cry: eeek - a comparator, and an ECL or CML one at that, but 
in the end
it is just a differential amplifier like that Wenzel design, made by 
people who

know their SiGe process.

If you have a slowly rising source, you'll need multi-stage slope 
amplification
and low pass filtering in Collins style anyway which will be safer to do 
off-chip.


If you can specify the interface, go for something speedy, then
the guys who do the the signal source have the hard time and
can be pointed at.  :-))

regards, Gerhard



Am 27.03.2017 um 18:05 schrieb Attila Kinali:

Hi,

We (the group I am with and a group at TU Vienna) are currently designing
an ASIC (digital 65nm process) that will contain a TDC part. The TDC will
be a simple delay line TDC design using differential buffers, which we
expect to give us something in the order of 20ps of resolution (hopefully
better, but we will not know until we get post-layout simulation data).
We are loosely following the design CERN came up with for their new TDC chip[1].


Now, the TDC expects a differential input, but the system gets single-ended
pulses as input (50R coax input, level likely to be CMOS 3.3V, but level not
fixed yet, ie can be freely choosen). I can either convert these single-ended
signals into differential off-chip or on-chip. Unfortunately, I lack knowledge
and experience to judge either approach. The issues I see are:

* Single-ended input in a chip might lead to shifting ground potential
   on the chip and thus to measurment jitter.
* There are different architectures to preform the single-ended to differential
   conversion on-chip, but I have no clue which one to choose or even how
   to judge them without extensive simulations for which we do not have the
   time, know-how and probably not even the tools.
* Conversion to differential off-chip means another component off-chip
   that might introduce additional delay uncertainty (our application is
   very sensitive to that) and an unknown amount of jitter.

My google foo has been so far not strong enough to find answers to these
questions.

I would appreciate if someone could give me some hints in this matter
or tell me where I could find appropriate literature and maybe even
tell me whether I am missing anything.

Thanks in advance

Attila Kinali

[1] 
https://indico.cern.ch/event/228972/contributions/1539621/attachments/378552/526492/TDC_TWEPP_2013.pdf



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Re: [time-nuts] Optimal oscillator topology for diffrent frequency range

[Gerhard Hoffmann]

Am 06.02.2017 um 14:08 schrieb Richard (Rick) Karlquist:

Agreed, for low phase noise FLOOR, it is imperative to
take the signal out through the crystal.  However, for
close in noise (say ADEV at t=1), the Driscoll has
worked well for me.  I have been able to reach ADEV
= 10^-11 at 100 MHz at using suitable resonators.

Rick


But one won't be able to use the power right out of the crystal
for anything. So it will have to be amplified & buffered.

If you can do that without lifting the noise floor, then
you've got to ask yourself one question  :-)

Why don't I use that little wonder for the sustaining amplifier, too?

And - why do I divide the precious crystal power between the 2
amplifiers at the location where it hurts most: where the level is smallest?

When you compare the Driscoll and the Burgoon (sp??) output
coupling through the crystal, you see it is exactly the same.
One might even apply the current step up trick from Burgoon.

The current through the drains/collectors is enforced by the
crystal, operating into a near-short. Off-resonance the transistor
has complete negative feedback and no gain.

On the output side of the buffer, losing a dB or two for sustaining
the oscillation does not hurt.


A thing I do not like about the typical Colpitts is that it is never
on the series resonance of the crystal. That means that
the feedback divider is part of the resonance which increases
the number of critical parts.

In the Driscoll, the sustaining feedback is quite a wideband thing
and mostly decoupled from the sharp crystal resonance.


regards, Gerhard, DK4XP





On 2/6/2017 4:35 AM, ka2...@aol.com wrote:
Not quiet, using the crystal also as filter gives much better numbers 
,

73 de Ulrich N1UL

In a message dated 2/6/2017 7:30:33 A.M. Eastern Standard Time,
rich...@karlquist.com writes:

I would say the 2 stage "Driscoll" oscillator is the
way to go.  I have had good luck with it up to 100 MHz.
The first stage has the crystal in series with the
emitter, but is otherwise a grounded emitter stage.
The second stage is in cascode as a grounded base.
The important operating condition is that only
the second stage limits.  First publications on
it were in the early 1970's (search Michael Driscoll).

Rick Karlquist N6RK 


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Re: [time-nuts] Power Problems Lucent KS-24361, L101 & L102

[Gerhard Hoffmann]

Am 05.02.2017 um 04:29 schrieb Hal Murray:

b...@baylorhill.com said:

Where does pin three (P1) connect. I may have  trashed both units. Are
schematics available.

I don't know of any schematics.  I would take it apart and see if anything is
connected to any of the other pins on those connectors.  Or measure the
resistance from the outside.


I also know of no schematics, but I took some photos when I made the 10 
MHz output and the


distribution amplifier for mine. The power input seems quite simple. 
Everything goes straight


into the DC/DC converter. Probably the input is not referenced to 
ground. There are just some


chokes and a reservoir capacitor. There is a diode, too. It looks too 
weak for use as a crowbar


or as a series diode.


< 
https://www.flickr.com/photos/137684711@N07/31906174553/in/album-72157662535945536/ 
>


(GPS board removed)


regards, Gerhard

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Re: [time-nuts] Thunderbolt Harmonics

[Gerhard Hoffmann]

Am 18.01.2017 um 22:12 schrieb Bob Camp:

Yeah, but it's easier (cheaper if you're paying for labor) just to buy a box of 
10 filters at $30/each and stack them

Be *very* careful cascading those Min-Circuits filters without putting some 
sort of isolation between them. You can get all
sorts of wonky results as the reactances in one mis-terminates the reactances 
in another.

Bob

But you can be quite lucky:

1 SLP15+ filter (15 MHz Low pass):
< 
https://www.flickr.com/photos/137684711@N07/31554251684/in/album-72157662535945536/ 
>


3 filters cascaded
< 
https://www.flickr.com/photos/137684711@N07/32019253490/in/album-72157662535945536/ 
>

Not bad.

73, Gerhard
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Re: [time-nuts] Totally unrelated, but..

[Gerhard Hoffmann]

Am 08.12.2016 um 01:20 schrieb Scott Stobbe:

Yes, the short hand I like to use is 4 nV*sqrt(R/1000).

2 nV/rthz off a bandgap is pretty darn impressive, that includes a delta
vbe gained up ~10x.

Methinks the advantage comes from converting their reference (whatever 
that may be)
to a really high impedance current source where a few uF help 
tremendously in cleaning things up.


regards, Gerhard
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Re: [time-nuts] Totally unrelated, but..

[Gerhard Hoffmann]

Am 08.12.2016 um 00:50 schrieb jimlux:

On 12/7/16 3:32 PM, Richard (Rick) Karlquist wrote:

On 12/7/2016 12:16 PM, Clint Jay wrote:

I was looking for a low noise regulator to power a log amp/detector
earlier
this year and was rather surprised to find the 78xx regulators were
considerably better than many of the "low noise" devices.



Are you kidding me?  Check out the Linear Technology LT3042 and
LT3045 with 2 (yes, TWO) NANOVOLTS/root-Hz spot noise.  Orders of
magnitude better than the 78XX introduced 45 years ago.



I'd second the recommendation for the LT3042 - I'm using them in a 
science instrument which is very noise sensitive.




I can only point again to my own measurements under comparable conditions:

< 
https://www.flickr.com/photos/137684711@N07/24070698809/in/album-72157662535945536/ 
>


The LT3042 outclasses the old crowd, whether they are called low noise 
or not.


Don't overdo it with the output capacitor, the 4.7uF from the data sheet 
is ideal.


Too much, and the response gets a peak. The pic was taken from a dead 
bug implementation


involving a Micro-SO with thermal pad on the belly, too horrible to show.

There is also a pic with an external D44VH10G power transistor to supply 
more current.


And remember, 0dB == 1nV/rtHz is the INPUT voltage noise of an LT1028 or 
AD797.


(give or take 10%...)

regards, Gerhard


p.s.

Ulrich, I seem to remember that you were in Ulm in a previous life.

Then you might recognize the Blau valley on the leftmost image. :-)

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Re: [time-nuts] precision timing pulse

[Gerhard Hoffmann]

Am 18.11.2016 um 02:18 schrieb Bob Camp:


If you head of into ARM land (or even FPGA’s) there is a bit of a gotcha. If you
want to run a 10 MHz input and a PPS output, you need a counter with at least
24 bits. The peripherals on ARM chips are all over the place. Some have very
fancy timers, but only go to 16 bits. Some have 32 bit timers that aren’t very 
fancy.
Some timers will clock at the input clock frequency. Others have weird pre-scale
rules on them. Since the pre-scaler is a “can’t get at it” device in terms of 
restarting,
it puts some limits on what you can do.  With FPGA’s it’s rare to get a 1 pps 
divider
and all of the other stuff you want to do in less than about 64 flip flops. 
That’s not
a crazy thing on modern parts. It can be an issue on older parts.


The Xilinx XC2064 with 64 FlipFlops is 30 years old or so, RIP!
I don't think that you get FPGAs with less than 1 flip flops nowadays.


(copy/paste:)

 Design Name ocxo_carrier
 Fitting Status  Successful
 Software Version   P.20131013
 Device Used  XC2C64A-5-VQ44
 Date  10-30-2016, 12:51PM


RESOURCES SUMMARY
Macrocells Used PtermsUsed Registers   Used 
PinsUsed Function Block Inputs
50/64  (79%) 157/224  (71%) 50/64  (79%)  7/33 (22%) 
87/160  (55%)


That is about the smallest thing made by Xilinx that you can buy.
It's a CPLD, not even a FPGA.  It runs at 100 MHz, with some care at 200 
MHz,

and provides the 1pps on my crystal oven carrier board. It also has the
phase detector to lock the oscillator to an incoming 1pps when locking to
a 5/10 MHz reference frequency   or running free   is not wanted.

Source code is about one page all in all.

< 
https://www.flickr.com/photos/137684711@N07/30952263115/in/album-72157662535945536/ 
>

and the picture to the right.

In the top left corner of the board is some space for an alternate PICDIV.

(For 200 MHz the CPLD needs a beautiful clock signal.)


I have made a design with 2 of these (or one 2C128) that produces one 
fixed 1pps
from a 200 MHz clock and another 1pps that can be shifted over > 1 
second in 5 ns steps,
with an interface to a BeagleBoneBlack to receive control  and enough 
outputs to

steer some switchable ECL delay lines for 5 ps fine steps.

A 2C64 is $1.50 or so.

regards, Gerhard

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Re: [time-nuts] Secondary phase noise standard & FE405

[Gerhard Hoffmann]

Am 12.11.2016 um 23:52 schrieb Bob Camp:

Hi

Yes, the FE-405 uses a DDS and a cleanup. Inside the cleanup loop the DDS spurs 
come
straight through. Since the FE-405 compensates for all sorts of things, the DDS 
moves
around a lot. Even a one bit change on a DDS will move spurs around. With an 
ever changing
DDS, you have an ever changing forest of “stuff” on the output.
I would not expect a lot of dynamics after a month of cont. power up. 
And the spurs
do not move and they don't average away, at least not within my limits 
of boredom.


The PLL bandwidth seems to be 50 Hz, so the forest from 100KHz to 5MHz is
far out. That seems somewhat weird and raised doubt together
with the power level being out of spec.


Not the best thing for a “standard” …..

I've tried to kill 2 birds with one stone. The FE405 had collected dust for
months and still was mostly untested.

The oscillator is not part of the "standard"; I could have used a BVA or
a maser by just plugging in. I just needed a centre frequency with a
few dBm for the E5052B to lock on.

All I want is some known phase noise reference reference lines
for my private phase detector experiments. Recalibating the
phase detector by modulating oscillators on different frequencies
is no fun if you change the Schottkies every 2 minutes.

regards, Gerhard
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[time-nuts] Secondary phase noise standard & FE405

[Gerhard Hoffmann]

I have made an experimental secondary phase noise standard, as F.Walls

would call it. In the end, it's inspired by his paper.


There is not much to it. There is a Mini Circuits PSC2-1 splitter that is

fed from an oscillator or other source. The splitter divides it into a

clean output that goes to another SMA.

The other half is to be dirtyfied. It is fed into another PSC2-1 that is

used as a combiner. Its output goes to the signal source analyzer via

a third SMA.


The dirt input is either  a 4th SMA or a noise generator. That is switched

by reed relays. The noise generator consists of a 60 Ohm resistor and

currently 2 LMH6702 stages for +20 and +40 dB. I'm not sure if the

60R really defines the level, but the gain is at least flat from AF

to > 100 MHz. If not yet, it can be made so. I have already a

solid step attenuator so I can get rid of those reed relays.


I checked it this evening with my FE405 osc I bought earlier this year

and that has enjoyed a good month of continuous running by now.

I observed

1. that the FEI delivers only 3.5 dBm

2. that there are lots of birdies far out. Is that normal, maybe 
from the DDS?



The addition of the noise reference lines seems to work properly.

oscillator:

< 
https://www.flickr.com/photos/137684711@N07/30824608092/in/album-72157662535945536/ 
>


low calibration line:

< 
https://www.flickr.com/photos/137684711@N07/30824607162/in/album-72157662535945536/ 
>


high calibration line:

< 
https://www.flickr.com/photos/137684711@N07/30824607552/in/album-72157662535945536/ 
>


Later this evening I'll add the pic of the tin box. I need a USB cable...

:-)  Gerhard


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Re: [time-nuts] China Oscillator Alternative

[Gerhard Hoffmann]

Am 10.11.2016 um 07:02 schrieb Ed Armstrong:

These have 10Mhz & 15Mhz out, which frequency is the OCXO?



A 5 MHz MTI-260

See the text I linked to   a few days ago.





On 11/9/2016 7:18 PM, Perry Sandeen via time-nuts wrote:

List,
After all the problems that Bob Camp has noted with surplus OCXO's 
from China, perhaps buying the new Lucent units on Ebay may save bad 
words and/or unhappy actions.


LUCENT/SYMMETRICOMKS-24361 L101, Z3812A, RFTG-U REF-0 UNIT -CASE OF 2 
EACH


$80 So for about $50 each delivered one has two brand new units that 
are already in a chassis so with just a simple lap top computer PS 
one is on the air. 

Someone here gave a hack to use the negative output of the RS422.
That works nicely with a HAMA USB to RS232 cable. For the pinout
converter I simply cut off the cable from an old Logitech mouse.
Then half of the work is already done. Just solder the plug to
the Lucent.

Does that mean there is new supply? I did my best to dry up
the last wave of non GPS units :-)

regards, Gerhard

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Re: [time-nuts] I love the smell of tantalum in the morning

[Gerhard Hoffmann]

Am 06.11.2016 um 22:16 schrieb Bryan _:

By far the easiest method.


https://youtu.be/3jxSKaIRhAQ

That must be the guy who removes the e**y MV-89s from China from their 
boards.

At least two of mine have scars that are best explained by such a tool.

regards, Gerhard
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Re: [time-nuts] Newbie With a Z3801 Problem

[Gerhard Hoffmann]

Am 05.11.2016 um 12:51 schrieb Bill Riches:

Hi Mark,

Thank you for working with the KS24361.  Looking forward to when the program 
will be available.

Any ideas on being able to use the 1 PPS signal out of the KS24361 to drive SL 
sound card calibration?  It is a weird pulse and someone mentioned the timing 
is wrong.  I use the pulse out of a Jackson unit with SL and it works fine.



In  ,

I have described a 1pps-Buffer, frequency doubler 5->10MHz and 
distribution amplifier
for the KS24361.  You may not want to build it, but there are pictures 
of the

1pps timing of the Lucent and and also a pic that shows where you can get
the internal 1pps in LVCMOS / TTL level. Buffer it to your taste and 
feed it

to a new BNC / SMA / whatever on the front plate.

73, Gerhard, DK4XP

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Re: [time-nuts] Thinking outside the box a super reference

[Gerhard Hoffmann]

Am 05.11.2016 um 00:45 schrieb David:

On Fri, 04 Nov 2016 14:39:54 -0700, you wrote:

87-Rb has a half life of something like 4.9e10 years — you'll be waiting
a while for that strontium. /gp

Various online sources say that natural rubidium is radioactive enough
to fog photographic film in 1 to 2 months but that is also the case
with unprocessed uranium ore so I would not worry about it at all.

That's next to nothing. A friend of mine with interest in minerals found a
piece of Pechblende (Uranit) simply laying on the street near 
St.Joachimsthal
where they used to dig for silver over the centuries and after 1945 for 
uranium.


We put it on a sheet of Polaroid film for the Tektronix scope cameras and
sure enough, next morning we could see the silhouette of the stone,
completely white, probably way overexposed.

regards, Gerhard
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Re: [time-nuts] our favorite topics

[Gerhard Hoffmann]

Am 30.10.2016 um 01:56 schrieb KA2WEU--- via time-nuts:

The Parzen book was on my list (Amazon ), I find these books,  including
Rhea's book practically useless as they do not provide the necessary  non
-linear noise analysis, and do not have real live examples with test data.
Cerda's "Understanding Quartz Crystals and Oscillators book I have not  seen.
  
73 de Ulrich
I really do not like to see Rhea dissed this way. Yes, nonlinear sim may 
buy another dB or two,
but in the end one has to stay at least somewhat linear, lest one builds 
an 1/f upconverter.

(and Harbec does nonlinear.)

Others don't even have their linear basics complete; everybody talks 
loop gain but
nobody shows how you get from your network analyzer to the correct 
answer of a
circuit whose output is terminated with its own input and whose input is 
terminated

with its own output. It took Rhea to present that on page 3 or so.

And I see a lot of examples compared to actual measurements, and the
Genesys design kits simply work. In fact, Rhea's Genesys is the one 
simulator that

saved me most of the time, and that includes LTspice, which says a lot.

He more or less forced Agilent to buy a competitor from the market, while
they had their own ADS. (which tries to be everybody's darling, nothing it
can't do, but it is too complicated if you do not use it every day.)



I found Frerking's "Crystal Oscillator Design and  Temperature

Compensation"

to be a fruitful read. It's free on the  archive,
  

https://archive.org/details/CrystalOscillatorDesignTemperatureCompensation  .


Silly me, I've bought it. But his book on digital radio is much better.


vy 73 de Gerhard, DK4XP
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Re: [time-nuts] Thunderbolt spurs on 10MHz output at 100Hz and 200Hz from signal.

[Gerhard Hoffmann]

Am 22.09.2016 um 00:24 schrieb Bruce Griffiths:

Another issue is the requirement to trim the current sink for low output
offset.


And _that_ FET is made from Unobtainium.

If one takes advantage of the fact that the PLL imposes a low
frequency cutoff to the PN measurements, the amplifier input   can be AC
coupled, allowing dc bias feedback to be applied to the input device gate.
Use a parallel dc coupled JFET input opamp for the PLL

That's what I did. Original Burr-Brown opa2134, time to use them up..

Paralleled BF862's can be substituted for the input JFET.


Yep!
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Re: [time-nuts] Thunderbolt spurs on 10MHz output at 100Hz and 200Hz from signal.

[Gerhard Hoffmann]

Am 22.09.2016 um 00:24 schrieb Bruce Griffiths:

For the later, Bruce commented that an jFET input stage would

probably be more quiet. Gerhard Hoffman has designed a similar

I must insist in my second "n" Hoffmann   :-)

system[3] that uses a couple of paralel low noise opamps instead
of a jfet stage and claims a noise floor of 220pV/sqrt(Hz). All of
these would need to be adapted to imporve thier frequency response
up to 10MHz (or actually a bit higher), but then the input stage
gets also a bit simpler as you don't need the huge capacitors anymore.


The ADA4898 has ft= 50 MHz, so that will be hard. It already takes some 
cascoding

to get to 2 MHz with the new FET amp.

Another issue is the requirement to trim the current sink for low output
offset. If one takes advantage of the fact that the PLL imposes a low
frequency cutoff to the PN measurements, the amplifier input   can be AC
coupled, allowing dc bias feedback to be applied to the input device gate.
Use a parallel dc coupled JFET input opamp for the PLL

Using a single ended input stage is significantly quieter than using a
differential pair.

Paralleled BF862's can be substituted for the input JFET.


Hi, Bruce and Attila (and ...),

the JFET version of my preamp is making progress. It supports either upto 16
BF862 or 2 pairs of Interfet IF3602. Upper bandwidth limit will be 2 MHz if
it runs like the simulation. There is also a low gain DC output for the PLL.

< 
https://www.flickr.com/photos/137684711@N07/29193737144/in/dateposted-public/ 
>


One is populated with BF862, the other with Interfet. The 3rd will be 
populated

according to the outcome of the first tests, so that I have 2 equal ones for
X correlation. There will be some leftover boards available, but not to 
put them

into the drawer.

Soldered them last weekend, debug them on the next :-)
I expect 170 pV/rt Hz at least for the Interfet version. That is 
probably pearls before

swine after a ring mixer, but then we are nuts.

Attila, you are just half an hour of driving away, at least during the 
weekend!


regards, Gerhard




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Re: [time-nuts] Anybody want a Thunderbolt power supply

[Gerhard Hoffmann]

Am 01.09.2016 um 06:56 schrieb Gerhard Hoffmann:

Am 01.09.2016 um 05:35 schrieb Charles Steinmetz:


The suggestion to use LT3042s is a good one, but note that it has an 
output current rating of 200mA.  The Tbolt needs ~250mA at +5v, and 
~700mA at +12v [at startup -- but only ~150mA steady-state, depending 
on ambient temperature].  LT3042s can be used in parallel, so two of 
them for the +5v supply and four of them for the +12v supply would be 
required.  That isn't so bad for the +5v supply, but seems excessive 
for the +12v supply (particularly when three of the four are needed 
only during warmup from cold).


I have made a stamp-sized layout for LT3042 + external npn power 
transistor

as shown in the data sheet.
Not fabricated, let alone tested.


update:
fabricated on a rainy Sunday and initially tested.
Output voltage is 5 Volts.

< 
https://www.flickr.com/photos/137684711@N07/29197476530/in/dateposted-public/ 
>


The preliminary noise spectrum is

< 
https://www.flickr.com/photos/137684711@N07/29452163806/in/dateposted-public/>


without appropriate shielding, powered from R NGT20 @ 8V.
The faster than 1/f noise rise is caused by the pre-amplifier.

Still quite OK.

regards, Gerhard




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Re: [time-nuts] Anybody want a Thunderbolt power supply

[Gerhard Hoffmann]

Am 01.09.2016 um 16:36 schrieb jimlux:

On 8/31/16 10:24 PM, Gerhard Hoffmann wrote:

Am 01.09.2016 um 06:07 schrieb Bruce Griffiths:

I have a quad LT3042 PCB that I must get around to assembling.One
potential issue with the LT3042 is the relatively high noise at low
frequencies when the capacititve bypassing of the resistor that sets
the output voltage is ineffective.


I wonder where that relatively high noise on the LT3042 might hide.

<
https://www.flickr.com/photos/137684711@N07/24070698809/in/datetaken/lightbox/ 







what's the input source for these measurements? Batteries?



Either NiMH batteries or a R NGT20 with the post filter box as in page 
9 of


< 
http://www.hoffmann-hochfrequenz.de/downloads/Noise_Measurements_On_Some_Laboratory_Power_Supplies.pdf 
>


That would not make much of a difference.

Prefilter/test box and preamp were isolated and  in an another large ALU 
cargo box with beryllium copper
finger stock on the door and BNC bulkhead feedthroughs. The preamp runs 
on NiMH batteries. It's input
connection is just one semirigid SMA cable. If the testbox & preamp box 
touch, the resulting loop

creates an explosion of interference.

I used "The Art Of Electronics V3" and Aldert van der Ziel's "Noise in 
Solid State Devices And Circuits"

as insulators. A good foundation to build upon, in every respect. :-)

regards, Gerhard


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Re: [time-nuts] Anybody want a Thunderbolt power supply

[Gerhard Hoffmann]

Am 01.09.2016 um 07:44 schrieb Charles Steinmetz:


The datasheet shows both NPN and PNP current multipliers.  Just 
curious -- did you choose the NPN circuit for theoretical 
considerations, and if so what was your reasoning -- the lower 
open-loop output impedance?


More belly feeling. The PNP circuit looks like the very low drop regulators
that are always good for a suprise. I did not think deeply about it.
And NPNs are more common.

regards, Gerhard

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Re: [time-nuts] Anybody want a Thunderbolt power supply

[Gerhard Hoffmann]

Am 01.09.2016 um 05:35 schrieb Charles Steinmetz:


The suggestion to use LT3042s is a good one, but note that it has an 
output current rating of 200mA.  The Tbolt needs ~250mA at +5v, and 
~700mA at +12v [at startup -- but only ~150mA steady-state, depending 
on ambient temperature].  LT3042s can be used in parallel, so two of 
them for the +5v supply and four of them for the +12v supply would be 
required.  That isn't so bad for the +5v supply, but seems excessive 
for the +12v supply (particularly when three of the four are needed 
only during warmup from cold).



I have made a stamp-sized layout for LT3042 + external npn power transistor
as shown in the data sheet.
Not fabricated, let alone tested.

The LT3088 and LT3080 will deliver 800mA and 1.1A, respectively, with 
low noise (but not as low as the LT3042).  One of those might be a 
better choice for the +12v supply.  Similarly, the LT3085 can deliver 
500mA, so one of those could be used for the +5v supply.


Finally: Linear Technology -- Where is our negative-voltage complement 
to the LT3042?


Yes, that is badly missing.

regards, Gerhard
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Re: [time-nuts] Effect of EFC noise on phase noise

[Gerhard Hoffmann]

Am 03.08.2016 um 18:30 schrieb Richard (Rick) Karlquist:


1.  Back in those days at least, there were
vendors who supposedly specialized in providing
low noise zener diodes.  The particular breakdown
voltage of zener diodes was important.  IIRC,
at low voltages, it is a true "zener" diode and
at higher voltage it is merely an avalanche diode.
The physics are somehow different.  There is also



It is still important.

In these noise density plots that I made in January
you can see the NXP BZX84 family. 0 dB is 1 nV/sqrt hz
so the 2V7 and 3V3 versions are near 2 nV/sqrt Hz. Methinks
that is really good, given that the best low noise op amps
feature a input-referred noise density of 0.9 nV/sqrt Hz.

With rising voltage, 4V7, 6V8.. the diodes get worse and worse
and the LM399 is the complete catastrophe.
Well, in comparison.

The light blue line is an ancient 3.3V glass diode.
BZX84 are cent devices in SOT-23. Note their low 1/f corner.
The lowest dark blue line is the measurement limit.
Bias was 10 NiMH cells via a 1 or 2 KOhm wire resistor.
The bias added no visible noise.

BTW Prof. Zener sued against the manufacturers that they
should not use his name in vain for avalanche diodes
because it was not "his" effect. They settled on the name
Z-Diode for the form of the characteristic curve but in the
long term it was a Pyrrhus victory.

< 
https://www.flickr.com/photos/137684711@N07/24411798996/in/album-72157662535945536/ 
>




regards,
Gerhard, dk4xp


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Re: [time-nuts] Effect of EFC noise on phase noise

[Gerhard Hoffmann]

Am 02.08.2016 um 22:24 schrieb Bruce Griffiths:


Uually a zero is needed in the bias stabilisation loop to eliminate 
low frequency gain peaking.


2 Meg across the 3.3uF remove the peaking. Nevertheless the circuit 
still has
problems with its time constants. Weird things happen if you let the 
transient analysis

run for a minute simulated time  (must increase n cycles for the source).
Probably I'll accept a higher low frequency corner for now to get reasonable
simulation times.

Remember, that is not a publication but a snapshot of work in progress.
Some part values may be just the result of "what happens if..." experiments.
Or that I have a large bag of 3.3u foil capacitors and would like to use
them up first, if possible.  :-)

regards, Gerhard
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Re: [time-nuts] Effect of EFC noise on phase noise

[Gerhard Hoffmann]

Am 02.08.2016 um 09:14 schrieb Bruce Griffiths:


... and a screen dump for the LTspice challenged

;-) Gerhard
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Re: [time-nuts] Effect of EFC noise on phase noise

[Gerhard Hoffmann]

Am 02.08.2016 um 02:42 schrieb Bruce Griffiths:

/"I'm working on a new amplifier based on IF3602 or BF862 FETs that can
use 10u foil only."/
/
/
Similar to that published by Groner in Linear Audio?
/
/

I know that Groner exists from some web site, but had no personal contact.
Also I don't read Linear Audio other than 2 articles from Scott Wurcer 
that I've bought.

I highly regard Scott, he's the father of the AD797 after all and AD fellow.
I also had some conversations with him on that.

The preamp will be classical.  Some JFETs in parallel, no source 
resistors except

half an Ohm for feedback, more would add to the input noise voltage.
Cascode with a Zetex bipolar (or whatever they are called now).
OP37 for loop gain. feedback from OP37 output for 50 or 60 dB gain.
Post amplifier to 80 db or so.
Without the cascode, the 1 MHz is not possible. It does not help that
the feedback limits the voltage excursions on the drain.

I'm not yet sure about the effective input capacitance. I get abt. 1 or 
1.5 MHz

bandwidth from a low impedance source. A few nF on the input capacitance
would be ok, in the end I want it after a ring mixer for phase noise 
measurements

but I get unreasonably more in simulation, depending on if I measure it from
upper frequency corner with a larger input resistor or the resonance 
frequency

with an added inductor.

You can get the LTspice file if you like.

regards, Gerhard

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Re: [time-nuts] Effect of EFC noise on phase noise

[Gerhard Hoffmann]

Am 01.08.2016 um 22:16 schrieb David:

This duplicates the problems encountered when trying to quantify low
frequency noise from a voltage reference; it is difficult to make an
low frequency high pass filter with lower noise than the lowest noise
references and the capacitor is the problem.
I beg to differ. Voltage references are not that wonderful. Bandgaps 
live from amplifying
small voltage differences and stable Zener references at 6 to 7 Volts 
are plagued by

avalanche noise. And that includes the LT6655 band gap.

WRT short term stability all of these are eclipsed by 2.7 / 3.3 volt 
zeners and by LEDs.
Even the LT6655 gains a lot of noise performance from an active filter 
with AD797 /
ADA4898 op amps and even resistors and 6V/1000uF Nipon Chemi SMD 
electrolytics.


I have made some absolute noise voltage measurements:
< https://www.flickr.com/photos/137684711@N07/albums/72157662535945536 >

LEDs and Zeners are measured with bias from a 1 or 2k wire resistor and a
14V NiMH battery. I find the HLMP6000 LED really impressive and the 
LT3042 regulator.


The preamp is 20 ADA4898 op amps in parallel ( i.e. 220pV/sqrtHz), the 0 
dB line is 1 nV/sqrt Hz.
Everything was fed from batteries in a box in box in a box and then 
after +80 dB passed to

an 89441A vector signal analyzer.

The input capacitor of the preamp is 20 times 10uF WIMA foil, that is 
not enough for the

low frequency corner as we do not see the real 1/f noise below 20 Hz.
What we see looks more like GR noise, spectrum-wise, and it is really 
the insufficient shorting

of the 10K bias resistor through the input source and coupling cap.

I have bought some wet slug tantals as proposed by Jim Williams (see 
below), 1 uF bring
the right 1/f behaviour but at very substantial cost :-(At least for 
small input voltages alu
electrolytics do not seem to make a difference. I did not test large 
voltages.


I'm working on a new amplifier based on IF3602 or BF862 FETs that can 
use 10u foil only.

When it's done I'll repeat these measurements.


In Linear Technology Application Note 124, Jim Williams discusses the
problems with electrolytic capacitors for this type of application.  I
have read that you *can* get away with aluminum electrolytics if you
grade them for low leakage and low noise.  The dielectric absorption
is also a problem unless you can wait hours for best performance.
JW has the added handicap that he wants to keep the the long term and 
absolute stability
of his reference and so cannot afford any voltage drop on a series R. We 
do not share that
problem on an EFC line because the C stands for control and if the 
voltage there does
never change for some other reason we have probably made a bad decision 
with regard

to loop gain.

And large resistors may feature more noise voltage, but that increases 
only with the
root of the resistance. The filter corner drops in a linear way, so a 
large resistor may
really help. The tiny noise voltage of a reasonable resistor must be 
seen anyway in

the context of say, a 10811A that tunes +- 1 Hz for 10 Volts on the EFC.


regards, Gerhard

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Re: [time-nuts] OXCO Spurious Output at Line Frequencies

[Gerhard Hoffmann]

Am 13.07.2016 um 04:38 schrieb Mark Sims:

A friend on mine once worked on  projects to build very sensitive magnetometers 
(submarine detection and space probes).  Their test lab was in the middle of a 
square mile of land selected for its low magnetic residue properties.   The 
building was made completely (of carefully selected) wood... no nails, etc.   
Everything that went into the construction was scanned.

You had to hike into or be ferried into the lab... no cars allowed anywhere 
near the place.   You also had to wear specially selected clothes (no metallic 
fasteners, residue, dyes, etc).   No metal eyeglasses, etc allowed.   No 
wallets (credit cards) or currency allowed (magnetic ink,  the things could 
detect a dollar bill across the room).  No amalgam dental fillings or medical 
implants allowed.  I always wondered how they allowed any test equipment, 
electricity, etc into the place...



Wonder how they dealt with the variable magnetic field of the earth?

I've been in an ultra-shielded room at the PTB in Berlin where they did
things with SQUIDS and contactless EEGs. I was there with a geo-physicist
who also had interest in sensitive magnetometers.

Aah, google finds it:
< 
http://www.vacuumschmelze.de/fileadmin/documents/pdf/fipublikationen/Paper_Biomag_2000_217b1.pdf 
>


Quite magnetics-nutty!


regards, Gerhard
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Re: [time-nuts] The home time-lab

[Gerhard Hoffmann]

Am 08.07.2016 um 08:52 schrieb Poul-Henning Kamp:



A new A6 with four high quality DC/DC converters and some extra
filtering would be a really big improvement both heat and efficiency
wise.


I keep wondering how this tiny transformer in the SR620
can power that baking tray full of ECL.

regards, Gerhard
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Re: [time-nuts] Cable length calibration

[Gerhard Hoffmann]

Am 29.06.2016 um 22:07 schrieb Gary E. Miller:

TDR.  The GPS already sends a voltage down the cable to power the
antenna.  Send a sharp down the cable and see when the reflection comes
back.

Even some of my cheap managed ethernet switches can do that.



What reflection? If the antenna preamp has at least a somewhat decent S22
(output return loss) there will be exactly nothing that comes back. And the
cable attenuation counts twice; GPS antennas have high gain to accommodate
a lot of attenuation.

regards, Gerhard

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Re: [time-nuts] Transformer inrush current and transformer simulation

[Gerhard Hoffmann]

Am 08.06.2016 um 02:31 schrieb Mike Monett:

I was not interested in examining the frequency response, saturation
effect or core losses. These are only important after the  core goes
into saturation.

I was  only interested in the result of switching at the peak  or at
the zero  crossing. This is clearly defined at the beginning  of the
document.
...
The saturation  and  core  losses   are  outside  the  scope  of the
investigation. The  investigation was only to examine the  effect of
switching at  the  peak or at the zero  crossing.  This  was clearly
stated at the beginning of the paper.

My analysis  correctly defined an unloaded transformer  as  the only
case where  switching  at  the peak or the  zero  crossing  made any
difference. This was the goal, and it was met.


Saturation is not outside the scope. It is the very heart of the problem.
You need to build up a voltage opposite to the grid voltage to keep the 
current small.

That requires an inductance and that requires a core that can be magnetized.
If the core is already magnetized to the limit from a previous session, 
it is as good
as simply not there at all. What remains is some meters of copper wire 
without an

appreciable L and that is not enough.

I'm haunted by that effect myself on a regular base in that I have a fat 
class A  Krell
audio amplifier and it pops the fuse of my living room once in about 5 
times of

switching it on.



I also showed that very few solid state switches were available that
switched at  the peak, that most vendors simply supply  devices that
switch at  the  zero  crossing and state to get  a  model  that will
accept the  surge currents, that switching at the  peak  could cause
severe surge  currents with capacitive loads,
Nobody uses large transformers anymore, everybody has a diode bridge , 
capacitor

and a DC/DC behind it. Then zero voltage switching makes sense.


  and that  I  could not
find any reference that stated switching at the peak would not cause
core saturation.
I provided references that zero voltage switching leads to saturation, 
and so did others.


Your comments   offer   no   additional   information  regarding the
advisability of  switching  at the peak or  the  zero  crossing. The
information you  do supply is irrelevant to the problem,  and mostly
irrelevant to LTspice.

you are right. This is not a LTspice problem but your modelling problem.

> Attila Kinali

It is upon moral qualities that a society is ultimately founded.
All the  prosperity and technological sophistication in  the world
is of no use without that foundation.

You need to consider getting new sigs. The two you post  have little
or nothing  to  do  with timenuts, and I'm  sure  everyone  has them
memorized by now.



OMG , I'm not Attila, but I may need a special time nuts .sig!

regards, Gerhard

--
Es ist schon alles gesagt worden, aber noch nicht von jedem. (Valentin)

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Re: [time-nuts] Maser 0.7 nsec jumps solved

[Gerhard Hoffmann]

Am 25.05.2016 um 18:59 schrieb Mike Monett:


This analysis shows switching at 0V is the best option.


No, it doesn't. :-)

First, the single inductor does not represent a transformer; the second 
inductor

and the coupling declaration ( style: K1 L1 L2 0.99 or so) and the load are
missing.

The most important thing is that the Inductor is nonlinear which is not
represented in the model. If there has remained some magnetism in
the core from previous operation, the transformer won't be able to further
increase the magnetism as needed to induce an opposing voltage
in the primary winding. When the core saturates, the inductance
collapses and leaves only the copper resistance to limit the current.

The catastrophe builds up in the first 90 degrees of the source wave,
not right at the start.

In the simulation, the current at t=0 is at its maximum already when at
t=0 the input voltage is just switched on. You'd expect that from a
capacitor, never from an inductor.

The reason is that the simulation does not really start at t=0, but
much earlier. The simulator computes the conductance matrix,
applies the initial sources and waits until everything has calmed down.
That may require repeated recalculation of the matrix to respect
nonlinearities.

Your circuit must contain hidden resistors btw, otherwise the computation
of the initial condition at "t<=0" would result in numeric overflow
as required by an assumed initial DC voltage across an inductor, before
the transient simulation.

One can enforce initial conditions with statements like  .IC v(my_node) = 0V

regards, Gerhard


BTW I've got the first 20 pcs. of the VCXO carrier / voltage regulator /
lock to reference / squarer / iso amp or frequency doubler / 1pps board.
That won't be soldering for beginners or jittery hands.  :-)






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Re: [time-nuts] Maser 0.7 nsec jumps solved

[Gerhard Hoffmann]

Am 23.05.2016 um 05:15 schrieb Jim Palfreyman:

As far as a remedy goes we are going to try a solid state relay that only
switches on at 0V in the AC waveform. This should slow the inrush current,
and hopefully the magnetic impulse.


In the context of transformers and motors, switching on at 0V is 
actually the worst point in time.



< https://de.wikipedia.org/wiki/Einschalten_des_Transformators > (German)

< 
http://electrical-engineering-portal.com/practical-considerations-of-transformer-inrush-current 
>


regards, Gerhard
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[time-nuts] semi-dead FTS 1000

[Gerhard Hoffmann]

Hi,
I won a FEI 1000A oscillator here on local ebay, but it turned out that
the heater does not work anymore. It oscillated, but drew only 30 mA
or so instead of ?600 mA in the heatup phase.

It was taken back, but the seller who inherited these things is a ham, too,
and he would like to dissect and study it.

Does anybody know of standard failures? Are there any circuit
diagrams out there in the wild?

best regards, Gerhard
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Re: [time-nuts] High rate, high precision/accuracy time interval counter methods

[Gerhard Hoffmann]

Am 09.05.2016 um 10:08 schrieb Magnus Danielson:

Hi,

On 05/08/2016 09:53 PM, Attila Kinali wrote:


True and not true. Yes, there are many ADCs that do high conversion
rates, but these are optimized for piplined applications where 
conversion

happens at a constant rate. Ie they expect a constant conversion clock
with a constant rate. If you want to trigger conversion at an 
arbitrary time,

you either have to build your own sampler or need to  use one of the
non-pipelined ADCs whic are much slower (IIRC they stop around 5-10Msps
aka >100ns conversion time). Flash ADCs with direct access to the 
sampling

circuitry are basically extinct.


You can let the ADC convert as a continuous process as long as you 
filter out the samples you are interested in.




And, at least for the LTC2165, you could really use the encode clock to 
read the result
of the capacitor immediately. All one would have to do is to flush the 
pipeline with
5 or 6 clocks after the encode, with a cycle time not much faster than 
10 ns and

not slower than 1 usec.
That seems not too hard to do but costs a differential mux in the encode 
lines.



We then would not need to switch the current source, it could degenerate 
to a
20V source with a resistor & safety clamps; that would be as linear as 
it gets.
The reset level could be clamped by a Sky or Avago phemt, they can 
swallow the
current easily, are blinding fast and do not drop a voltage for the base 
current

over Re (from Gummel-Poon model). And an inverse transistor may have less
Re, but also less beta and therefore more base current.


I have already built a time stretcher and was restricted to spaceworthy 
components;
those Intersil transistor arrays had the only acceptable PNPs. These 
flatpacks are

huge, and the legs are endless; anything more complicated than a simple
current mirror would oscillate or would at least lurch to its 
destination, and you

cannot simply damp it to death. Not funny.


Minimizing the E-E-inductance: The next best thing to an onchip-connection
might be abusing 2 Infineon SiGETs on the 2 sides of a thin board; they 
are optimized
for low emitter inductance and have 2 emitter legs each. And their Early 
voltage

is huge, so they are not impressed by the VCE changes of the current source.
(SiGe BFP650, 750 etc, available in a tiny package)

regards, Gerhard


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Re: [time-nuts] High rate, high precision/accuracy time interval counter methods

[Gerhard Hoffmann]

Am 08.05.2016 um 21:53 schrieb Attila Kinali:

True and not true. Yes, there are many ADCs that do high conversion
rates, but these are optimized for piplined applications where conversion
happens at a constant rate. Ie they expect a constant conversion clock
with a constant rate. If you want to trigger conversion at an arbitrary time,
you either have to build your own sampler or need to  use one of the
non-pipelined ADCs whic are much slower (IIRC they stop around 5-10Msps
aka >100ns conversion time). Flash ADCs with direct access to the sampling
circuitry are basically extinct.

You can run the ADC on constant 100 MHz for example. The charged 
capacitor has to wait an
extra  0 to 10 ns until it is read out. That is easy. In a time 
stretcher you must keep the charge and
discharge it in a controlled way in 50 usec, and over that time, bias 
currents etc really

do play a role.

regards, Gerhard


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Re: [time-nuts] High rate, high precision/accuracy time interval counter methods

[Gerhard Hoffmann]

Am 08.05.2016 um 21:53 schrieb Attila Kinali:
...

Maybe I was too short. We have control over the charging current source,
and when we switch it off, the status quo is kept. Then when the ADC is 
done,
we can simply short the capacitor in the next clock/s to prepare for the 
next cycle.



Attilla, we could discuss that on a sunny evening in Saarbrücken in a
beer garden if you like. The season starts :-)

regards, Gerhard
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Re: [time-nuts] High rate, high precision/accuracy time interval counter methods

[Gerhard Hoffmann]

Am 06.05.2016 um 01:00 schrieb Mike Monett:

I have been thinking along the same lines, to combine multiple OCXOS's to
obtain lower phase noise. But an N-way Wilkinson could get tedious. After
you calculate the impedances for each leg, you then have to convert them to
lumped-element equivalents to run at 10 MHz, as shown here:
NoNoNo, you can build a replacement with a 1:1 balun transformer and a 
100 Ohms resistor.

With a little bit of ferrite this is both broadband and small.
It presents a 25 Ohms input resistance in a 50 Ohm system, so you need 
another wideband
transformer with a 2/3 windings ratio. The resulting 4/9 impedance ratio 
is close enough

to provide the impedance match from 25 to the 50 Ohm source.
That's probably what's inside a MiniCircuits PSC2-1. I have never opened 
one but I don't

have much doubt.
They also have solutions for 8:1 and 16:1, but it can be cheaper d.i.y..

Someone in the US is currently selling 10 PSC2-1 on ebay  IIRC. But for 
me being in Europe the

transport would probably cost more than what it's worth.

regards, Gerhard


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Re: [time-nuts] High rate, high precision/accuracy time interval counter methods

[Gerhard Hoffmann]

Am 05.05.2016 um 01:55 schrieb Bruce Griffiths:

On Wednesday, May 04, 2016 02:22:22 PM Gerhard Hoffmann wrote:

But we stayed with a classical time stretcher, and my private project
pipeline is already full.

Talking about my own pipeline:

I have finally ordered today the first 20 samples of my OCXO carrier 
board for
OCXOs that can be locked to an external ref, 1pps out, optional doubler 
etc...

It can also be a home for Tom's picDIV.

I just imagine a gang of 16 MTI-260s, each slooowly locked to an 
external ref

with their outputs wilkinsoned together to make a make a really low phase
noise 10 MHz source. I have bought a pretty number of those Lucent 24386
units without GPS for their MTis.  :-)   I mean, we cannot get those 
BVAs anymore.


Screen dump of the Board:
http://www.hoffmann-hochfrequenz.de/downloads/ocxo_carrier_screendump.png

Sorry for the red/green blind.

regards, Gerhard

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Re: [time-nuts] High rate, high precision/accuracy time interval counter methods

[Gerhard Hoffmann]

Am 04.05.2016 um 10:46 schrieb Bruce Griffiths:

Integrating A Time interval to charge TAC at the front end of a capacitive 
charge redistribution SAR ADC should allow a conversion time of 300ns or so.. 
Using 16 such TDCs should permit 1ps resolution with a 50MHz timestamp rate 
without too many cascaded gates in the selection logic for the next available 
TAC.
Bruce

One or two years ago I investigated a solution around a 16 Bit / 100 
MSPS ADC (LTC2165), a 2C64 Coolrunner,
an Avago PHEMT as current switch and a little bit of analog voodoo. That 
would have fit on a 2"*2" board.
Good enough for a 10 MHz event rate, with some easy pipelining for at 
least 20 MHz.

That includes the coarse counter from the last 1pps.
But we stayed with a classical time stretcher, and my private project 
pipeline is already full.


regards, Gerhard
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Re: [time-nuts] 1 PPS 50-ohm driver

[Gerhard Hoffmann]

Am 17.04.2016 um 16:59 schrieb Wojciech Owczarek:

A slightly naive question(s) perhaps, so do excuse me, but I reckon this is
a good opportunity to ask since I am approaching the same design questions
(this is a 1PPS in + 1PPS out driver for the Beaglebone Black, to/from its
PTP clock). This involves 5v / 3.3v conversion but that's another topic.

IC spec sheets are one thing, but since the Time Nuts have seen and done it
all... Why an inverting buffer? Is there an advantage in using inverted
logic for 1PPS? I have come across other timing kit that internally uses
falling edge, which is eventually inverted when interfacing with the
outside world. Is this common, and why? If my output is rising edge right
from the PWM pin I'm using to generate my 1PPS (again, separate topic), do
I gain anything by inverting it and using an inverting buffer? Is this a
matter of different rise/fall propagation delays over the various ICs?



In CMOS logic, an inverter is the smallest and fastest gate, just 2 
transistors.
A minimum buffer then would be 2 inverters in series. somewhat slower 
and 4 transistors.
If you need an inverter or buffer that drives a heavy load, you may need 
more than
just 1 minimum transistor pair in parallel. That presents more load to 
the source,  so
one may have to amplify the source signal in several stages. As a rule 
of thumb,
quadrupling the number of transistors per stage gives the best 
compromise between

delay for heavy loading and delay from many stages. (on-chip)
So for any given source/load combination the optimum may be either an 
inverting or a

non-inverting buffer.

In CMOS, the falling edge is usually slightly faster than the rising.

In TTL, which is somehow the precursor of CMOS, feeding an input with a 
LOW signal
required more energy than feeding a high. In fact, feeding nothing at 
all was a high,
although that is frowned upon. That led to low-active chip enables and 
write enables

since people expected bigger noise immunity against false triggers.

Use whatever you have for the BBB, it makes no difference. I seem to 
remember
that some signals on the BBB use surprisingly low voltages and it is 
possible to

break it, so check the pins you use.

In my frequency doubler board for the Lucent KS24361 there is also a 
1PPS CMOS

driver since the Lucent has only a RS422 output on a DB9 connector.
It uses 74LVCxxx, that has an abs. max rating of 6.5V, so if you are 
rough enough
you can generate full swing for 3V3 CMOS, serial terminated at the 
source and

parallel terminated at the load. That gives nice waveforms.

In that Lucent board I only had 5V without spending an extra regulator, 
so I accepted
a 2V5 high level. That works for 3V3 CMOS ( nominal switching level 
1.6V) and for

74HCT it's even better.

Fairchild 74LVX has 7V abs.max.

< http://www.hoffmann-hochfrequenz.de/downloads/DoubDist.pdf >
has the circuits and resulting waveforms.

As there was interest in SRDs; Sky and Macom still produce some, IIRC there
is even sth. available at Digikey.

regards, Gerhard

BTW:
Is there a way on the BeagleBoneBlack to map the IO-Pins like an ancient
data bus? some addresses, data, read, write or so? Something to get into
an FPGA without much ado, with medium-speed data rates?




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Re: [time-nuts] Fast risetime pulse generator

[Gerhard Hoffmann]

Am 13.04.2016 um 07:03 schrieb Bill Byrom:

I agree with earlier comments that the Analog Devices SiGe voltage
comparators appear to be a good choice, with 37 ps typical rise/fall
(20%/80%):
http://www.analog.com/media/en/technical-documentation/data-sheets/ADCMP580_581_582.pdf
The evaluation board single unit price is about $299:
http://www.analog.com/media/en/technical-documentation/evaluation-documentation/310187823ADCMP572_3_80_1_2EB_0.pdf
  


If that is too much, you can do it in the style of my home-etched quickie:
18 * 14 mm, 0.5mm thick FR4. The trick is to get from chip output into
the semi-rigid coax as quickly as possible. The CML outputs have an
integrated 50 Ohms back termination. SMA launchers will probably
complicate things.

This is what has generated the waveforms in my previous post. Note that
the 20 GHz sampler is already close to its own risetime limit, so what
you see is probably worse than reality. I should have used the 50 GHz
plug in with its 9 ps risetime but then I usually avoid that because
I don't want to put it in jeopardy.

If one wants more voltage, an alternative might be a driver for 10 GBPS
DFB laser diodes. 5V in 35 ps seems possible.  ADN2525 or so.

Hittite is now AD. That is a good thing. Mouser or Digikey and no longer
prices and old data sheets under NDA.

If you think at Potato Semi chips, watch the loading conditions. Buffers
that can barely drive a 0.6 pF FET probe are a bad joke.

regards, Gerhard


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Re: [time-nuts] Fast risetime pulse generator

[Gerhard Hoffmann]

Am 12.04.2016 um 22:30 schrieb BIll Ezell:

(cross-posted to volt-nuts)
After paying only limited attention to this topic, I suddenly have a 
need for a pulse generator that has <150 ps risetime and a pulse width 
of at least 2 ns. 100mv amplitude or more is fine. I've looked at the 
classic Jim Williams avalanche generator, but I don't want to have to 
deal with the (relatively) high voltage source needed.
This is what an Analog Devices ADCMP580 comparator produces. Available 
from Digi-Key.


regards, Gerhard
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Re: [time-nuts] Oleg' s PN test Re: A new member & PN test set

[Gerhard Hoffmann]

Am 30.03.2016 um 21:20 schrieb Bruce Griffiths:

Conical inductors are available that are effectively resonance free to 40GHz
but the largest value is around 10uH. In principle one could wind one's own
conical inductor with a larger value, However an iron powder (carbonyl iron -
available from Ukraine at least via ebay) and epoxy mixture. A cone angle of
about 15 degrees appears to be suitable.

Failing that, the classical method is to use a series string of inductors of
increasing value. Even then the various resonances need to be damped.
Lossy Ferrites and resistors can be useful, however one has to be careful not
to increase the noise at frequencies of interest.


It doesn't take conical inductors to separate the baseband from the 
carrier at 10 MHz. The
world existed before Piconics and their conical L patents. Yes, we used 
them in our 10 GB/s
fiber optic transceivers, just to see what eye diagrams we could 
achieve. But at €38 a pop they
never ever made it into production. It was just too easy to replace them 
with somewhat more cent stuff.


A colleague even rolled his own from wire, epoxy glue and ferrite beads 
smashed in a mortar.
That looked, hmm, ugly, but performed excellently. Now, you get them 
from MCL and Coilcraft.


But for a 10 or 100 MHz lowpass, that's way over the top. Not even if 
you are nuts.


regards, Gerhard


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Re: [time-nuts] Phase noise test set reference articles

[Gerhard Hoffmann]

Am 29.03.2016 um 16:53 schrieb Charles Steinmetz:


(10)  Phase_detector_with_low_flicker_noise_BARNES_etal_NIST_2011: 
Describes a DIY double-balanced mixer phase detector using 
diode-connected 2N transistors.  [Note that only the flicker noise 
is improved -- the white noise floor is actually significantly higher 
than with DBMs using diodes.  NB: There are much better transistors 
than the 2N for this application.]
.. and they are NOT really used as diodes. They are used as switching 
transistors with most current flow C-E, saturation enforced.

That turns faster on than the diode exp-law.
Somewhere they also say that they use 50 Ohm load.

I really wonder where all that ring mixer noise is to come from. The 
diodes are just switches, the transformers
have close to no loss and behave properly in power dividers, and even 
when the diodes are resistors for a moment,

their noise is only half-thermal.

I find it easy to believe that high power mixers produce more noise. In 
that app note by Watkins-Johnson that everybody copies,
there it is clearly shown that they may use resistors to generate bias 
voltages.


If I use two 1:4 Wilkinsons, 4 low power ring mixers and put the outputs 
in series, will it also turn worse? I don't think so.


Are there anywhere musings about the equivalent noise resistance of a 
ring mixer IF output?
If it is really something like 500 Ohms, even a single AD797 may be 
excessively over-optimized

for voltage, and not current noise.

regards, Gerhard
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Re: [time-nuts] Instrument BASIC

[Gerhard Hoffmann]

Am 02.03.2016 um 19:04 schrieb John C. Westmoreland, P.E.:

Magnus,

This was the best answer I got so far - I am sure this isn't what you're
looking for:

http://www.ebay.com/itm/HP-89441A-Vector-Signal-Analyzer-Opt-1C2-AY9-UFG-AY7-AYA-/252278222960?hash=item3abcf43070:g:uRMAAOxyNo9SojsE

I have one more person that I am waiting for an answer/suggestion from - I
am not sure if there are any 3rd parties out there supporting this other
than what you might find on eBay.

Interesting aside is some of these are selling for more than they were
being let go for after the first dot-com-bomb.


The market for these was quite small, mostly cell phone developpers,
and they have made the jump to LTE already a long time ago. The 89441A 
is not

good enough for LTE, so they probably have discarded their surplus stuff
long ago. Mine was pre-owned by Motorola I was told.

Dynamic range  < 10Hz is severely degraded by 1/f noise. It took me
60 to 80 dB preamp gain for my noise measurements to hide that.
Then there is not much dynamic range left over.

It was easy to put on the network with a €25 BNC to Western plug
adapter from Amazon. But you still need both BNC terminations even
if there is no real Ethernet coax cable. Works much better.

Controlling is as easy as opening port 5000-something on 192.168.1.123
and and dumping GPIB commands. I have done a program to do FFT
analysis over 7 decades (Linux, gcc, gnuplot...). Source is available.
Ooohps, I'm not supposed to think about that ;-)

regards, Gerhard


I really like that 89441A!


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Re: [time-nuts] MV89A / MTI-260 / HP10811 carrier board

[Gerhard Hoffmann]

Am 27.02.2016 um 16:15 schrieb Bob Camp:

Hi

You will run into the same problem on the Altera side. Their “super suite” is 
called Quartus and
the latest free version only supports the newer parts. Once you get a few 
generations back, you
need to download an older version. That’s not impossible to do or crazy to work 
with. The newer
stuff is a bit better. The generation to generation transitions are not insane, 
but they will take up
time working this and that out. Much better (if possible) to start with a part 
that the current software
just started supporting. In the Altera case that is the Max10 family. The 
lowest cost member is
less than $4 in single piece quantity on Mouser. Yes it’s a BGA. The leaded 
parts are about $11 or so.
Demo boards with various cool things on them are < $40.

Yes this sounds like an advertisement for Altera. It’s not really. All of the 
same basic issues apply equally
to the other vendors. It’s a competitive world and they all do a pretty fast 
game of catch up. The only unique
feature (AFIK) with Quartus is the inclusion of schematic entry. It lets you do 
a “no code” design if you are
more familiar with logic schematics than with VHDL. If any of the “other guys” 
do this, it would be worth knowing
about in the context of many of the people on the list being a bit code shy.
Xilinx used to have Futurenet as circuit entry and after massive begging 
of the

community they also provided an interface from Orcad. But that was long ago.

I think they still have something of their own, but I have converted to 
pure VHDL

some 15 years ago and never looked back. Maybe over the fence to Verilog.

I have a Altium Designer license of my own and I think it can do circuit
diagrams to FPGA via VHDL, but never took the time to poke around in that
corner.

The 2C64 is so small that about any ISE version is ok for it. The VHDL 
source

of my pps generator would compile for an Microsemi Igloo , Altera,
Spartan, Whatever.. without change.

That does not mean that I'm a Xilinx fan boy. Nothing could be more wrong.
I'm currently doing some ORIGINAL Virtex FPGAs, not Virtex II, 2E, 4, 5, 
7..

in the Aces space project (to get the link to TimeNuttery) and they were
agreed on in 2002.

Xilinx now nearly deny fatherhood and it is fun to write specialties like a
configuration memory scrubber when even a certain app note seems to be
removed from everywhere; maybe an ITAR thing.

The latest ISE version that supports original Virtex is 10.1, with a
nearly defunct project management. V7 to 9 were even worse.

Now that Altera is in bed with Intel, that's a good perspective.

regards, Gerhard
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Re: [time-nuts] MV89A / MTI-260 / HP10811 carrier board

[Gerhard Hoffmann]

Am 25.02.2016 um 22:23 schrieb Magnus Danielson:
Interesting. I would consider the PICDIV such as that of TADD-2, which 
has the benefit of producing a range of frequencies, so that a 
suitable can be selected as matching the needs. I've found it very 
useful property of the TADD-2, where I have my TADD-2s wired up to 
output one of each. I also wired them to output the buffered variant 
of the clock, which gives better measures compared to running the sine 
straight into the counters.


I have never used PICs and given their life cycle it's a bad time to 
jump on the train.
Not now when I'm just converting everything to ARM. OTOH I have used 
Xilinx since they exist

and this board is more or less a cleanup of things that are already there.


This here is all it takes for 10 and 100 MHz oscillators:

--
-- Company: Hoffmann RF & DSP
-- Create Date:09:09:37 08/08/2012
-- Module Name:pps1_generator - Behavioral
-- Target Devices:   X2c64A-5VQ44
-- Additional Comments:   Free firmware under BSD license
--
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.numeric_std.all;

entity pps1_generator is
Port(
clk : in  STD_LOGIC;
RunAt100MHz : in  STD_LOGIC;
pps1_out: out STD_LOGIC;
);
end pps1_generator;

architecture Behavioral of pps1_generator is
signal tctr   : integer range 0 to ;
signal pw_ctr : integer range 0 to 19;
signal cycle_done : boolean;
signal pw_done: boolean;

function bool2sl(b : boolean) return std_logic is
begin
if b then return '1'; else return '0'; end if;
end function bool2sl;

begin

u_div : process(clk) is
begin
if rising_edge(clk) then
cycle_done <= (tctr = 0); -- pipeline the comparator

if cycle_done
then
if RunAt100MHz = '1' then
tctr <= 1 - 2; -- divide by 100 Meg
else
tctr <= 1000 - 2; -- divide by 10 Meg
end if;

else
tctr <= tctr - 1;
end if;

end if; -- rising_edge()
end process u_div;


-- produce the standard 20 usec pulsewidth
u_pulsewidth : process(clk) is
begin
if rising_edge(clk) then
if cycle_done then
if RunAt100MHz = '1' then
pw_ctr <= 1;
else
pw_ctr <= 1999;
end if;

elsif pw_ctr /= 0 then
pw_ctr <= pw_ctr - 1;
end if;

pps1_out <= bool2sl(pw_ctr /= 0);

end if; -- rising_edge()
end process u_pulsewidth;

end Behavioral;
-



I have also a version that fits into 2 chips, runs at Osc = 200 MHz and
produces a fixed 1/10/100/1000pps and another pps that can be shifted
against the first one in 5nsec steps over > 1 second.
It also provides control for a Micrel ECL chip that does the ps 
interpolation

between the 5 ns steps.

It has a shift register interface that is controlled by a Beagle Bone Black
under Debian Linux, so network access is free.

Ideal for testing ranging systems and TICs / TDCs, but it still needs
some software.



The power-supply input didn't look all that clear. It would be handy 
if a single input could be used.


It can run on  -5...-8V (for the opamps) and +12V for Morion and MTI; 
the HP10811 needs 20V or so
for its heater. In this case the 12V is made from the 20V. I do not want 
a switcher there.





I could probably have use for several of these boards.

Me too. I have recently decremented the number of available Lucent REF 0 
plug-ins quite substantially.


(BTW: The Lucent REF 1 units with GPS are completely sold out for good, 
I have asked.)


The idea is to lock 8 or 16   5 MHz MTI-260s to something long-time 
stable and see

how far I get wrt phase noise when I combine the outputs.

Seems to be more promising than that promiscuous coupled resonator stuff
that was promoted recently. It is even somewhat tunable.

I like throwing repetitive hardware at problems when I get sth. in return.
Like my 220pv/sqrtHz preamp with 20 low noise opamps averaged.

regards, Gerhard, DK4XP


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Re: [time-nuts] MV89A / MTI-260 / HP10811 carrier board

[Gerhard Hoffmann]

Am 25.02.2016 um 20:06 schrieb Anders Wallin:

Hi, looks quite useful!
What's the benefit of the Xilinx CPLD (2-3 dollars/euro) over a PICDIV (<1
dollar/euro) ?

My work would cost more than 1-2 €


Sync-input for the PPS-output would be useful. Also a PPS LED that blinks.
If the PPS-divider is directly under the OCXO it will get more or less warm
- could that be a problem?

It is only useful as long as the oscillator is disciplined by the 1pps.
If the osc and the 1pps drift against each other, that is really bad.

I have written a VHDL implementation of the AD9901 phase detector
that could fit into the CPLD ( 6 Macrocells IIRC). It is a 1:1 translation
of the circuit in the data sheet. Still untested, would work for 1pps.
Maybe in V2.0.  Getting sth. that works is more important now.

That the divider gets warm is unimportant. The resynchronisation
flipflop, 1pps driver and the squarers are what counts.

I'd like to have the blinkenlights offboard. I read about a Tektronix
sampling scope that had sampling jitter to the tune of a blinking LED.



What's the idea with the mixer/DIY-PLL? Did you look at PLL-chips instead?
It is much like the circuit used by Riley and I had good results with it 
and similar

ones also.


Would it make sense to have the time-constant for the PLL-loop adjustable
with jumpers or a pot? Lock-indicator LED?

Maybe a decoupled testpoint for the tuning voltage, so one can watch it on
a meter. Unless it's so bad that there are cycle slips it is hard to say
automatically if it is locked.

And I hate pots. I want thin film fixed resistors.



Could the board be 100mm wide with all the connections on one 100mm side,
to allow vertical rack-mounting ('plug-in' unit) in a 3U enclosure?

You will need some shielding, both electrically and against air movement.

regards, Gerhard  DK4XP
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[time-nuts] MV89A / MTI-260 / HP10811 carrier board

[Gerhard Hoffmann]

HI,

I have made some progress on my crystal oven carrier board.

It will offer a home for one of these:

- MTI-260

- Morion MV89A

- HP 10811-611


It provides regulated voltages for either of them, and the needed 
electronics.


It will be possible to lock the resident oscillator to an external 
reference frequency,


tune it a few Hz using a 10-turn-pot or an external tuning voltage from 
0 to 5 volts.


The 10811 oscillator does not have a stable tuning reference voltage 
output, it will be


provided.

There is a Xilinx Coolrunner 2C64 CPLD that generates a 1pps output from 
the


resident oscillator with the usual 20 us pulsewidth.

The squarer that feeds the CPLD is either a LT6759-4 or my 
implementation of


C.Steinmetz's interpretation of C.Wenzel's version of the standard 
differential limiter.


The 1PPS can drive 3V3 CMOS, terminated with 50 Ohms. The output of the CPLD

is re-clocked in a 74LVC74 Flipflop directly from the limiting amplifier.

There is a 1 stage common base isolation amplifier between the output of 
the oscillator


and the output of the board. It can be configured to work as a push-pull 
active frequency
doubler without attenuation instead. There are 2 or 3 crystal notches to 
remove the

closest (sub-)harmonics without affecting carrier phase stability.


Board size is abt. 100 * 110 square mm.

The design is modular from predefined macros. You can cut it into pieces 
and get:



3 positive voltage regulators, LM317 style

1 negative voltage regulator, LM337 style

2 current feedback amplifiers using LMH6702 / AD8009 etc

1 ring mixer using a low 1/f noise Avago diode ring

1 PLL-regulator

1 isolation or frequency doubler amplifier

1 LT6759-4 limiter

1 Wenzel limiter

1 Xilinx 2C64 Coolrunner with pins on 100 mil grid

1 3V3-CMOS reclocked driver for 50 Ohm load.

1 input power meter


Connections to the modules are on a 100 mil grid, so one can

rearrange/recycle everything on Vector board or such.

This is open source hardware under BSD rules.
I do not intend to sell boards on a commercial base,

maybe there will be some samples to get things started.
All parts are available from Digikey/Mouser.

I'm currently doing the layout and will be trough with it in a week or so.
proposals, spotted errors, what to do with the empty space etc. are welcome.
(but not on parts values, that will be taken care of later)

circuits can be found under

< 
http://www.hoffmann-hochfrequenz.de/downloads/CrystalOvenCarrierBoard.pdf >


This is no product documentation but a quick snapshot as of this afternoon.
One thing that is missing is sync'ing on a 1PPs instead of the external 
frequency reference.


regards, Gerhard, DK4XP




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Re: [time-nuts] low noise multiplication to 100 MHz

[Gerhard Hoffmann]

Am 25.01.2016 um 18:20 schrieb Graham / KE9H:

There are clock distribution parts designed to do this low noise frequency
conversion and distribution.

Consider TI  LMK04100


150 fs class jitter.


But only if you integrate the noise only from 12 kHz offset to 20 MHz.
It is a telecom spec.

regards, Gerhard
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Re: [time-nuts] low noise multiplication to 100 MHz

[Gerhard Hoffmann]

Am 22.01.2016 um 22:40 schrieb jimlux:

the oscillator is a HCMOS output, so figure swinging about 3.5V
Output.. I'm feeding differential clock inputs on ADCs.  I'll bet a 
+/- 300mV swing would work.



4)Title said "Low Noise"  needs better definition as to what kind of
noise and how far down. Are we to be  concerned about harmonic and spur
content as compared to real random white noise?


This is time-nuts.. it has to be perfect..

But realistically, my source is probably going to be about -90dBc/Hz 
at 1 Hz, -125 at 10Hz, -145 at 100 Hz.  I'm going up by a factor of 
10, so I'd expect 20 dB worse plus a little..(nothing is perfect, eh?)


Call it maybe -100 to -95 at 10 Hz, -125 to -120 at 100 Hz and so forth.

harmonics are interesting: it's the sample clock into an ADC. So 
harmonics of the 100 aren't a big deal.  harmonics of the 10 or 20 
are.  If you have significant 90 or 110 contaminating the 100, then 
you get weird spurs..  (I had this problem on a software radio where 
the 50 MHz sample clock was contaminated with some 66 MHz from the CPU)


Spurs cause the same issues.

ON the other hand... spurs that are pretty low don't make much 
difference if you're digitizing a signal that is close to the noise 
floor: the spur multiplied by the desired signal is usually lower and 
down in the noise.  Strong CW in band signals, though, are a real pain.



< 
https://picasaweb.google.com/103357048842463945642/Tronix#6079270188048833778 
>


I think that top left board would not be far away:

in : 10 MHz LVDS or CMOS
in:  3V3
out: 100 MHz CMOS 3V3

just a few hours wall clock time from layout to working as a
ham radio weekender, so please excuse my diy home board
production process.

Ok, the use of a 4046 descendant may not be the last word
from a timenut perspective, but I'll redo it with an osc of
my own anyway. Divider 100/10 is a LVC163 (161?) + lvc04.


< http://www.crystek.com/crystal/spec-sheets/vcxo/CVHD-950.pdf >

Digi-Key has 153 of them on a tape and  441 of a similar one , even
cheaper that seems to point to the same data sheet.

< 
http://www.digikey.de/product-detail/de/CVHD-950-100.000/744-1213-ND/1644128 
>

You can get the few dB missing close-in by transfer from your reference.

In the picture:
The bottom row of boards is a doubler 100->200 MHz using 2*BF862, slight 
gain,
and diode doubler 200 -> 400 MHz, SAW filter to get rid of 
100/200/300/500/600 +/-10  etc,

post amp to get a usable level again.

Still missing  400-> 800, 800->1600 to feed  _my_ ADC clock input.

regards, Gerhard

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Re: [time-nuts] low noise multiplication to 100 MHz

[Gerhard Hoffmann]

Am 21.01.2016 um 15:43 schrieb jimlux:
My tiny 100 MHz low noise OCXOs are unexpectedly delayed at the mfr, 
and I'm looking at alternative schemes.
One is to get 10 or 20 MHz OCXOs (typically in stock) and multiply 
them up. I've got the Wenzel ap notes on 2diode and using HCMOS (and 
I've used the packaged Wenzel multipliers), and I think I have some 
spare board real estate on another board.



What about locking a 100MHz Crystek CVHD-950 to a 10 MHz ref?
Far out it will not be wonderful, but still better than a multiplied-up 
10 MHz,

close-in the 10 MHz rules.

Has anybody seen seen this simple Wenzel locking circuit?
< http://www.crovencrystals.com/pllclock.htm >

opinions?

regards, Gerhard

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Re: [time-nuts] Generating a solid PPS from 10Mhz source

[Gerhard Hoffmann]

Am 15.01.2016 um 10:14 schrieb Bruce Griffiths:

For lowest jitter the gate power supply noise needs to be very low.Biasing the 
input at 50% supply helps somewhat but the gate threshold is never exactly 50% 
and the low pass filtering effect of the coupling capacitor increases the 
contribution of power supply noise to jitter.
A power supply noise below 10nV/rtHz is probably required to achieve the lowest 
jitter. Few regulators achieve this particularly at low frequencies.


I have recently measured the noise of some regulators, LEDs and Zeners 
with partly unexpected results.
I'll do a write-up and put it on my web site, but here are 3 pictures 
that already tell a lot:


Zeners:

< 
https://www.flickr.com/photos/137684711@N07/24411798996/in/album-72157662535945536/ 
>


Note the low 1/f corner of the BZX84 C2V7 and 3V3.
And 0 dB is the noise of a 60 Ohm resistor, or the INPUT referred noise 
of an AD797 or LT1028.


LEDs abused as References:

< 
https://www.flickr.com/photos/137684711@N07/24354944411/in/album-72157662535945536/ 
>
The Avago HLMP-6000 is the clear winner in terms of noise. Optically, 
it's quite dim.


Regulators:

< 
https://www.flickr.com/photos/137684711@N07/24070698809/in/album-72157662535945536/ 
>
The clear winner here is the LT3042. Now if they made it in an 
acceptable package!
I mounted the MSOP-10 dead bug style on unetched FR4, soldered a thick 
1mm Cu wire across
the exposed pad and put the rest of the circuit on raster board. That 
was no fun, even under the

microscope.

BTW the extra quiet reference of the LT3042 is a current source, so 
there is no
real justification for the repeated claims here that ECL must be noisy 
because of

its integrated current source.


Batteries:

I have done the writeup already:
< 
http://www.hoffmann-hochfrequenz.de/downloads/NoiseMeasurementsOnChemicalBatteries.pdf 
>


and since we are at it:  Lab supplies

< 
http://www.hoffmann-hochfrequenz.de/downloads/Noise_Measurements_On_Some_Laboratory_Power_Supplies.pdf 
>

(still incomplete, but no longer high priority for me)

regards, Gerhard


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Re: [time-nuts] Generating a solid PPS from 10Mhz source

[Gerhard Hoffmann]

Am 16.01.2016 um 15:03 schrieb Bob Camp:

Unlike the world of lithography, the dicing process has not made a lot of 
progress.
Decades ago a 1mm x 1 mm die was about as small as you could get. From what
I can see that has not dropped by more than a factor of two in 40 years (if at 
all).
Yes, there’s a lot more to it than just a dicing saw. Things like bond wire 
attach
also figure in. It still takes a certain size bond wire to carry a practical 
amount
of current …

The net result *could* be a process that does a gate or function  in < 1% of 
the available
area. Everything else is just empty space along for the ride (or to provide 
attach
points).



Already 30 years ago when I took my chip design lessons, there
were chips that were pad-bound. If they had, say, 14 Pins, there
was no point to compress everything together since the pad
locations and the bonding dictated the minimum chip size.

regards, Gerhard
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Re: [time-nuts] DMTD - analog multiplier vs. diode mixer ?

[Gerhard Hoffmann]

Am 10.01.2016 um 22:47 schrieb Alexander Pummer:
and there was also a frequency/phase detector from Analog Devices, 
which took care about that dead zone


AD9901.


73
KJ6UHN
Alex

73, Gerhard, DK4XP
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Re: [time-nuts] Need tiny 5MHz 10x amplifier

[Gerhard Hoffmann]

Am 29.11.2015 um 01:35 schrieb Poul-Henning Kamp:

I need to convert a 5MHz 0.2Vpp AC coupled sine signal to a 3.3V
CMOS compatible logic signal.

The "default" comparator based circuit either requires a negative
supply or 4 resitors for biasing the input and setting the zero level.
(The hysteresis resistor is the same in both cases).

Since space is a bit tight, I've been trying to find something like
a "x10 self-biasing amplifier" but without luck.

Any good ideas ?

SN65LVDS2DBVT or similar with 1k/100nF feedback from OUT to INV to get 
50% duty cycle

if you want that. Available also with 100 Ohm input termination. SOT23-5.

< http://www.ti.com.cn/cn/lit/ds/symlink/sn65lvds1.pdf >

regards, Gerhard



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Re: [time-nuts] Low noise quartz crystal oscillator by Bruce Griffiths

[Gerhard Hoffmann]

Am 28.10.2015 um 19:22 schrieb KA2WEU--- via time-nuts:

This oscillator seems to have been more a frequency standard then a noise
standard. Today's 10 MHz oscillators are different/better, such a crystal is
no  longer available/made.
  
Yes. Rubiola gives it the credit of being able to be mass-produced, and 
it _was_

one successful product. There is a section in "hacking oscillators" on it;
my copy of the book is 200 miles away right now.

regards,

Gerhard, DK4XP


(see www.rubiola.org)
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Re: [time-nuts] Low noise quartz crystal oscillator by Bruce Griffiths

[Gerhard Hoffmann]

Am 28.10.2015 um 23:04 schrieb Richard (Rick) Karlquist:

Do you have a specific URL for "hacking oscillators"?  I can't
find it on Rubiola's web site.

It is a chapter in his book where he analyzes the form of the noise spectra.
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Re: [time-nuts] Unified VCXO Carrier Board

[Gerhard Hoffmann]

Am 27.10.2015 um 13:50 schrieb Charles Steinmetz:

Gerhard wrote:


Since the LM329 was mentioned above, I tried it also. Another surprise.
HOW CAN THEY MAKE SUCH A NOISY SUBSURFACE ZENER???

0 dB = 1nV/sqrt Hz


The datasheet for both NS and LT LM329s shows broadband noise of 
<70nV/sqrtHz, with a corner at ~100Hz, rising to a touch over 
100nV/sqrtHz at 10Hz.  That is consistent with the LM329s I have used. 
So, according to the datasheet, the 10Hz noise ought to be a touch 
above 40dB on your graph and the curve should level off above 100Hz at 
about 30dB -- if I have done my dBs right. Still somewhat higher than 
most of the other diodes you tested, but not outlandishly so.


Your data seems to be *much* worse than this, with a 1/f noise corner 
at ~10kHz (!!), rising to what appears to be about 1mV/sqrtHz (!!) at 
10Hz.  Is it possible you got fakes?  (I know someone who 


It's bad, but not that bad.  10 times the voltage is 20 dB more. So

0dB   = 1nV/sqrt Hz
20 dB = 10 nV
40 dB = 100 nV
60 dB = 1uV
80 dB = 10 uV/sqrt Hz

The wideband noise at, say, 46 dB would be 200 nV/sqrt Hz  versus the 
claimed 75 nV typical
but the corner frequency is really bad. I bought them last year from 
Digi-key, still with

National as manufacturer on the bag, not TI.

I'll test a few more next weekend.

regards, Gerhard



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Re: [time-nuts] Unified VCXO Carrier Board

[Gerhard Hoffmann]

Am 24.10.2015 um 22:21 schrieb Bruce Griffiths:

On Saturday, October 24, 2015 09:03:21 AM Charles Steinmetz wrote:

The spec sheet says both TimePod inputs accept -5 to +20dBm into 50
ohms.  -5dBm is less than 0.4Vp-p, which requires less than +/-4mA
from the source, so a 0-5v comparator output feeding a
capacitor and a 560 ohm series resistor should work fine as long as
the comparator can source and sink at least 4mA.

The fly in the ointment is that with such low level inputs (the LTC6957-4
evaluation board will deliver +4dBm into 50 ohm) the Timepod phase noise
floor is uncomfortably close to the phase noise floor of the LTC6957.

Alternatively, a 0-5v comparator output could be buffered with three
'AC04 inverters in parallel, or an 'AC line driver -- but that adds s
the PN of the gates.


Not if one uses a pair of drivers one to drive the Timepod Ch0 input and
one to drive the Timepod CH2 input.
...
It would perhaps be useful to measure the PN characteristics of several
comparators and other sine to square converter circuits using a Timepod
or equivalent.


For the sake of repeatability, could we agree on a common setup?
Timepod would be ok for me. Levels, sources, filters, splitters...

regards, Gerhard


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Re: [time-nuts] Unified VCXO Carrier Board

[Gerhard Hoffmann]

Am 23.10.2015 um 21:27 schrieb Charles Steinmetz:


Use medium-speed transistors, bias both bases from the same low-noise 
voltage reference such as an LM329, capacitively couple the emitters, 
and use a higher supply voltage, for starters.  I use 
This evening, I have measured some oh so noisy zeners and was pleasantly 
surprised.

Other than one 40+ year old glass diode all of them were pretty low noise.

Since the LM329 was mentioned above, I tried it also. Another surprise.
HOW CAN THEY MAKE SUCH A NOISY SUBSURFACE ZENER???

Bias for the DUTs was a 1K wire resistor from 10 NiMH cells. The bias 
source does not
add any visible noise. The "shorted" trace shows the noise floor of the 
system. That is
about 220 pV/sqrt Hz.  FFT analyzer is an Agilent 89441A. It has strong 
1/f noise that is

barely hidden by the preamp. 0 dB = 1nV/sqrt Hz

MPSH81/MMBTH81s and a power supply of around 20v (see attached 
schematic) for a reasonably 
optimized implementation.  Other transistors can be used, but I've 
found that the H81s work better for squaring 1-10MHz sine waves than 
anything else I've tried -- they hit the sweet spot of the 
bandwidth/gain tradeoff and have a nice flat gain vs. current 
characteristic.


Are there differences between Fairchild and Motorola?

regards, Gerhard

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[time-nuts] really Idle Lucent KS24361

[Gerhard Hoffmann]

Is there an easy way to get the Z3811/12 into a state where they
just leave their oscillators alone? I do not mean holdover as when
I just pull the GPS antenna plug; then they will probably try to
correct for drift based on learned history.

I want the "pure" MTI-260s.

And if I build in mechanical switches, they will interfere with
the learning...

regards, Gerhard
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Re: [time-nuts] Unified VCXO Carrier Board

[Gerhard Hoffmann]

Am 22.10.2015 um 22:04 schrieb Charles Steinmetz:
As I have said before, there is very little if any advantage to using 
an LTC6957 at 10MHz (as opposed to using a run-of-the-mill comparator),


What do you consider a run-of-the-mill comparator? LM139, LMV7219, 
AD8561, ADCMP580?


and the LTC6957 is not as good, even with filtering on, as a circuit 
with lower inherent jitter such as an optimized Wenzel-style squarer.
What optimizations?  I have seen the "Wenzel" circuit in cheapish 
frequency counter inputs in

the late seventies, maybe with a diode bridge added as input protection..


The graph compares an optimized 6957 implementation without filtering 
and with optimum filtering.  At an input level of -10dBm, the phase 
noise floor is 7dB lower with filtering, and at an input of +10dBm, 
the improvenent is <2.5dB.  Extrapolating beyond the graph to the 
right, at an input level of +13dBm (= 1Vrms, the customary level for 
frequency references), the improvement with filtering will be very 
near 0dB. 


so it shows that one can replace filtering by signal power :-)


I realize that you did not say you expect to use the board only at 
10MHz, and the LTC6957 with filtering may provide some improvement at 
lower frequencies (compared to the 6957 without filtering). But even 
with filtering on, the 6957 will not outperform an optimized 
Wenzel-type squarer until you get well down into the kHz range. 


But in the KHz range, the filter corner frequency should be much lower 
than in the 6957...


The 100 MHz range would be more interesting. The Wenzel squarer would 
then need
"real transistors" with higher 1/f corner. The PLL would have a sub-Hz 
BW in this application,
so the race for the lowest floor seems not too important. OK, maybe for 
the 1pps.


The 6957 takes one square centimeter including transformer and works for 
all frequencies.

Any objections against the AD9901 phase comparator? I have a tube of them.

regards, Gerhard
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[time-nuts] Unified VCXO Carrier Board

[Gerhard Hoffmann]

I'd like to design a unified VCXO Carrier Board to these requirements:


1. It can host one of the the following VCXOs:

1.1. HP 10811A-6111 (as from 5370A)

1.2 Morion MV89A

1.3 MTI 260

1.4 CV-950

1.5 Timetech

1.6 Axtal

1.7 Pascall


2. It provides unified tuning: 0V = lowest possible frequency, 3V3 or 5V 
= highest possible frequency, no matter of the VCXO tuning sense and range.


3. provides a 5V tuning voltage reference for those VCXOs that don't 
have one of their own.


4. Frequency can be adjusted from external Vtune input and from a 10 
turn pot.


5.Board has 2 reference frequency inputs with LTC6957 receivers. One of 
them can interface the onboard VCXO to the CPLD.


6. Board has a 1pps input 3V3 CMOS level

7. It can lock the VCXO to the reference frequency or the 1pps in. 
Provides LED lock indication.


8. It features a Xilinx Coolrunner2 2C64 CPLD, complexity 64 FlipFlops + 
combin. Logic. Unused Pins are brought out to Testpoints in 100 mil 
grid. The Coolrunner remembers its configuration and can be reprogrammed 
using the standard Xilinx USB dongle. It has a 10 pin 2mm header for 
this purpose. Small circuits can run at 200 MHz. This function exists 
already:
< 
https://picasaweb.google.com/lh/photo/4Bpcfouj8WH0shNGIyuVUtMTjNZETYmyPJy0liipFm0?feat=directlink 
>


9. The Coolrunner provides a standard 1pps /20us out, maybe 10/100/1000 pps.

10. 2 Monoflops for 1pps LEDs in/out

11. There are 2 output buffers that drive valid 3V3 CMOS into 50 Ohms. 
They can be re-clocked to LTC6957 outputs with 1G74 flipflops.


12. Unbuffered VCXO output is available on SMA connector

13. One additional buffered output (LMH6702/AD8009 or discrete to avoid 
neg. supply). This is not meant to be a distribution amplifier.


14. Regulators for the voltages needed.

15. Requires soldering skills 0603 / sot23-5 / MSOP. No commercial 
interest. Could be TAPR or DIY.



I'm open to suggestions & ideas.

regards,
Gerhard, DK4XP


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Re: [time-nuts] Unified VCXO Carrier Board

[Gerhard Hoffmann]

Am 22.10.2015 um 19:58 schrieb Garry Thorp:


To make things a bit more complicated, Pascall oscillators' tune voltage range is 
0 - 10V. Tuning to the nominal frequency is likely to require >5V.




That would not stop me, that is in the reach of most op amps, but I was
quoted €4k2 + 19% VAT for a 100 MHz unit a month ago IIRC. Then I can
have someone select the crystals myself.
Nevertheless, we use them from time to time, but not for pure fun 
activities.


:-)   Gerhard   DK4XP
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Re: [time-nuts] [Bulk] Unified VCXO Carrier Board

[Gerhard Hoffmann]

Am 22.10.2015 um 18:30 schrieb J. L. Trantham:

Don't know if it would help much in your ultimate plan but the concept has been 
done before as the 53132-60011 and 53132-60016 Optional Time Base Boards for 
the 53132A counters.  These boards will accommodate either an Isotemp OCXO33-46 
(HP 1813-0931) OCXO for OPT 001, or either of two variants of the 10811 for OPT 
010 or 012.  There is a jumper that needs to removed and possibly connected to 
a power supply for the 10811's.

Might be helpful to take a look at for ideas.

Thanks, I'll take a look if I find it to harvest ideas, but given the 
ebay situation, the Morion and
the MTI-260 are a must. The project will probably require jumpers by the 
pound..

I still have a wire-wrap gun. :-)

Gerhard
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Re: [time-nuts] looking for SMT oscillator SC cut, with no oven

[Gerhard Hoffmann]

Am 26.08.2015 um 22:04 schrieb Javier Herrero:


I suppose that one of the alternatives that you've explored are the 
ABLNO from Abracon http://www.abracon.com/Precisiontiming/ABLNO.pdf


looks just like this one from Crystek:

 http://www.digikey.de/product-search/de?keywords=cvhd-950 

but that fails the specs, also. If you have a good quality 5 or 10 MHz 
source in your

system, you can lock the VCXO to it and clean it up close to the carrier.

Last week, I asked for the prices of the 100 MHz Pascalls (not SMD but SMA)
but at  € 4K +VAT a piece I better make someone select crystals myself. :-(

Maybe Axtal has something.

They say that they are 3rd overtone, but it seems more an AT-cut than 
a SC, and anyway is around 10dB poorer


SC requires high temperature, that does not go together well with SMD 
and low power.



regards, Gerhard

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Re: [time-nuts] KS-24361 EFC Error

[Gerhard Hoffmann]

Am 12.08.2015 um 19:13 schrieb Dave M:
I have verified with MTI that the recommended tuning voltage for model 
260-0624-C is 0 to 6V.
The datasheet range of -10V to +10V is the available range of EFC for 
the entire 260 series, and may or may not apply to any specific model 
within the 260 series.




I have measured the tuning behaviour of some MTI and Morion VCXOs.
The witeup is at:

 http://www.hoffmann-hochfrequenz.de/downloads/VCXO_tuning.pdf 

For the MTIs, the interesting range is indeed 0 to 6V, but they seem to
work without surprises in the +/- 10V range. So if your op amp delivers 
a bit

more or if you think you could use +/- a few extra Hz against ageing:
that seems ok.


73, Gerhard, DK4XP
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Re: [time-nuts] KS-24361 REF-0 standalone

[Gerhard Hoffmann]

Am 09.08.2015 um 21:48 schrieb Pete Lancashire:

100% 2nd the thanks to all.


OMG. 27 bytes of good technical content in a 19.7 KBytes message with 13 
levels of citing.

Please, everybody, snip the context that is no longer needed.

regards, Gerhard
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[time-nuts] Fwd: Re: Square to sine wave symmetrical conversion (part 2)

[Gerhard Hoffmann]

[I could not see this echoed by the server on the 1st try. ]


Am 28.07.2015 um 03:58 schrieb Bill Byrom N5BB:

[ nice and understandable summary of the Lee / Hajimiri ideas ]


OTOH with this Dirac-style resonator feeding, one collects the
noise sidebands from order 1 to MAXINT and one needs to align
all these harmonics nicely.

It also does not help against low frequency effects that require
stability over many cycles, such as the 1/f region.

And it is only half the work. We not only need to feed the resonator,
we also want RF from it. Thus, to stay with this principle, the sustaining
amplifier would have to fetch its input also in Dirac style.

Now we are pretty close to an  ultra wideband  nonlinear loop gain.
Any low pass filtering will have to be done in front of the feeding
pulse former, or the harmonics will not align. And apart from
BW limiting we need something to set the net loop phase to 0.

The pulse output of the sustaining amplifier is also not nice to use
unless we want to feed a sampler or 1:2-FlipFlop.

Output filtering via the resonator, say, in the elegant Burgeon(?) style
would also be forbidden.

As I see it, L/H creates a lot of problems, and worse, it does not
provide a design algorithm, even if we accept the complications.


regards, Gerhard,  DK4XP


(Arghh, I'm writing this on a 4*2 thread machine at 3.8 GHz, and
Thunderbird produces typing delays...  Turbo-C on Z80 with a
Wyse-50 terminal felt better.)




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[time-nuts] Fwd: Re: Wikipedia and Residual Phase Noise

[Gerhard Hoffmann]

 Weitergeleitete Nachricht 
Betreff:Re: [time-nuts] Wikipedia and Residual Phase Noise
Datum:  Tue, 28 Jul 2015 14:54:47 +0200
Von:Gerhard Hoffmann dk...@arcor.de
Antwort an: g...@hoffmann-hochfrequenz.de
An: time-nuts@febo.com



Am 14.07.2015 um 02:32 schrieb KA2WEU--- via time-nuts:
 

With your kind permission I (totally ) disagree with you . We make 10 GHz
oscillators which are almost getting close to the Poseidon Sapphire , but


 optical?


the post power amplifier
at 10 Ghz has a much higher noise floor then the source . I have not yet
solved the problem

My new FSWP (RS) Analyzer can measure down to - 190dBc/Hz .



How do you do _that_? 20-cornered hat with 20 ADCs and references?
The ADCs and FPGAs would be cheap enough, the references less so.



Wish me luck, Ulrich



Wish granted, Gerhard DK4XP  ;-)









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Re: [time-nuts] Wikipedia and Residual Phase Noise

[Gerhard Hoffmann]

Am 14.07.2015 um 02:32 schrieb KA2WEU--- via time-nuts:

Dear Magnus,
  
With your kind permission I (totally ) disagree with you . We make 10 GHz

oscillators which are almost getting close to the Poseidon Sapphire , but

optical?

the post power amplifier
at 10 Ghz has a much higher noise floor then the source . I have not yet
solved the problem
  
My new FSWP (RS) Analyzer can measure down to - 190dBc/Hz .

How do you do _that_? 20-cornered hat with 20 ADCs and references?
The ADCs and FPGAs would be cheap enough, the references less so.

  
Wish me luck, Ulrich
  


Wish granted, Gerhard DK4XP  ;-)







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