This patch looks good to me.
Reviewed by: Sunny Wang
Regards,
Sunny Wang
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ruiyu Ni
Sent: Monday, November 02, 2015 7:34 PM
To: edk2-devel@lists.01.org
Cc: Ruiyu Ni; Eric Dong
Hi Ray,
The places for launching PlatformRecovery options and boot menu option
(for Successful boot) in this code change look good to me. I think this patch
can solve problem I mentioned in our previous discussion for
PlatformBootManagerDefaultBootFail related patch. Thanks for making
On 11/03/15 02:56, Ni, Ruiyu wrote:
> Shell doesn't depend on PciIo protocol to find all PCI devices.
I didn't know that, thank you for the info!
Laszlo
>
> Thanks,
> Ray
>
> -Original Message-
> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Laszlo
> Ersek
>
Hi Jordan,
Yes, you are right! It could make commit message subject clearer. I saw
the related information mentioned in
https://github.com/tianocore/tianocore.github.io/wiki/Commit-Message-Format
This is my mistake. Thanks for the reminder. I will do that next time.
Regards,
Two additional scenarios in which CloseEvent() needs to be called:
We sent a Request to HTTP server, following which we did a
Response() call, with the intent of capturing only the headers.
In this case, we execute an if condition in HttpResponseWorker do
a goto Exit. HttpDxe will cache the body
Hi Ray,
This patch overall looks good to me. I just made a minor comment in
this patch. You can search "[Sunny]" to find it out.
Regards,
Sunny Wang
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Ruiyu Ni
Sent: Monday, November 02, 2015
> -Original Message-
> From: Zeng, Star
> Sent: Monday, November 02, 2015 7:13 PM
> To: Carsey, Jaben ; Cinnamon Shia
> ; edk2-devel@lists.01.org
> Subject: Re: [edk2] [PATCH 1/2] ShellPkg/UefiDpLib: Fix a DP cumulative data
> issue
>
Reviewed-by: Jaben Carsey
> -Original Message-
> From: Zeng, Star
> Sent: Monday, November 02, 2015 8:02 PM
> To: edk2-devel@lists.01.org
> Cc: Carsey, Jaben
> Subject: [PATCH] ShellPkg UefiDpLib: Use correct string length for the input
>
On 3 November 2015 at 12:56, Leif Lindholm wrote:
> On Tue, Nov 03, 2015 at 11:16:28AM +0100, Ard Biesheuvel wrote:
>> The ARM9 ArmLib implementation is not referenced anywhere in the
>> tree, and unlikely to be useful going forward, considering that
>> ARM9 outdates
Stat,
Thanks for your feedback and review.
Will submit the v2 patch for addressing your comments.
And submit another patch for PerformancePkg\Dp_App
Thanks,
Cinnamon Shia
-Original Message-
From: Zeng, Star [mailto:star.z...@intel.com]
Sent: Tuesday, November 3, 2015 11:16 AM
To: Shia,
Add a new option -c to dump cumulative data.
For example:
shell> dp -c
==[ Cumulative ]
(Times in microsec.) Cumulative Average ShortestLongest
Name CountDurationDurationDurationDuration
LoadImage: 200 1007000 0
Thanks Jeremy.
On 2 November 2015 at 20:54, Jeremy Linton wrote:
> The JunoR1 has a GICv2m which is a GICv2 with a little piece of hardware
> that has some memory mapped locations that can trigger traditional SPI
> interrupts. This allows some basic PCIe MSI capabilities.
On Tue, Nov 03, 2015 at 11:16:29AM +0100, Ard Biesheuvel wrote:
> The function ArmCleanDataCacheToPoU() has no users, and its purpose
> is unclear, since it uses cache maintenance by set/way to perform
> the clean to PoU, which is a dubious practice to begin with. So
> remove the declaration and
Hi guys,
I never saw a response to this feedback I sent on the revised patch
set, but I see it has now been committed.
Could you let me know why my feedback was ignored?
Regards,
Leif
On 30 October 2015 at 18:02, Leif Lindholm wrote:
> Hi Ray,
>
> Many thanks for
On Tue, Nov 03, 2015 at 11:16:28AM +0100, Ard Biesheuvel wrote:
> The ARM9 ArmLib implementation is not referenced anywhere in the
> tree, and unlikely to be useful going forward, considering that
> ARM9 outdates even ARMv6. So remove it.
While I agree in principle, I don't think we can safely
The ARM architecture provides no reliable way to clean or invalidate
the entire data cache at runtime. The reason is that such maintenance
requires the use of set/way maintenance operations, which are suitable
only for the kind of maintenance that is carried out when the cache is
taken offline
Drop the call to ArmInvalidateDataCache () from the PrePi and PrePeiCore
startup sequences. This kind of data cache maintenance should not be
performed at the UEFI firmware level.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel
---
From: Mark Rutland
The ARM architecture requires a DSB to complete TLB maintenance, with a
subsequent ISB being required to synchronize subsequent items in the
current instruction stream against the completed TLB maintenance.
The ArmEnableMmu function is currently missing
The function ArmCleanDataCacheToPoU() has no users, and its purpose
is unclear, since it uses cache maintenance by set/way to perform
the clean to PoU, which is a dubious practice to begin with. So
remove the declaration and all definitions.
Contributed-under: TianoCore Contribution Agreement 1.0
On 03/11/2015 15:35, Xiao Guangrong wrote:
>
> -if ((cr0 ^ old_cr0) & X86_CR0_CD)
> +if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED) &&
> +(cr0 ^ old_cr0) & X86_CR0_CD)
> kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
>
>
On Tue, Nov 03, 2015 at 11:16:34AM +0100, Ard Biesheuvel wrote:
> Drop the call to ArmInvalidateDataCache () from the PrePi startup
> sequence. This kind of data cache maintenance should not be performed
> at the UEFI firmware level.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
>
On 11/03/15 15:58, Janusz Mocek wrote:
> W dniu 03.11.2015 o 14:31, Laszlo Ersek pisze:
>> On 11/03/15 13:34, Paolo Bonzini wrote:
>>>
>>> On 03/11/2015 02:14, Laszlo Ersek wrote:
Anyway, with the following host kernel change, the AP startup problem
goes away (tested on top of v4.3):
Reviewed-by: Erik Bjorge
-Original Message-
From: Daryl McDaniel [mailto:edk2-li...@mc2research.org]
Sent: Tuesday, November 3, 2015 10:37 AM
To: edk2-devel@lists.01.org; Carsey, Jaben ; Bjorge,
Erik C ;
Reviewed-by: Jaben Carsey
> -Original Message-
> From: Daryl McDaniel [mailto:edk2-li...@mc2research.org]
> Sent: Tuesday, November 03, 2015 10:37 AM
> To: edk2-devel@lists.01.org; Carsey, Jaben ;
> Bjorge, Erik C ;
The value of PERF_CUM_DATA.Count and PERF_CUM_DATA.Duration field
keep cumulating on every execution of dp.
Initialize the CumData at dp's entry point.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Cinnamon Shia
---
ShellPkg/Library/UefiDpLib/Dp.c
AppPkg: Within the Ia32 and X64 pyconfig.h files, there are 178 occurrences
of an accent character, `, being used instead of a regular single quote, ',
within comments.
Replace all occurrences of ` within comments with '. Example:
OLD: `foobar'
NEW: 'foobar'
The same changes are
Reviewed-by: Jaben Carsey
> -Original Message-
> From: Bjorge, Erik C
> Sent: Tuesday, November 03, 2015 10:43 AM
> To: Daryl McDaniel ; edk2-devel@lists.01.org;
> Carsey, Jaben ; Rosenbaum, Lee G
>
Ard,
This is probably a reflection of my lack of deep understanding of ARM cache
maintenance on more complex systems.
The "entire cache" operations exist to allow transitions across major
environments (initialization of non-self initializing caches, changing phases
of boot, etc) to
The Link flags are as below in the latest UDK2015 (and in 2014 too). Is
the machine type good or should be changed to X64?
RELEASE_DDK3790_X64_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001
/IGNORE:4078 /OPT:REF /OPT:ICF=10 /MAP /ALIGN:32 /SECTION:.xdata,D
/SECTION:.pdata,D */Machine:AMD64*
In this patch we incorporate code from
Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuMpDxe that populates the
following fields in ACPI_CPU_DATA for PiSmmCpuDxeSmm:
- ACPI_CPU_DATA.GdtrProfile
- ACPI_CPU_DATA.IdtrProfile
- ACPI_CPU_DATA.ApMachineCheckHandlerBase
-
The StartupVector member of ACPI_CPU_DATA points to low level assembly
code that starts out in real mode, and is the boot code that gets run on
each AP in response to an INIT-Start-up-Start-up IPI sequence.
Importantly, *each* one of PiSmmCpuDxeSmm and CpuMpDxe (from
Continuing the pattern seen in the previous patches, we now incorporate
code from Quark_EDKII_v1.1.0/IA32FamilyCpuBasePkg/CpuMpDxe that populates
- ACPI_CPU_DATA.StackAddress,
- ACPI_CPU_DATA.StackSize.
During normal boot, CpuS3DataDxe allocates stack in the entry point for
all the APs in AcpiNVS
From: Paolo Bonzini
The descriptor format is different and the assembly source is
converted to nasm, but otherwise there is no difference.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paolo Bonzini
---
Notes:
v3:
-
At this point we can enable building PiSmmCpuDxeSmm.
CPU specific features, like SMRR detection, and functions that are used to
initialize SMM and process SMIs, are abstracted through the
SmmCpuFeaturesLib class for the PiSmmCpuDxeSmm module. Resolve it to our
own implementation under OvmfPkg --
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek
Reviewed-by: Jordan Justen
---
OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf | 89
> On Nov 3, 2015, at 11:42 AM, Jordan Justen wrote:
>
> On 2015-11-03 05:45:52, Paolo Bonzini wrote:
>>
>>
>> On 03/11/2015 14:25, Laszlo Ersek wrote:
>>> - Agreement between Paolo, Jordan and Mike about implementing
>>>broadcast SMIs. I am willing to
On 03/11/2015 20:42, Jordan Justen wrote:
> On 2015-11-03 05:45:52, Paolo Bonzini wrote:
>>
>>
>> On 03/11/2015 14:25, Laszlo Ersek wrote:
>>> - Agreement between Paolo, Jordan and Mike about implementing
>>> broadcast SMIs. I am willing to code up whatever design is
>>>
On 11/03/15 14:25, Laszlo Ersek wrote:
> (6) In closing:
>
> - The LZMA decompression slowdown has been quirked in the upstream
> kernel. A KVM ioctl() has been introduced that allows QEMU
> userspace to *disable* any quirks, but as far as I can see in
> QEMU, this is not
BaseExtractGuidedSectionLib uses a table at the static physical address
PcdGuidedExtractHandlerTableAddress, and modules that are linked against
BaseExtractGuidedSectionLib are expected to work together on that table.
Namely, some modules can register handlers for GUIDed sections, some other
From: Michael Kinney
Add mappings to DebugAgentLib for SMM modules to prevent build breaks when
SMM_REQUIRE and SOURCE_DEBUG_ENABLE are both set.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney
This build time flag and corresponding Feature PCD will control whether
OVMF supports (and, equivalently, requires) SMM/SMRAM support from QEMU.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek
Reviewed-by: Jordan Justen
PiSmmCpuDxeSmm depends on this library class, and it's okay to resolve it
generally for all DXE_SMM_DRIVER modules.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek
---
OvmfPkg/OvmfPkgIa32.dsc| 1 +
OvmfPkg/OvmfPkgIa32X64.dsc | 1 +
In SVN r15306 (git commit d4ba06df), "OvmfPkg: S3 Resume: fake LockBox
protocol for BootScriptExecutorDxe", we installed a fake LockBox protocol
in OVMF's AcpiS3SaveDxe clone. While our other AcpiS3SaveDxe
customizations remain valid (or harmless), said change is invalid when
OVMF is built with -D
On 2015-11-03 05:45:52, Paolo Bonzini wrote:
>
>
> On 03/11/2015 14:25, Laszlo Ersek wrote:
> > - Agreement between Paolo, Jordan and Mike about implementing
> > broadcast SMIs. I am willing to code up whatever design is
> > agreed upon. Can everyone involved please
From: Paolo Bonzini
This implementation copies SMRAM state save map access from the
PiSmmCpuDxeSmm module.
The most notable change is:
- dropping support for EFI_SMM_SAVE_STATE_REGISTER_IO
- changing the implementation of EFI_SMM_SAVE_STATE_REGISTER_LMA to use
the SMM
PlatformPei calls GetSystemMemorySizeBelow4gb() in three locations:
- PublishPeiMemory(): on normal boot, the permanent PEI RAM is installed
so that it ends with the RAM below 4GB,
- QemuInitializeRam(): on normal boot, memory resource descriptor HOBs are
created for the RAM below 4GB; plus
When the user requires "security" by passing -D SMM_REQUIRE, and
consequently by setting PcdSmmSmramRequire, enforce flash-based variables.
Furthermore, add two ASSERT()s to catch if the wrong module were pulled
into the build.
Contributed-under: TianoCore Contribution Agreement 1.0
Thanks to the previous patch, from Paolo, we can now build
QuarkPort/CpuS3DataDxe for X64 as well.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek
---
Notes:
v3:
- new in v3; split out from
"OvmfPkg: add skeleton
Cc: Paolo Bonzini
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek
---
Notes:
v4:
- update to current test results
v3:
- this documentation is not accurate any longer, but since Paolo and
From: Paolo Bonzini
This adjusts the previously introduced state save map access functions, to
account for QEMU and KVM's 64-bit state save map following the AMD spec
rather than the Intel one.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paolo
The following modules constitute the variable driver stack:
- QemuFlashFvbServicesRuntimeDxe and EmuVariableFvbRuntimeDxe, runtime
alternatives for providing the Firmware Volume Block(2) Protocol,
dependent on qemu pflash presence,
- FaultTolerantWriteDxe, providing the Fault Tolerant Write
If OVMF was built with -D SMM_REQUIRE, that implies that the runtime OS is
not trusted and we should defend against it tampering with the firmware's
data.
One such datum is the PEI firmware volume (PEIFV). Normally PEIFV is
decompressed on the first boot by SEC, then the OS preserves it across S3
When -D SMM_REQUIRE is given, replace both
- OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf and
- OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf
with
- OvmfPkg/QemuFlashFvbServicesRuntimeDxe/FvbServicesSmm.inf.
The outermost (= runtime DXE driver) VariableSmmRuntimeDxe enters SMM, and
The PiSmmCpuDxeSmm driver depends on the ACPI_CPU_DATA structure, from a
platform- and CPU-specific driver, in order to support S3. The address of
this structure is communicated through the dynamic PCD
PcdCpuS3DataAddress.
The data and control flows are as follows (CpuMpDxe stands for the
This patch complements the previous one, "OvmfPkg: use relaxed AP SMM
synchronization mode". While that patch focuses on the case when the SMI
is raised synchronously by the BSP, on the BSP:
BSPHandler() [UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c]
SmmWaitForApArrival()
From: Paolo Bonzini
SMRR and MTRR support is not needed on a virtual platform.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Paolo Bonzini
Acked-by: Laszlo Ersek
[ler...@redhat.com: insert space between
Explanation from Michael Kinney:
This PCD allows a platform to provide PlatformSmmBspElection() in a
platform specific SmmCpuPlatformHookLib instance to decide which CPU
gets elected to be the BSP in each SMI.
The SmmCpuPlatformHookLibNull [instance] always returns EFI_NOT_READY
for
When the user builds OVMF with -D SMM_REQUIRE, our LockBox implementation
must not be used, since it doesn't actually protect data in the LockBox
from the runtime guest OS. Add an according assert to
LockBoxLibInitialize().
Furthermore, since our LockBox must not be selected with -D SMM_REQUIRE,
The next patch added to CpuS3DataDxe will depend on this header file;
import it.
The typedefs for REGISTER_TYPE, CPU_REGISTER_TABLE_ENTRY, and
CPU_REGISTER_TABLE are removed from the imported header file, because
"UefiCpuPkg/Include/AcpiCpuData.h" already provides those. Instead,
"CpuConfigLib.h"
The SMM core depends on EFI_SMM_ACCESS2_PROTOCOL. This small driver (which
is a thin wrapper around "OvmfPkg/SmmAccess/SmramInternal.c" that was
added in the previous patch) provides that protocol.
Notably, EFI_SMM_ACCESS2_PROTOCOL is for boot time only, therefore
our MODULE_TYPE is not
During DXE, drivers save data in the LockBox. A save operation is layered
as follows:
- The unprivileged driver wishing to store data in the LockBox links
against the "MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxDxeLib.inf"
library instance.
The library allows the unprivileged driver to
"MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf" (a DXE_RUNTIME_DRIVER)
implements the SMM Initial Program Loader. It produces
EFI_SMM_BASE2_PROTOCOL and EFI_SMM_COMMUNICATION_PROTOCOL, relying on:
- EFI_SMM_ACCESS2_PROTOCOL
(provided by OvmfPkg/SmmAccess/SmmAccess2Dxe.inf),
-
The EFI_SMM_COMMUNICATION_PROTOCOL implementation that is provided by the
SMM core depends on EFI_SMM_CONTROL2_PROTOCOL; see the
mSmmControl2->Trigger() call in the SmmCommunicationCommunicate() function
[MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c].
Contributed-under: TianoCore Contribution Agreement
AddReservedMemoryBaseSizeHob() should be able to set the same resource
attributes for reserved memory as AddMemoryBaseSizeHob() sets for system
memory. Add a new parameter called "Cacheable" to
AddReservedMemoryBaseSizeHob(), and set it to FALSE in the only caller we
have at the moment.
This driver provides EFI_SMM_CPU_IO2_PROTOCOL, which the SMM core depends
on in its gEfiDxeSmmReadyToLockProtocolGuid callback
(SmmReadyToLockHandler(), "MdeModulePkg/Core/PiSmmCore/PiSmmCore.c").
Approached on a higher level, this driver provides the SmmIo member of the
EFI_SMM_SYSTEM_TABLE2
UefiCpuPkg/PiSmmCpuDxeSmm depends on this library (the
RegisterCpuInterruptHandler() function specifically) to set up its
specialized page fault handler (SmiPFHandler() -> DumpModuleInfoByIp()).
It doesn't hurt to resolve this library class for all DXE_SMM_DRIVER
modules.
Contributed-under:
Print the optional build environment PACKAGES_PATH and EDK_TOOLS_BIN.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao
---
BaseTools/Source/Python/build/build.py | 4
1 file changed, 4 insertions(+)
diff --git
When PACKAGES_PATH is set, ECP pkg may be in another directory, not exist
in WORKSPACE. So, keep this check in single WORKSPACE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao
---
BaseTools/Source/Python/build/build.py | 22
On 2015/11/4 0:55, Cinnamon Shia wrote:
Add a new option -c to dump cumulative data.
For example:
shell> dp -c
==[ Cumulative ]
(Times in microsec.) Cumulative Average ShortestLongest
Name CountDurationDurationDurationDuration
LoadImage:
On 2015/11/4 0:55, Cinnamon Shia wrote:
The value of PERF_CUM_DATA.Count and PERF_CUM_DATA.Duration field
keep cumulating on every execution of dp.
Initialize the CumData at dp's entry point.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Cinnamon Shia
Suggest to add a note that this new API is for signed PE/COFF image only. Other
parts are good to me.
Reviewed-by: Ye Ting
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Qin Long
Sent: Tuesday, November 03, 2015 2:38 PM
To:
Sathya:
DDK3790 tool chain matches Microsoft WINDDK version 3790.1830. For this
version WINDDK, AMD64 is used for X64 Machine type.
Thanks
Liming
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of Andrew
Fish
Sent: Wednesday, November 04, 2015
On 11/3/15 8:12 PM, Sheng, Cecil (HPS SW) wrote:
The "EDK II C Coding Standards Specification v2" listed on
http://tianocore.sourceforge.net/wiki/EDK_II_User_Documentation cannot be found. Is it
moved to another place or ?
It may have been removed because it's fairly ancient (2008) and
Hi,
The "EDK II C Coding Standards Specification v2" listed on
http://tianocore.sourceforge.net/wiki/EDK_II_User_Documentation cannot be
found. Is it moved to another place or ?
Sincerely,
Cecil Sheng
ISS Firmware Development
HP Servers
___
Signed-off-by: lushifex
---
Vlv2DeviceRefCodePkg/AcpiTablesPCAT/GloblNvs.asl | 5 +++--
Vlv2DeviceRefCodePkg/AcpiTablesPCAT/PciTree.asl| 14 --
Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c | 3 ++-
Reviewed-by: Tim He
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of lushifex
Sent: Wednesday, November 04, 2015 1:05 PM
To: edk2-devel@lists.01.org
Subject: [edk2] [Patch] Add BIOS Item "RTC Battery Present"
Signed-off-by:
On 03/11/2015 14:25, Laszlo Ersek wrote:
> - Agreement between Paolo, Jordan and Mike about implementing
> broadcast SMIs. I am willing to code up whatever design is
> agreed upon. Can everyone involved please prioritize this
> discussion a little?
Actually, I was
Please don't remove this functionality. At times we do want to use this
library to turn off the cache in preparation for going to another environment
(say, loading an OS) and this is useful.
Eugene
-Original Message-
From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf
On 11/03/15 14:45, Paolo Bonzini wrote:
>
>
> On 03/11/2015 14:25, Laszlo Ersek wrote:
>> - Agreement between Paolo, Jordan and Mike about implementing
>> broadcast SMIs. I am willing to code up whatever design is
>> agreed upon. Can everyone involved please prioritize this
On 2015/11/3 21:26, Cinnamon Shia wrote:
Add a new option -c to dump cumulative data.
For example:
shell> dp -c
==[ Cumulative ]
(Times in microsec.) Cumulative Average ShortestLongest
Name CountDurationDurationDurationDuration
LoadImage:
On 3 November 2015 at 14:51, Cohen, Eugene wrote:
> Please don't remove this functionality. At times we do want to use this
> library to turn off the cache in preparation for going to another environment
> (say, loading an OS) and this is useful.
>
Note that this is not about
W dniu 03.11.2015 o 14:31, Laszlo Ersek pisze:
> On 11/03/15 13:34, Paolo Bonzini wrote:
>>
>> On 03/11/2015 02:14, Laszlo Ersek wrote:
>>> Anyway, with the following host kernel change, the AP startup problem
>>> goes away (tested on top of v4.3):
>>>
> diff --git a/arch/x86/kvm/x86.c
Hi,
On Tue, Nov 03, 2015 at 11:16:31AM +0100, Ard Biesheuvel wrote:
> The stride used by the cache maintenance by MVA instructions should
> be retrieved from CTR_EL0.DminLine and CTR_EL0.IminLine, whose values
> reflect the actual geometry of the caches. Using CCSIDR for this purpose
> violates
On Tue, Nov 03, 2015 at 01:51:46PM +, Cohen, Eugene wrote:
> Please don't remove this functionality. At times we do want to use
> this library to turn off the cache in preparation for going to another
> environment (say, loading an OS) and this is useful.
Could you elaborate on your
Leif,
I saw your feedbacks as your opinion if you create patches. I don't think your
opinion is the *only* right solution.
I can also split 3/4 in your patch serials to two patches: one is to just
change DumpBridgeResource(), the other is for the remaining changes.
So I think my splitting way is
On Tue, Nov 03, 2015 at 11:16:30AM +0100, Ard Biesheuvel wrote:
> The ARM architecture does not allow the actual geometries of the caches
> to be inferred from the CCSIDR cache info system register, since the
> geometry it reports is intended for performing cache maintenance by
> set/way and
On Tue, Nov 03, 2015 at 11:16:32AM +0100, Ard Biesheuvel wrote:
> There is no need to issue a full data synchronization barrier and an
> instruction synchronization barrier after each and every set/way or
> MVA cache maintenance operation. For the set/way case, we can simply
> remove them, since
Hi Star,
Thanks for your feedback.
Will address your comments in patch v3.
Thanks,
Cinnamon Shia
-Original Message-
From: Zeng, Star [mailto:star.z...@intel.com]
Sent: Tuesday, November 3, 2015 10:06 PM
To: Shia, Cinnamon; edk2-devel@lists.01.org
Subject: Re: [edk2] [PATCH v2 2/2]
88 matches
Mail list logo