[gem5-dev] Change in public/gem5[master]: Fix DDR4_2400_8x8 DRAMCTRL configuration

Curtis Dunham merged this change by Wendy Elsasser. ( https://gem5-review.googlesource.com/8101 ) Change subject: Fix DDR4_2400_8x8 DRAMCTRL configuration .. Fix DDR4_2400_8x8 DRAMCTRL configuration Change-Id

[gem5-dev] Change in public/gem5[master]: arm: extend MiscReg metadata structures

Curtis Dunham has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6802 ) Change subject: arm: extend MiscReg metadata structures .. arm: extend MiscReg metadata structures Implement proper

[gem5-dev] Change in public/gem5[master]: arch-arm: understandably initialize register mappings

Curtis Dunham has submitted this change and it was merged. ( https://gem5-review.googlesource.com/6801 ) Change subject: arch-arm: understandably initialize register mappings .. arch-arm: understandably initialize register

[gem5-dev] Change in public/gem5[master]: config: Embed Device Tree generation in fs.py config

Curtis Dunham has submitted this change and it was merged. ( https://gem5-review.googlesource.com/5968 ) Change subject: config: Embed Device Tree generation in fs.py config .. config: Embed Device Tree generation in fs.py

[gem5-dev] Change in public/gem5[master]: config, arm: enable device tree autogeneration for bigLITTLE

Curtis Dunham has submitted this change and it was merged. ( https://gem5-review.googlesource.com/5969 ) Change subject: config, arm: enable device tree autogeneration for bigLITTLE .. config, arm: enable device tree

[gem5-dev] Change in public/gem5[master]: arm: DT autogeneration - Generate energy controller node

Curtis Dunham has submitted this change and it was merged. ( https://gem5-review.googlesource.com/5966 ) Change subject: arm: DT autogeneration - Generate energy controller node .. arm: DT autogeneration - Generate energy

[gem5-dev] Change in public/gem5[master]: arm: DT autogeneration - Generate memory node

Curtis Dunham has submitted this change and it was merged. ( https://gem5-review.googlesource.com/5964 ) Change subject: arm: DT autogeneration - Generate memory node .. arm: DT autogeneration - Generate memory node

[gem5-dev] Change in public/gem5[master]: arm: DT autogeneration - autogenerate RealView Platform devices

Curtis Dunham has submitted this change and it was merged. ( https://gem5-review.googlesource.com/5965 ) Change subject: arm: DT autogeneration - autogenerate RealView Platform devices .. arm: DT autogeneration

[gem5-dev] Change in public/gem5[master]: arm: DT autogeneration - Generate cpus node

Curtis Dunham has submitted this change and it was merged. ( https://gem5-review.googlesource.com/5963 ) Change subject: arm: DT autogeneration - Generate cpus node .. arm: DT autogeneration - Generate cpus node Equips cpu

[gem5-dev] Change in public/gem5[master]: arm: DT autogeneration - Device Tree generation methods

Curtis Dunham has submitted this change and it was merged. ( https://gem5-review.googlesource.com/5962 ) Change subject: arm: DT autogeneration - Device Tree generation methods .. arm: DT autogeneration - Device Tree

[gem5-dev] Change in public/gem5[master]: ext: DT autogeneration - Add PyFtd to m5 space

Curtis Dunham has submitted this change and it was merged. ( https://gem5-review.googlesource.com/5961 ) Change subject: ext: DT autogeneration - Add PyFtd to m5 space .. ext: DT autogeneration - Add PyFtd to m5 space

[gem5-dev] Change in public/gem5[master]: arm: make Arm GenericTimer a ClockedObject

Curtis Dunham has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4960 ) Change subject: arm: make Arm GenericTimer a ClockedObject .. arm: make Arm GenericTimer a ClockedObject Within

[gem5-dev] Change in public/gem5[master]: config: Embed Device Tree generation in fs.py config

is not of --machine-type VExpress_GEM5_V1. Change-Id: I7766e5459fd9bec2245de83cef103091ebaf7229 Reviewed-by: Curtis Dunham <curtis.dun...@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com> --- M configs/common/FSConfig.py M configs/common/Options.py M configs/example/f

[gem5-dev] Change in public/gem5[master]: arm: make Arm GenericTimer a ClockedObject

Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6d3fb6362847c6a01720b2f14b3d595d1e59f01f Gerrit-Change-Number: 4960 Gerrit-PatchSet: 5 Gerrit-Owner: Curtis Dunham <curtis.dun...@arm.com> Gerrit-Reviewer: Andreas Sandberg <andreas.s

Re: [gem5-dev] Change in public/gem5[master]: config: Rework the SysPaths functions into functors.

Hi all, Gabe, This commit breaks the regression quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic. It's the only regression that uses SysConfig() with an actual script argument, and it needs to find that script in $GEM5_ROOT/configs/boot/. Before this commit, this would be

[gem5-dev] Change in public/gem5[master]: tests: Fix path for module imports in ARM system configs again

Curtis Dunham has submitted this change and it was merged. ( https://gem5-review.googlesource.com/4940 ) Change subject: tests: Fix path for module imports in ARM system configs again .. tests: Fix path for module imports

[gem5-dev] Change in public/gem5[master]: tests: Fix path for module imports in ARM system configs again

ngs Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I705e64298a8251dcfefbdca927d61c9bbb8bbea7 Gerrit-Change-Number: 4920 Gerrit-PatchSet: 1 Gerrit-Owner: Curtis Dunham <curtis.dun...@arm.com> Gerrit-Reviewer: Andreas

[gem5-dev] Change in public/gem5[master]: scons: detect tcmalloc using pkg-config (if available)

Curtis Dunham has uploaded a new patch set (#3) to the change originally created by Paul Rosenfeld. ( https://gem5-review.googlesource.com/4500 ) Change subject: scons: detect tcmalloc using pkg-config (if available) .. scons

[gem5-dev] Change in public/gem5[master]: mem: Signal the local monitor when clearing the global monitor

Curtis Dunham has uploaded a new patch set (#2) to the change originally created by Nikos Nikoleris. ( https://gem5-review.googlesource.com/3760 ) Change subject: mem: Signal the local monitor when clearing the global monitor

[gem5-dev] Change in public/gem5[master]: arch-arm: Signal an event when executing store exclusives

oglesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I383c88c769c0ac5f5d36c4b5d39c9681134d3a20 Gerrit-Change-Number: 4480 Gerrit-PatchSet: 1 Gerrit-Owner: Curtis Dunham <curtis.dun...@arm.com> Gerrit-Reviewer: Andreas Sandber

Re: [gem5-dev] Vector registers patch series

). Have you done any tests, or can you think of something simple that I could use to test this out? I (well, Sean, who's working with us this summer) have some time to do testing, if there's something easy for us to do. Thanks, Jason On Fri, Jun 16, 2017 at 11:48 AM Curtis Dunham <curtis.

Re: [gem5-dev] Vector registers patch series

Hello gem5 community, Just a gentle reminder on this patch series - it's been more two months and no activity. We will be pushing these soon. Thanks, Curtis From: Curtis Dunham Sent: Friday, April 21, 2017 12:28 PM To: gem5-dev@gem5.org Subject: Vector registers patch series Hello all, We

[gem5-dev] Change in public/gem5[master]: kvm, arm: Don't forward IRQ/FIQ when using the kernel's GIC

.@arm.com> Reviewed-by: Curtis Dunham <curtis.dun...@arm.com> --- M src/arch/arm/kvm/base_cpu.cc M src/arch/arm/kvm/gic.cc M src/cpu/kvm/vm.hh 3 files changed, 36 insertions(+), 12 deletions(-) diff --git a/src/arch/arm/kvm/base_cpu.cc b/src/arch/arm/kvm/base_cpu.cc index e25112c..765965

[gem5-dev] Change in public/gem5[master]: kvm, arm: don't create interrupt events while saving GIC state

rce.com/3661 To unsubscribe, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Icb37e7e992f1fb441a9b3a26daa1bb5a6fe19228 Gerrit-Change-Number: 3661 Gerrit-PatchSet: 1 Gerrit-Owner: Curtis Dunham <curtis.dun...@

[gem5-dev] Change in public/gem5[master]: kvm: move Kvm check from ARM Kvm GIC to System

Curtis Dunham has uploaded this change for review. ( https://gem5-review.googlesource.com/3540 Change subject: kvm: move Kvm check from ARM Kvm GIC to System .. kvm: move Kvm check from ARM Kvm GIC to System The check

[gem5-dev] Change in public/gem5[master]: dev, arm: add Kvm mode of operation for CP15 timer

Curtis Dunham has uploaded this change for review. ( https://gem5-review.googlesource.com/3542 Change subject: dev,arm: add Kvm mode of operation for CP15 timer .. dev,arm: add Kvm mode of operation for CP15 timer The timer

[gem5-dev] Change in public/gem5[master]: dev, arm: remove and recreate timer events around drains

Curtis Dunham has uploaded this change for review. ( https://gem5-review.googlesource.com/3541 Change subject: dev,arm: remove and recreate timer events around drains .. dev,arm: remove and recreate timer events around

[gem5-dev] Change in public/gem5[master]: arm, kvm: update CP15 timer model when exiting Kvm

Curtis Dunham has uploaded this change for review. ( https://gem5-review.googlesource.com/3543 Change subject: arm,kvm: update CP15 timer model when exiting Kvm .. arm,kvm: update CP15 timer model when exiting Kvm The ARM

Re: [gem5-dev] strange web of dependencies

Hi Gabe, I am the author of this part of the build system. SCons' support for dynamic generation of dependencies is really bad, so I had to build out the artificial targets to compensate. Unfortunately as this work was three years ago, I don't remember all the gory details of the problems

[gem5-dev] Vector registers patch series

Hello all, We have a very nice $SUBJECT posted on Gerrit (for over 2 weeks now): https://gem5-review.googlesource.com/c/2700/ https://gem5-review.googlesource.com/c/2701/ https://gem5-review.googlesource.com/c/2702/ https://gem5-review.googlesource.com/c/2703/

[gem5-dev] Change in public/gem5[master]: arch: added generic vector register

ane32 = VecLaneT<uint32_t, false>; +using VecLane64 = VecLaneT<uint64_t, false>; + +using ConstVecLane8 = VecLaneT<uint8_t, true>; +using ConstVecLane16 = VecLaneT<uint16_t, true>; +using ConstVecLane32 = VecLaneT<uint32_t, true>; +using ConstVecLane64 = VecLaneT<ui

[gem5-dev] Change in public/gem5[master]: arch: ISA parser additions of vector registers

Stats::Scalar numVecInsts; + // Number of integer register file accesses Stats::Scalar numIntRegReads; Stats::Scalar numIntRegWrites; diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh index e7507c6..883c532 100644 --- a/src/cp

[gem5-dev] Change in public/gem5[master]: cpu: Physical register structural + flat indexing

Hello Andreas Sandberg, I'd like you to do a code review. Please visit https://gem5-review.googlesource.com/2701 to review the following change. Change subject: cpu: Physical register structural + flat indexing .. cpu:

[gem5-dev] Change in public/gem5[master]: cpu: Result refactoring

ast to integer without checking type. + * This is required to have the o3 cpu checker happy, as it + * compares results as integers without being fully aware of + * their nature. */ +const uint64_t& +asIntegerNoAssert() const +{ +return result.integer; +} +/** @} */ +}; + +#endif // __CPU_INST_RES_HH__ -- To view, visit https://gem5-review.googlesource.com/2703 To unsubscribe, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6f40c11cb5e835d8b11f7804a4e967aff18025b9 Gerrit-Change-Number: 2703 Gerrit-PatchSet: 1 Gerrit-Owner: Curtis Dunham <curtis.dun...@arm.com> Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com> ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in public/gem5[master]: arm, dev: stub out GIC distributor interrupt groups

errit-Change-Number: 2620 Gerrit-PatchSet: 1 Gerrit-Owner: Curtis Dunham <curtis.dun...@arm.com> Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com> ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in public/gem5[master]: arm: correct register read bug in Pl390 GIC

04 Gerrit-Change-Number: 2440 Gerrit-PatchSet: 1 Gerrit-Owner: Curtis Dunham <curtis.dun...@arm.com> Gerrit-Reviewer: Andreas Sandberg <andreas.sandb...@arm.com> ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Change in public/gem5[master]: arm, dev: add basic support for GICC_BPR register

nsubscribe, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If51e669d23b49047b69b82ab363dd01a936cc93b Gerrit-Change-Number: 2443 Gerrit-PatchSet: 1 Gerrit-Owner: Curtis Dunham <curtis.dun...@ar

[gem5-dev] Change in public/gem5[master]: arm, dev: refactor GIC Pl390 GICD_ITARGETSRn handling

cpt.set(new_sec, 'intPriority',' '.join(intPriority)) -cpt.set(new_sec, 'cpuTarget', ' '.join(b_cpuTarget)) -- To view, visit https://gem5-review.googlesource.com/2442 To unsubscribe, visit https://gem5-review.googlesource.com/settings Gerrit-Project:

[gem5-dev] Change in public/gem5[master]: arm: refactor packet processing in Pl390 GIC

uint32_t readDistributor(ContextID ctx, Addr daddr, size_t resp_sz); /** Handle a read to the cpu portion of the GIC * @param pkt packet to respond to */ Tick readCpu(PacketPtr pkt); +uint32_t readCpu(ContextID ctx, Addr daddr); /** Handle a write to the distributor portion

[gem5-dev] Change in public/gem5[master]: arm, kvm: implement GIC state transfer

u portion of the GIC * @param pkt packet to respond to */ Tick writeCpu(PacketPtr pkt); -void writeCpu(ContextID ctx, Addr daddr, uint32_t data); +void writeCpu(ContextID ctx, Addr daddr, uint32_t data) override; }; #endif //__DEV_ARM_GIC_H__ -- To view, visit https://gem5-rev

[gem5-dev] changeset in gem5: sim,kvm,arm: fix typos

changeset 0b311345ac72 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=0b311345ac72 description: sim,kvm,arm: fix typos Change-Id: Ifc65d42eebfd109c1c622c82c3c3b3e523819e85 Reviewed-by: Andreas Sandberg diffstat:

[gem5-dev] changeset in gem5: sim, kvm: make KvmVM a System parameter

changeset dd6df2e47c14 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=dd6df2e47c14 description: sim, kvm: make KvmVM a System parameter A KVM VM is typically a child of the System object already, but for solving future issues with configuration graph

[gem5-dev] changeset in gem5: arm, kvm: remove KvmGic

changeset 5a766820e739 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=5a766820e739 description: arm, kvm: remove KvmGic KvmGic functionality has been subsumed within the new MuxingKvmGic model, which has Pl390 fallback when not using KVM for fast

[gem5-dev] changeset in gem5: sim: allow forward dependencies in checkpoint...

changeset 8ab6738c5f66 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=8ab6738c5f66 description: sim: allow forward dependencies in checkpoint upgraders The notion of forward dependencies is just expressing the same dependency but at the other end of

[gem5-dev] changeset in gem5: tests: check for gem5 binary before tests

changeset 3195e72010da in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=3195e72010da description: tests: check for gem5 binary before tests Provides a helpful error when tests.py is invoked without the gem5 binary. Before: Running 0 tests

[gem5-dev] changeset in gem5: arm, kvm: implement MuxingKvmGic

Andreas Sandberg + * Curtis Dunham */ #include "arch/arm/kvm/gic.hh" #include +#include "arch/arm/kvm/base_cpu.hh" #include "debug/Interrupt.hh" #include "params/KvmGic.hh" +#include "params/MuxingKvmGic.hh" KvmKer

[gem5-dev] changeset in gem5: sim: add support for checkpoint downgrading

changeset 29f0d1d70282 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=29f0d1d70282 description: sim: add support for checkpoint downgrading This commit supports the use case of transitioning tags and their associated checkpoint rewrites out of use

[gem5-dev] Review Request 3805: mem: fix fast build breakage from CommMonitor refactoring

Sandberg <andreas.sandb...@arm.com> Diffs - src/mem/comm_monitor.cc 63325e5b0a9d Diff: http://reviews.gem5.org/r/3805/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinf

Re: [gem5-dev] Review Request 3785: sim, kvm: make KvmVM a System parameter

, as there will be no KvmVM class. - Curtis --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3785/#review9330 ------- On Jan. 17, 2017, 10:04 p.m., Curtis Dunham wrote: > > ---

Re: [gem5-dev] Review Request 3785: sim, kvm: make KvmVM a System parameter

-------- On Jan. 17, 2017, 10:04 p.m., Curtis Dunham wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3785/ > -

Re: [gem5-dev] Review Request 3785: sim, kvm: make KvmVM a System parameter

n. 17, 2017, 10:04 p.m., Curtis Dunham wrote: > > --- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/3785/ > --- > &g

[gem5-dev] Review Request 3788: arm, kvm: remove KvmGic

: Ie61251720064c512843015c075e4ac419a4081e8 Reviewed-by: Andreas Sandberg <andreas.sandb...@arm.com> Diffs - src/arch/arm/kvm/KvmGic.py 97eebddaae84 src/arch/arm/kvm/gic.hh 97eebddaae84 src/arch/arm/kvm/gic.cc 97eebddaae84 Diff: http://reviews.gem5.org/r/3788/diff/ Testing --- Thanks, Curtis

[gem5-dev] Review Request 3785: sim, kvm: make KvmVM a System parameter

esting --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3786: arm, kvm: implement MuxingKvmGic

-by: Andreas Sandberg <andreas.sandb...@arm.com> Diffs - src/arch/arm/kvm/KvmGic.py 97eebddaae84 src/arch/arm/kvm/gic.hh 97eebddaae84 src/arch/arm/kvm/gic.cc 97eebddaae84 Diff: http://reviews.gem5.org/r/3786/diff/ Testing --- Thanks, Curtis

[gem5-dev] Review Request 3783: mem: Update DRAM configuration names

for: 1) 16x4 2) 8x8 3) 4x16 Change-Id: Ibd7f763b7248835c624309143cb9fc29d56a69d1 Reviewed-by: Radhika Jagtap <radhika.jag...@arm.com> Reviewed-by: Curtis Dunham <curtis.dun...@arm.com> Diffs - tests/configs/realview-simple-timing-dual.py 97eebddaae84 tests/configs/realview-simp

[gem5-dev] Review Request 3787: arm, kvm: Automatically use the MuxingKvmGic

: Automatically use the MuxingKvmGic Automatically use the MuxingKvmGic in the VExpress_GEM5_V1 platform. This removes the need to patch the host kernel or the platform configuration when using KVM on ARM. Change-Id: Ib1ed9b3b849b80c449ef1b62b83748f3f54ada26 Reviewed-by: Curtis Dunham <curtis.

[gem5-dev] Review Request 3784: sim,kvm,arm: fix typos

rc/sim/system.hh 97eebddaae84 src/sim/system.cc 97eebddaae84 Diff: http://reviews.gem5.org/r/3784/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] changeset in gem5: dist, dev: fix etherswitch upgrade script

changeset ed89cb178ecd in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=ed89cb178ecd description: dist, dev: fix etherswitch upgrade script The aforementioned upgrader in [1] assumes every option in [system] has a delimiting '.', and also seems to do

[gem5-dev] changeset in gem5: arm: compute ID_AA64PFR{0, 1}_EL1 registers

changeset 9db50b9eacf5 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=9db50b9eacf5 description: arm: compute ID_AA64PFR{0,1}_EL1 registers Compute the proper values of the aforementioned registers from the system configuration rather than configuring

[gem5-dev] changeset in gem5: arm: compute ID_PFR{0,1} registers

changeset baccae81e57e in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=baccae81e57e description: arm: compute ID_PFR{0,1} registers Compute the proper values of the aforementioned registers from the system configuration rather than configuring the

[gem5-dev] changeset in gem5: arm: provide correct timer availability in ID...

changeset 4b62a0bf0168 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=4b62a0bf0168 description: arm: provide correct timer availability in ID_PFR1 register Change-Id: Id4cd839c12b70616017a5830e3f9bbb59b0f97ba Reviewed-by: Andreas Sandberg

[gem5-dev] changeset in gem5: arm: update AArch{64, 32} register mappings

changeset 5b80960dcf08 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=5b80960dcf08 description: arm: update AArch{64,32} register mappings Change-Id: Idaaaeb3f7b1a0bdbf18d8e2d46686c78bb411317 Reviewed-by: Andreas Sandberg

[gem5-dev] changeset in gem5: arm: audit SCTLR

changeset 0d7119bed18e in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=0d7119bed18e description: arm: audit SCTLR Change-Id: I814f1431a5f754f75721c9ac51171f860a714d24 Reviewed-by: Andreas Sandberg diffstat:

[gem5-dev] changeset in gem5: arm: remove SCTLR.FI

changeset ec57caae355e in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=ec57caae355e description: arm: remove SCTLR.FI Removed from ARMARM. Change-Id: Ie8f28e4fa6e1b46dfd9c8c4b379e5b42fe25421d Reviewed-by: Andreas Sandberg

[gem5-dev] Review Request 3766: tests: check for gem5 binary before tests

com> Diffs - tests/tests.py 78ef8daecd81de0c392034809b3bc155396bf983 Diff: http://reviews.gem5.org/r/3766/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3765: sim: allow forward dependencies in checkpoint upgraders

5/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3763: dist, dev: fix etherswitch upgrade script

3/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3764: sim: add support for checkpoint downgrading

der.py 78ef8daecd81de0c392034809b3bc155396bf983 Diff: http://reviews.gem5.org/r/3764/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] SynchroTrace trace player on ReviewBoard

about this. Still, we hope the community sees the value in this functionality. We look forward to your feedback. Thanks, Curtis Dunham [1] http://reviews.gem5.org/r/3687/ [2] http://dpac.ece.drexel.edu/current-research-projects/synchrotrace/ IMPORTANT NOTICE: The contents of this email

[gem5-dev] Review Request 3687: cpu: Add a SynchroTrace replay model

-CREATION src/cpu/testers/synchrotrace/st_parser.cc PRE-CREATION src/cpu/testers/synchrotrace/synchro_trace.hh PRE-CREATION src/cpu/testers/synchrotrace/synchro_trace.cc PRE-CREATION Diff: http://reviews.gem5.org/r/3687/diff/ Testing --- Thanks, Curtis Dunham

Re: [gem5-dev] Review Request 3622: Prefetch: Do not prefetch on cache & MSHR misses

how this change accomplishes it. What prevents the notification from happening? Presumably there is some state being modified, but it is entirely unclear what or where. Have you looked into that? - Curtis Dunham On Sept. 1, 2016, 12:10 p.m., Taehoon Kim wrote

[gem5-dev] changeset in gem5: stats: update references

changeset b4d943429dc6 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=b4d943429dc6 description: stats: update references diffstat: tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/config.ini | 48 +-

Re: [gem5-dev] Review Request 3602: mem: Add DRAM low-power functionality

te this RB entry for that. - Curtis --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/3602/#review8749 --- On Aug. 11, 2016, 9:08 a.m., Curtis Dunham wrote: > > ---

[gem5-dev] changeset in gem5: arm: disable GIC extensions

changeset 2c111e634da0 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=2c111e634da0 description: arm: disable GIC extensions Change-Id: If19b9c593b48ded1ea848f2d3710d4369ec8a221 Reviewed-by: Andreas Sandberg diffstat:

[gem5-dev] changeset in gem5: ext: update SST test config

changeset 1ede1b60b318 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=1ede1b60b318 description: ext: update SST test config Align configuration with new SST change [1] requiring units for memHierarchy's backend.mem_size parameter. [1]

[gem5-dev] changeset in gem5: base: eliminate ipython warning

changeset e92bf392bf43 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=e92bf392bf43 description: base: eliminate ipython warning Change-Id: I3e282baeb969b6bb9534813a2f433d68246c0669 Reviewed-by: Andreas Sandberg diffstat:

[gem5-dev] changeset in gem5: ext: eliminate warnings in SST connector

changeset 37b0af2c7ba8 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=37b0af2c7ba8 description: ext: eliminate warnings in SST connector Now compiles completely clean. diffstat: ext/sst/ExtMaster.cc | 7 +-- ext/sst/ExtMaster.hh |

[gem5-dev] changeset in gem5: commit 15c633eea52f21dae8cb3a195823b3cdec7be491

changeset a51ae096ca25 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=a51ae096ca25 description: commit 15c633eea52f21dae8cb3a195823b3cdec7be491 Author: Curtis Dunham <curtis.dun...@arm.com> ext: update SST connector for SST 6.0 diffstat:

[gem5-dev] Review Request 3618: arm, config: Fixups for the example big.LITTLE(tm) configuration

;gabor.do...@arm.com> Diffs - configs/example/arm/devices.py 7e7157941d70030b38e9022684cac5032d690c89 configs/example/arm/fs_bigLITTLE.py 7e7157941d70030b38e9022684cac5032d690c89 Diff: http://reviews.gem5.org/r/3618/diff/ Testing --- Thanks, C

[gem5-dev] Review Request 3617: isa, arm: Add missing AArch32 FP instructions

insts/vfp.hh 7e7157941d70030b38e9022684cac5032d690c89 src/arch/arm/insts/vfp.cc 7e7157941d70030b38e9022684cac5032d690c89 src/arch/arm/isa/formats/fp.isa 7e7157941d70030b38e9022684cac5032d690c89 Diff: http://reviews.gem5.org/r/3617/diff/ Testing --- Thanks, C

[gem5-dev] Review Request 3602: mem: Add DRAM low-power functionality

trl.cc e9096175eb38ac39f37c91bfdf2a450b9664e222 Diff: http://reviews.gem5.org/r/3602/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3603: mem: add DRAM powerdown current

5.org/r/3603/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3597: mem: add DRAM powerdown timing

, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3598: mem: update DDR3 die revision

DDR3 die revision Change-Id: I8992ddc1664c3ed4b2d36d8a34e4ce8be113b9de Reviewed-by: Radhika Jagtap <radhika.jag...@arm.com> Diffs - src/mem/DRAMCtrl.py e9096175eb38ac39f37c91bfdf2a450b9664e222 Diff: http://reviews.gem5.org/r/3598/diff/ Testing --- Thanks, Curtis

[gem5-dev] Review Request 3599: mem: Sort memory commands and update DRAMPower

/3599/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3600: mem: Modify drain to ensure banks and power are idled

-by: Radhika Jagtap <radhika.jag...@arm.com> Diffs - src/mem/dram_ctrl.cc e9096175eb38ac39f37c91bfdf2a450b9664e222 src/mem/dram_ctrl.hh e9096175eb38ac39f37c91bfdf2a450b9664e222 Diff: http://reviews.gem5.org/r/3600/diff/ Testing --- Thanks, Curtis

[gem5-dev] Review Request 3601: mem: Add callback to compute stats prior to dump event

: http://reviews.gem5.org/r/3601/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3596: mem: make DDR4 x16

x16 Diffs - src/mem/DRAMCtrl.py e9096175eb38ac39f37c91bfdf2a450b9664e222 Diff: http://reviews.gem5.org/r/3596/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5

[gem5-dev] changeset in gem5: arm: s/ctx_id/ctx/ the GIC

changeset e9096175eb38 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=e9096175eb38 description: arm: s/ctx_id/ctx/ the GIC Factored out of the larger banked register change. Change-Id: I947dbdb9c00b4678bea9d4f77b913b7014208690 Reviewed-by:

[gem5-dev] changeset in gem5: arm: bank GIC registers per CPU

changeset 1a70f8188580 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=1a70f8188580 description: arm: bank GIC registers per CPU Updated according to GICv2 documentation. Change-Id: I5d926d1abf665eecc43ff0f7d6e561e1ee1c390a Reviewed-by:

[gem5-dev] changeset in gem5: stats: update references

changeset af2f7fef4875 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=af2f7fef4875 description: stats: update references diffstat: tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini | 4 +-

[gem5-dev] changeset in gem5: arm: refactor page table walking

changeset 32cbf6ab7730 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=32cbf6ab7730 description: arm: refactor page table walking Introduce and use a lookup table. Using fetchDescriptor() rather than DMA cleanly handles nested paging.

[gem5-dev] changeset in gem5: arm: enable EL2 support

changeset 868c31fcca24 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=868c31fcca24 description: arm: enable EL2 support Change-Id: I59fa4fae98c33d9e5c2185382e1411911d27d341 diffstat: src/arch/arm/ArmISA.py | 5 ++--- src/arch/arm/faults.cc |

Re: [gem5-dev] changeset in gem5: arm, config: Add an example ARM big.LITTLE(tm...

Apologies all, it was brought to my attention that there were two versions of this on ReviewBoard and the one I was managing had no feedback. http://reviews.gem5.org/r/3545/ vs http://reviews.gem5.org/r/3565/ We will post a fixup to this commit once all feedback on the latter is resolved.

[gem5-dev] Review Request 3570: arm: s/ctx_id/ctx/ the GIC

390.cc 704b0198f747b766b839c577614eb2924fd1dfee Diff: http://reviews.gem5.org/r/3570/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3569: arm: bank GIC registers per CPU

390.cc 704b0198f747b766b839c577614eb2924fd1dfee util/cpt_upgraders/arm-gicv2-banked-regs.py PRE-CREATION Diff: http://reviews.gem5.org/r/3569/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinf

[gem5-dev] Review Request 3545: arm, config: Add an example ARM big.LITTLE(tm) configuration script

ts PRE-CREATION configs/example/arm/devices.py PRE-CREATION configs/example/arm/fs_bigLITTLE.py PRE-CREATION system/arm/dt/Makefile dd6dfd38b6c2a37be9503db68eb1e816ee08e609 Diff: http://reviews.gem5.org/r/3545/diff/ Testing --- Thanks, Curtis

[gem5-dev] Review Request 3541: isa: Modify get/check interrupt routines

/interrupts.cc dd6dfd38b6c2a37be9503db68eb1e816ee08e609 Diff: http://reviews.gem5.org/r/3541/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3542: cpu: Fix Minor SMT WFI/drain interaction issues

.org/r/3542/diff/ Testing --- Thanks, Curtis Dunham ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev

[gem5-dev] Review Request 3518: arm: Fix stage 2 memory attribute checking in AArch64

2 memory attribute checking in AArch64 Diffs - src/arch/arm/table_walker.hh fdfc2455b091b221cd95aaf04e367dea68cd1b3f src/arch/arm/table_walker.cc fdfc2455b091b221cd95aaf04e367dea68cd1b3f Diff: http://reviews.gem5.org/r/3518/diff/ Testing --- Thanks, Curtis Dunham

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