changeset 6af9ce00486e in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=6af9ce00486e
description:
cprintf: properly deal with pointer types
diffstat:
1 file changed, 7 insertions(+)
src/base/varargs.hh |7 +++
diffs (59 lines):
diff -r 11a1079070b6 -r
changeset 11a1079070b6 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=11a1079070b6
description:
swig: Add in a %rename to allow the same name to appear in multiple
namespaces.
diffstat:
1 file changed, 3 insertions(+), 3 deletions(-)
src/SConscript |6 +++---
changeset 83eee68e41bf in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=83eee68e41bf
description:
get rid of local variable that's only used in an assert so fast compiles
diffstat:
1 file changed, 1 deletion(-)
src/arch/x86/interrupts.cc |1 -
diffs (15 lines):
changeset 584248437e4f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=584248437e4f
description:
need to add packet_access.hh in order to get tempalte definition
diffstat:
1 file changed, 1 insertion(+)
src/dev/x86/i8259.cc |1 +
diffs (12 lines):
diff -r
No doubt. We are missing many regressions. It's on me to make it
easier to add regressions, but in the meantime if someone would be
willing to make an o3 alpha boot, that'd be great. It should be super
easy.
Nate
On Mon, Oct 20, 2008 at 3:02 PM, Gabriel Michael Black
[EMAIL PROTECTED]
I'd say that a globally unique contextID is critical. A threadID that
is per core can of course be created if necessary, but I bet that in
most instances, we can just pass pointers around.
Nate
I mostly agree with this, except that it might be tricky to use the context
ID t
index into a
need to give OS's
the ability to assign to a specific thread in a core and not treat all
SMT cores as a separate CPU in every case.
On Fri, Oct 24, 2008 at 5:47 PM, nathan binkert [EMAIL PROTECTED] wrote:
I'd say that a globally unique contextID is critical. A threadID that
is per core can
The BIOS identifies all of the CPUs to the OS, but the arrangement is
deduced by the OS I believe.
Nate
2008/10/24 Lisa Hsu [EMAIL PROTECTED]:
where does this reporting to linux happen?
On Fri, Oct 24, 2008 at 5:53 PM, nathan binkert [EMAIL PROTECTED] wrote:
The OS interface
Hi Stephen,
We've made a bunch of changes to m5-dev and now arm_extras doesn't
compile. I have several fixes that will make it work with m5-dev
again. Is there a repository where they should go?
Should we revisit adding arm to m5 proper?
Nate
___
# HG changeset patch
# User Nathan Binkert [EMAIL PROTECTED]
# Date 1224856285 25200
# Node ID b9ee37f0220800243dcff7076f808891d251b623
# Parent 98224505352a1935c321a702863140ffe0ff6848
output: Change default output directory and files
diff --git a/src/python/m5/main.py b/src/python/m5/main.py
Ok, I've brought this up a couple of times before, but now it's really coming
The two diffs change some of the default names.
The new default output directory will be 'm5out' instead of '.'
The new stats output will be 'stats.txt' instead of 'm5stats.txt'
The new config output will be 'config'
# HG changeset patch
# User Nathan Binkert [EMAIL PROTECTED]
# Date 1224856286 25200
# Node ID e09c768051f61628082682cc68390a297cc579c9
# Parent aba4b2c01db12abcc9c701b8fc896f82a3852c0a
SCons: Allow top level directory of EXTRAS able to contain SConscripts.
The current EXTRAS will fail if the top
Right now, there is a bunch of machinery in the simulator to allow us
to serialize events, but in reality, there's only one event that's
serialized, and I believe that it's not too hard to make it so that
doesn't happen.
Any objections to me whacking all of the code that does that?
Nate
I figured out what I need to do to make the regression suite more
easily extensible. Yell at me if I don't actually do something to fix
it within a week.
Nate
On Tue, Nov 4, 2008 at 1:44 PM, Ali Saidi [EMAIL PROTECTED] wrote:
...and make a regression that catches the problem in the future.
changeset df9253dd6b4d in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=df9253dd6b4d
description:
Fix a few more places where the context stuff wasn't changed
diffstat:
0 files changed
diffs (24 lines):
diff -r c9056088f151 -r df9253dd6b4d src/arch/sparc/ua2005.cc
---
I'm trying to understand exactly how these should be used. Are they
intended to be used entirely internally to an interconnect? i.e. just
within the bus or crossbar or mesh or whatever? I want a source and
destination for my crossbar model, but I don't want to break things.
I'm slightly
be a true
broadcast?
Nate
On Wed, Nov 5, 2008 at 5:39 PM, nathan binkert [EMAIL PROTECTED] wrote:
I'm trying to understand exactly how these should be used. Are they
intended to be used entirely internally to an interconnect? i.e. just
within the bus or crossbar or mesh or whatever? I want
Yea, Ali's got it right... the way to think about address-based
routing on the bus is that the packet logically does get broadcast to
determine the destination; all our mucking with address ranges is
really just some combination of optimization and sanity check.
I buy that, but I'd argue that
However, the question is: when we move to interconnects that decouple
these two things, what entity becomes responsible for mapping
addresses to destinations? There must be some logic or a routing
table that uses the address to generate a destination ID. Without
having given it a ton of
So, Packet and Request have lots of functions called getFoo and
setFoo. That sort of style has always annoyed me because it requires
a lot of extra typing and space. e.g.
/// Accessor function for the destination index of the packet.
short getDest() const { assert(destValid); return
This is a bug, though it causes neither crashes nor functional
misbehavior. The bug is that a class deriving from both RefCounted and
FastAlloc steals memory away from the FastAlloc system. The delete
operator called by RefCounted is NOT the overloaded one that FastAlloc
uses, so the block of
It would seem to me that getuint64_t should automatically do that
for you. I.e., it should grab the size of memory that it's got and
then give you the size that you need.
Nate
On Sat, Nov 8, 2008 at 6:02 PM, Steve Reinhardt [EMAIL PROTECTED] wrote:
Just looking at this code, can we put a
generally in the current code, if the underlying data pointer
in the packet isn't aligned properly to be cast and dereferenced as a
T on systems that care (so not x86), then this code will blow up.
nathan binkert wrote:
It would seem to me that getuint64_t should automatically do that
for you. I.e
Aweseome. My concern is that the read/write functions are getting
long and hard to read. Is there anything that makes sense to break
out into a second function? (i.e. the actual unaligned handling part?
Maybe a readUnaligned and writeUnaligned function with just a simple
check in read/write to
- It's still the official policy that local variables are lower
w/underscores while class members are mixed case... sometimes I have
mixed feelings about that one myself but I've been trying to do a
better job of sticking with it.
I was actually under the impression that the underscore
, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan
OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Nathan Binkert
+ */
+
+#ifndef __BASE_FLAGS_HH__
+#define __BASE_FLAGS_HH__
changeset a88e8e7dec75 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=a88e8e7dec75
description:
style: clean up the Packet stuff
diffstat:
3 files changed, 24 insertions(+), 32 deletions(-)
src/mem/packet.cc |1
src/mem/packet.hh |1
src/mem/request.hh |
changeset 6ea35903c420 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=6ea35903c420
description:
python: Fix the reference counting for python events placed on the
eventq.
We need to add a reference when an object is put on the C++ queue, and
remove
a
changeset 983b71bfc1bd in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=983b71bfc1bd
description:
Clean up the SimpleTimingPort class a little bit.
Move the constructor into the .cc file and get rid of the typedef for
SendEvent.
diffstat:
2 files
changeset 828a8296270e in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=828a8296270e
description:
SCons: Allow top level directory of EXTRAS able to contain SConscripts.
The current EXTRAS will fail if the top level directory pointed to by
EXTRAS
has a
that will assert in debug mode, but do a static_cast otherwise.
Nate
On Mon, Nov 10, 2008 at 6:49 PM, Nathan Binkert [EMAIL PROTECTED] wrote:
changeset 83cc5483a8da in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=83cc5483a8da
description:
safe_cast: add a new cast function
instead of globals.
Nate
On Mon, Nov 10, 2008 at 6:49 PM, Nathan Binkert [EMAIL PROTECTED] wrote:
changeset a88e8e7dec75 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=a88e8e7dec75
description:
style: clean up the Packet stuff
diffstat:
3 files changed, 24
= new uint8_t[getSize()];
}
-Original Message-
From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On
Behalf Of nathan binkert
Sent: Monday, November 10, 2008 6:55 PM
To: m5-dev@m5sim.org
Subject: Re: [m5-dev] changeset in m5: style: clean up the Packet
stuff
This diff
Isn't the assertion backwards? Looks to me that if data is nonzero
you're asserting that neither STATIC_DATA nor DYNAMIC_DATA is set.
Don't you need a '!' in that assertion? Or change it to flags.any()
or whatever the right operator is?
You're right of course. It should be flags.any().
changeset 6b0f8306704b in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=6b0f8306704b
description:
Fix a bunch of bugs I introduced when I changed the flags stuff for
packets.
I did some of the flags and assertions wrong. Thanks to Brad Beckmann
for
at 2:18 PM, nathan binkert [EMAIL PROTECTED] wrote:
I just ran the long regressions (quick all pass) and some of them
crash in the obreak syscall because of bogus arguments to the chunk
generator code. It is entirely possible that it's another bug caused
by me, but I'm not certain. I can't do
This diff is OK. I'll admit that I'm surprised that it destroyed your
repository. That seems like a bug in HG actually.
Nate
On Fri, Nov 14, 2008 at 2:38 PM, Clint Smullen [EMAIL PROTECTED] wrote:
# HG changeset patch
# User Clint Smullen [EMAIL PROTECTED]
# Date 1226702203 18000
# Node
AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Nathan Binkert
+
+import os, subprocess
+
+Import
Haha, do you mean having find call create when it needs to make a new
file? I had considered doing that.
I actually created a couple of protected functions one for checking if
it's stdout/stderr and another to actually construct a new class from
a filename. If you want, I can just take care of
AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Nathan Binkert
+
+import os, subprocess
Though the fact that a TimingSimpleCPU test failed is a bit suspicious
since it didn't in the past and you just modified it.
Nate
On Sun, Nov 16, 2008 at 8:45 PM, nathan binkert [EMAIL PROTECTED] wrote:
My guess is that it's an uninitialized variable. My further guess is
that it's related
Ah, so that was you. That makes sense. I seriously wonder if this or
something like it is the problem with 20.parser.
Nate
On Mon, Nov 17, 2008 at 11:11 AM, Steve Reinhardt [EMAIL PROTECTED] wrote:
changeset c5447915af50 in /z/repo/m5
details:
] wrote:
I sort of doubt it... parser has always been a bit nondeterministic,
where this is just a subtle and unforeseen but deterministic side
effect of a bug fix.
Steve
On Mon, Nov 17, 2008 at 11:57 AM, nathan binkert [EMAIL PROTECTED] wrote:
Ah, so that was you. That makes sense. I
to figuring out what the problem
is.
Gabe
Quoting nathan binkert [EMAIL PROTECTED]:
I more meant that it seems like an infrequently used syscall that uses
an uninitilaized variable that affects the return value could easily
be the result. The stats differences in both simulations
I'd expect the later to change, but
the
former probably means I broke something.
Gabe
Quoting nathan binkert [EMAIL PROTECTED]:
The biggest problem is that I've never been able to find two machines
that behave differently. When things change, I can't find something
that did
WOO!
On Sun, Nov 23, 2008 at 2:54 PM, Gabe Black [EMAIL PROTECTED] wrote:
This isn't all ready to check in and I need to hook up some disks, but tada!
m5 slave terminal: Terminal 0
Linux version 2.6.22.9 ([EMAIL PROTECTED]) (gcc version 4.1.2 (Gentoo
4.1.2)) #2 Mon Oct 8 13:13:00
Alpha's root bridge is the Tsunami stuff. You're going to need to add
the equivalent for x86. I'm not sure about how the pci devices should
be set up (other than the bios does do that for you if you want to use
what it gives you), but you might want to fix the root bridge problem
to see if that
to use that for M5 unless it happens to be intentionally
publicly available as well.
Gabe
nathan binkert wrote:
Alpha's root bridge is the Tsunami stuff. You're going to need to add
the equivalent for x86. I'm not sure about how the pci devices should
be set up (other than the bios does
to clean up some of the rough edges.
Gabe
Quoting nathan binkert [EMAIL PROTECTED]:
How about when Korey's ready, he takes a break and lets us work on the
diffs a bit before they go in the tree? Let us know when you're ready
Korey.
On Mon, Nov 24, 2008 at 5:41 PM, [EMAIL PROTECTED] wrote
Ok, what's the status now? I can dedicate some time to looking at
this now. Are the patches sent out last week the most up to date?
Nate
On Tue, Nov 25, 2008 at 3:45 PM, Gabe Black [EMAIL PROTECTED] wrote:
Ok, that sounds good. I didn't look in the second patch or the first one
very
Hi Clint,
Did you get anywhere with this?
Nate
On Sun, Nov 16, 2008 at 1:23 PM, Clint Smullen [EMAIL PROTECTED] wrote:
Heh, disabling this assertion has a similar result as seen in the
fetch unit: the outstanding requests arrive at the simple CPU that
takes over next, and it promptly dies.
changeset b50a557f93df in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=b50a557f93df
description:
util/m5: reorganize code so it is easier to add operations
diffstat:
1 file changed, 1 insertion(+)
util/m5/m5.c |1 +
diffs (truncated from 337 to 300 lines):
diff -r
changeset 88038cdbb9e1 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=88038cdbb9e1
description:
cprintf: support a configurable width and precision (* in printf)
diffstat:
3 files changed, 16 insertions(+), 2 deletions(-)
src/base/cprintf.hh | 13
changeset c45e8cb7f4ea in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=c45e8cb7f4ea
description:
Add the mkblankimage.sh utility to the utils directory.
diffstat:
1 file changed, 109 insertions(+)
util/mkblankimage.sh | 109
Lots of people want to bind processes to cores, so I added code to the
m5 binary to do that.
Nate
On Wed, Dec 3, 2008 at 5:14 PM, Nathan Binkert [EMAIL PROTECTED] wrote:
changeset 8ef4ad572a6b in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=8ef4ad572a6b
description
Because it is a lot more boiler plate replicated code in C++, but if
you feel strongly about it, I'll do it.
It's actually not all that much, but it is more than what you have. I
guess it's not too big a deal. I just need to get my act together and
auto generate those create functions. Then
m5dprintk = dprintk. We really should rename it all to m5_dprintk()
since the dprintk name can cause issues in some places in the kernel
that also define a dprintk function.
That seems fine to me. Easy enough to just search and replace on the
patches to fix that. One of these days I'm going
changeset f07df23e1fc8 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=f07df23e1fc8
description:
flags: Change naming of functions to be clearer
diffstat:
2 files changed, 2 insertions(+), 7 deletions(-)
src/base/flags.hh |5 -
src/mem/packet.hh |4 ++--
changeset ba6f2477d870 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=ba6f2477d870
description:
eventq: move virtual function definitiions to the .cc file.
diffstat:
2 files changed, 7 insertions(+), 7 deletions(-)
src/sim/eventq.cc |7 +++
src/sim/eventq.hh |
changeset fdfd6e4aad66 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=fdfd6e4aad66
description:
scons: only use -Wno-pointer-sign with gcc = 4.3
diffstat:
1 file changed, 2 insertions(+), 1 deletion(-)
ext/libelf/SConscript |3 ++-
diffs (16 lines):
diff -r
changeset e53bdd0e4bf1 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=e53bdd0e4bf1
description:
eventq: use the flags data structure
diffstat:
0 files changed
diffs (273 lines):
diff -r ba6f2477d870 -r e53bdd0e4bf1 src/cpu/o3/commit_impl.hh
---
This should really say = 4.0
On Sat, Dec 6, 2008 at 2:23 PM, Nathan Binkert [EMAIL PROTECTED] wrote:
changeset fdfd6e4aad66 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=fdfd6e4aad66
description:
scons: only use -Wno-pointer-sign with gcc = 4.3
diffstat:
1 file
I was thinking that sometime in Jan or (probably more realistically
Feb), we should try to actually release m5 2.0. I know that this is
largely symbolic, but it's something that we should do. That said, we
should try to get all of the TODOs and bugs in the database up to date
over the next few
changeset a7ce656e32a0 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=a7ce656e32a0
description:
eventq: Add some debugging code to the eventq.
diffstat:
1 file changed, 1 insertion(+)
src/sim/eventq.hh |1 +
diffs (62 lines):
diff -r 7434b2271b0c -r a7ce656e32a0
Ok, we've talked a lot about style, but the document hasn't really been updated:
Things to add:
1) if/while/for statements must use braces unless the entirety of the
statement fits in two lines. if/elseif/else blocks can skip the
braces only if all blocks fit on two lines. i.e. (if: 2 lines,
The patch looks reasonable, but how did it affect trace flags?
Nate
2008/12/17 Korey Sewell ksew...@umich.edu:
For some reason, these constants didnt get updated for MIPS Linux, which is
causing Hello World not to get work when TraceFlags were on...
On Wed, Dec 17, 2008 at 4:46 PM, Korey
Gabe, if you have any further questions on the x86 idle loop, I'm
actually quite familiar with it because of the ASISA stuff I was
doing. Ali is correct in how the idle loop works. One thing that is
nice is that the idle function is actually a function pointer, so it
is designed to be swapped
Yeah, you're right.
On Fri, Dec 19, 2008 at 9:26 AM, Ali Saidi sa...@umich.edu wrote:
For our initial purposes the default executes the halt instruction and
should suffice as long as we have an implementation of halt that
quiesces the CPU, correct?
Ali
On Dec 19, 2008, at 10:08, nathan
I notice there's a copy of the m5 op stuff in both the main repository
and in the kernel patches, and that the version in the kernel patches
isn't the same. Should they be? Do I need to link them together somehow?
The version in the main repository has some definitions for functions
the other
I recently put the mkblankimage.sh script in m5/util. My guess is
that we should remove the one from the website (with maybe a pointer
to the repository) and fix the one in the tree. Can you take care of
it gabe?
I have the M5 ops working, but the slow IDE controller turned out to be
a bug in
I feel like I'm missing some context with this patch (though I will
admit to not following the mailing list very closely after the last
few months. Was this the solution to us not being able to switch back
to timing from detailed? Can you write up a commit message?
At first glance, it seems
, and
ExecMacro? I sent an email recently which talked about how the new options
work.
My compiler must not have that warning, but I have seen that at work a few
times. Do we want to and is there a way to disable it? It seems a little
excessive to call that an error.
Gabe
Quoting nathan binkert n
, 2009, at 8:48 PM, Gabe Black wrote:
We actually have an implementation for Alpha's equivalent, right?
The
console binary? Do we have that in a separate repository? Would we
do
that for our BIOS of whichever flavor?
Gabe
nathan binkert wrote:
My guess is that people want to run Linux
a good bet.
Ali
On Jan 10, 2009, at 8:48 PM, Gabe Black wrote:
We actually have an implementation for Alpha's equivalent, right? The
console binary? Do we have that in a separate repository? Would we do
that for our BIOS of whichever flavor?
Gabe
nathan binkert wrote:
My guess
My best guess is that $self is something that is a bit more recent in
swig. I wasn't aware of that. Can you get a newer version of swig?
I'll try to figure out when $self appeared.
Nate
2009/1/12 Dan Gibson gib...@cs.wisc.edu:
I'm running into a compile error when building a SWIG-generated
Perhaps it's time that we improved the fatal() message to explain
what's going on here. Any volunteers to hack it up and submit/commit
a patch?
Nate
-- Forwarded message --
From: Pavan Kumar jorri...@gmail.com
Date: Thu, Jan 15, 2009 at 2:42 PM
Subject: [m5-users] mmap:
I have a few more comments. (Steve caught the major ones)
-- Please don't commit random whitespace changes as this makes
following history more difficult. If you just review your diffs,
they're easy to spot.
-- Please include commit messages with your patches. (The -m option
to qrefresh can be
changeset 0af61da2b66a in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=0af61da2b66a
description:
tracing: panic() if people try to use tracing, but TRACING_ON is not
set.
Also clean things up so that help strings can more easily be added.
Move the help
changeset 19c06c037040 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=19c06c037040
description:
tracing: Add help strings for some of the trace flags
diffstat:
3 files changed, 18 insertions(+), 16 deletions(-)
src/arch/sparc/SConscript |2 +-
.) and not a simulator bug. fatal() calls exit(1), i.e., a
72 // normal exit with an error code, as opposed to abort() like
73 // panic() does.
On Mon, Jan 19, 2009 at 10:13 AM, Nathan Binkert n...@binkert.org wrote:
changeset 0af61da2b66a in /z/repo/m5
details: http
changeset 1fb28f526602 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=1fb28f526602
description:
python: add fatal() function to the m5 package and use it
diffstat:
2 files changed, 12 insertions(+), 1 deletion(-)
src/python/m5/__init__.py | 11 +++
changeset aae3d7089925 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=aae3d7089925
description:
thread_context: move getSystemPtr so SE mode can get to it.
There was really no reason that it should be FS only.
diffstat:
4 files changed, 5 insertions(+), 6
So does this mean that the TLB is on the other side of a port but still
part of the CPU? That would be one way to ensure there's no intervening
cache. Is there any way to pass faults around over a port? Or would this
be more of a port-like connection to decouple request/response but to
fit
PM, nathan binkert n...@binkert.org wrote:
I have a few more comments. (Steve caught the major ones)
-- Please don't commit random whitespace changes as this makes
following history more difficult. If you just review your diffs,
they're easy to spot.
-- Please include commit messages
I couldn't connect to any machine at eecs last night, so there was
probably some network problem that made this fail.
Nate
On Sat, Jan 24, 2009 at 12:01 AM, Cron Daemon
r...@zizzer.eecs.umich.edu wrote:
See /z/m5/regression/regress-2009-01-24-03:00:01 for details.
changeset 57f9f8b8e62f in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=57f9f8b8e62f
description:
cpu: provide a wakeup mechanism that can be used to pull CPUs out of
sleep.
Make interrupts use the new wakeup method, and pull all of the interrupt
stuff
If a class has *any* virtual functions, it should have a virtual
destructor because the assumption is that you will use the class
polymorphically and you might delete the class with a pointer to the
base class.
Nate
On Sun, Jan 25, 2009 at 7:52 PM, Ali Saidi sa...@umich.edu wrote:
Gabe,
I
Daniel's pthreads library only works with gem5, are you using the gem5
or m5 tree? (I thought you said m5 in your message to me before).
Nate
I think it might have to do with Daniel's pthreads library written for SE
mode. That's my guess.
Polina
On Tue, Jan 27, 2009 at 3:14 PM, Ali
changeset dad5aad2dc2d in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=dad5aad2dc2d
description:
Fix typo
diffstat:
1 file changed, 1 insertion(+), 1 deletion(-)
src/sim/System.py |2 +-
diffs (12 lines):
diff -r f4a1bcc3b7bc -r dad5aad2dc2d src/sim/System.py
---
This is a simple patch to fix FlySpray issue #315. We don't panic if a
parameter without a default value isn't set which is a problem if the
reason a default isn't set is that the user really needs to set one.
I'm sending this mostly for Nate to say he is fine with doing it this
way.
Are
I suggest putting the error messages in a different directory (e.g.
m5sim.org/e/error id). With this we could either re-write to the
normal wiki, re-write to another wiki for errors where we had a custom
not-found page, or re-write to some php/python that checked and did
the appropriate
The quick thing to do is to just modify the page not found message on
the wiki. Does this work for everyone for now? In the future we could
do something more complex to check the wiki (there is an api) and then
display a special page if we want.
This would affect all wiki pages, right? I
I think I'm missing the high level overview of what this thread is
about, but I do have one comment
To help find that seg fault, I'd suggest going into the kernel and placing
m5_exit() calls in arch/x86/mm/fault.c in the do_page_fault() where the
kernel sends a SIGSEGV to user code and that'll
It would be nice to hack the kernels elf loader to do something
similar as well. Both could provide be sort of an overlay symbol table
you'd pull in and out on task switches. I like these ideas, but
unfortunately the binaries I'm dealing with in my disk image don't seem
to have any symbols
What's the syntax to set something to NULL by default? That's actually
what I want in this case, I think. I tried using None but apparently
that's not right.
There's actually a special parameter called NULL. :) Just use it.
Nate
___
m5-dev
I just noticed that while m5.debug is 54MB, but libm5_debug.a 197MB.
Do we know why it's so huge? That -can't- be good for performance.
I'm pretty sure it's because there are multiple copies of many
functions in there. When C++ sees a template class member function,
it emits code for it in
to need those anyway, though.
Gabe
nathan binkert wrote:
What's the syntax to set something to NULL by default? That's actually
what I want in this case, I think. I tried using None but apparently
that's not right.
There's actually a special parameter called NULL. :) Just use it.
Nate
-//panic(Need implementation\n);
+southBridge-ioApic-signalInterrupt(4);
+southBridge-pic1-signalInterrupt(4);
Can you put a #define somewhere with a comment instead of the magic constant?
___
m5-dev mailing list
m5-dev@m5sim.org
Can you put the images and kernels that you're working with somewhere
so people can play if they want?
Nate
On Sun, Feb 1, 2009 at 5:18 PM, Gabe Black gbl...@eecs.umich.edu wrote:
changeset 08c65e29e57e in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=08c65e29e57e
201 - 300 of 1452 matches
Mail list logo
